We no longer are required to pass the weight to netif_napi_add.
See commit b48b89f9c189 ("net: drop the weight argument from netif_napi_add").
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
This is not a surprise. Before upgrade to 6.6 we refactored the mdio part of
the ethernet driver and knew that changes will come. Drop all unnecessary
stuff from the old world and adapt to the new kernel.
- remove legacy functions
- directly link new functions
- adapt to new shared base address
- remove references to old MDIO bus capabilities
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
No content changes. Only take over the new patch locations. All errors
that will arise from compiling with the ethernet driver will be covered
by follow up patches.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
With the new kernel the MDIO bus gets created after the smbus
read/write functions are used. Make use of native functions.
Relocate bus initialization into a separate function to make
patch easier to read.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Take over the new patch locations and add references to the link mode into
phylink_sfp_interface_preference[] and phylink_get_capabilities().
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
No content changes. As the order of the 7xx patch files seems very
strange reorder all of them according to the realtek 6.6 kernel upgrade
effort.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
No content changes. Only take over the new patch locations.
With this patch all platform specific changes for kernel 6.6 are in place.
Realtek devices are bootable from serial console. VPE is fully functional
on devices that support it. The switch functions (ethernet and DSA) are
not enabled yet.
Boot tested on RTL8380 (Linksys LGS310C) and RTL8393 (Zyxel GS1920-24).
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
VPE in mainline kernel has changed a lot. This patch wraps up the 5.15
patch files and rebases them in one single patch on top of kernel 6.6.
Former patches are
315-irqchip-irq-realtek-rtl-add-VPE-support.patch
319-irqchip-irq-realtek-rtl-fix-VPE-affinity.patch
Submitted-by: Birger Koblitz <git@birger-koblitz.de>
Submitted-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Copy the patch files to 6.6. Both target drivers/irqchip/irq-realtek-rtl.c
and are additions and fixes for IRQ VPE handling.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Copy the patch file to 6.6. No further processing required as
it applies cleanly to the new kernel
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
No content changes. Due to kernel changes the patch hooks totally failed
and had to be fixed manually.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
The CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US is missing. Avoid
complaints and add it with its default 125.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Copy files and config from 5.15 kernel version. Because of the big version jump
leave out the patches for now so we can treat them individually later on.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
With commit b53202a8c3f7 ("realtek: switch to use generic MDIO accessor functions")
the phy access logic was enhanced. A quite big kernel patch was introduced that
allowed to make use of hardware-assisted page access like we have in the realtek
target. Basically it works the following way
- The enhanced bus intercepts page write accesses
- Currently selected pages are stored in internal vars.
- Finally only all-in-one-consistent bus/register accesses are issued
- It intercepted page changes and ensured that only a complete bus call
For the details see https://github.com/openwrt/openwrt/pull/16172
Switching over to newer kernels this patch is really hard to maintain. Its heavy
modifcations exist only in the realtek target. So it does not matter if we keep
it as an kernel modification or directly include it in our driver. To make it the
future brighter we drop this patch and take over its logic. Thus the kernel will
stay totally modification-free. What do we do?
1. Up to now the bus->priv structure directly pointed to ethernet->priv. Create an
explicit private structure rtl838x_bus_priv that not only holds the ethernet->priv
pointer but also space for some bus status tracking vars as well.
2. Wherever we use a reference to ethernet->priv directly replace that by an
additional indirection over the new rtl838x_bus_priv structure.
3. Up to now the phy flag PHY_HAS_REALTEK_PAGES identified that we can use the
alternative paged access from the patch. As this will be no longer available
remove it and provide read_page/write_page functions for each possible PHY.
These functions will be pretty standard as for other Realtek PHYs.
4. The existing mdio bus read/write function rely on the classic MII_ADDR_C45
flag - one interface for two access types. This mixup will be removed on the way
to kernel 6.6. In the future there will be two pairs of access functions. One for
classic access one for c45 style access. Rewrite our functions into 3 parts:
- a classic read/write function: ready for kernel 6.6
- a new c45 read/write function: ready for kernel 6.6
- a legacy read/write wrapper: for current 5.15 for the time being
When we switch to 6.6 we only need to remove the legacy wrappers and link the
new functions. Life can be so easy.
5. The classic read/write functions will incorporate the interception logic that
was originally in the patch.
6. The package convenience functions that were embedded in the patch get lost as
well. Rewrite them inside our phy driver.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
[Minor checkpatch.pl cleanups]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
There is no need to keep a version specific dts directory.
Rename the folder to its standard location.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
The company Zyxel rebranded some years ago.
Currently the casing is according to the old branding even
for newer devices which already use the new branding.
This commit aligns the casing of Zyxel everywhere.
Signed-off-by: Goetz Goerisch <ggoerisch@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15652
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
We should setup the registers for trapping LLDP packets to the CPU.
Currently, these packets are forwarded to all ports which is not desired
behaviour.
Signed-off-by: Kevin Jilissen <info@kevinjilissen.nl>
These registers control the handling of Link Layer Discovery Protocol
(LLDP) packets. This seems to be a typo in the naming.
Signed-off-by: Kevin Jilissen <info@kevinjilissen.nl>
According to the Realtek SDK code, the RTL8214FC, RTL8218B and RTL8218FB
all have the same chip ID 0x6276. Let's add a constant for it, as we're
using it in more than one location.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Respect the phy-is-integrated property on ethernet-phy nodes.
There are RTL8393M switches where the PHYs at address 48 and 49 are
provided by an external RTL8214FC. Hardcoding them to use the internal
SerDes makes it impossible to use the ports connected to such an
external PHY. Respect the phy-is-integrated property on ethernet-phy
nodes as a first step to support such ports.
The potential impact for this should be limited to RTL8393 based
switches, and looking at the commit messages and device tree files of
the supported switches based on this SoC, the SFP and/or combo ports are
either not working (D-Link DGS-1210-52, Netgear GS750E, TP-Link
SG2452P/T1600G-52PS), use PHYs at a different address (Panasonic
SwitchM48EG PN28480K), or already have the phy-is-integrated property
set on the PHYs at address 48 and 49.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Acked-by: Daniel Golle <daniel@makrotopia.org>
