Commit Graph

26 Commits

Author SHA1 Message Date
Rosen Penev
dcef169319 ath79: usb: remove usb- from reset-names
This matches the upstream PHY driver, which removed it.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17118
Signed-off-by: John Crispin <john@phrozen.org>
2024-12-13 15:29:04 +01:00
Shiji Yang
4778f6e959 ath79: move usb led trigger node to SoC dtsi
These frequently used usb led triggers are universal. They should be
moved to SoC dtsi.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
2022-11-12 17:10:12 +01:00
Shiji Yang
8d4c22a956 ath79: add missing clock name strings in SoC dtsi
For all SoC in the ath79 target, the PLL controller provides 3 main
clocks "cpu", "ddr" and "ahb" through the input clock "ref".

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
2022-11-09 22:55:33 +01:00
Christian Lamparter
b2aca5a263 ath79: fix various dts warnings
ar9344_openmesh_mr600-v1.dts:40.10-44.5: Warning (gpios_property):
/leds-ath9k/wifi2g: Missing property '#gpio-cells' in node
/ahb/pcie-controller@180c0000/wifi@0,0 or bad phandle
=> added gpio-controller + #gpio-cells

qca955x_zyxel_nbg6x16.dtsi:121.3-13: Warning (reg_format):
/ahb/usb@1b000000/port@1:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
../dts/qca955x_zyxel_nbg6x16.dtsi:131.3-13: Warning (reg_format):
/ahb/usb@1b400000/port@1:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
qca955x_zyxel_nbg6x16.dtsi:120.20-123.4: Warning (avoid_default_addr_size):
/ahb/usb@1b000000/port@1: Relying on default #address-cells value
=> ath79's usb-nodes are missing the address- and size-cells properties.
These are needed for usb led trigger support.

ar7242_ubnt_sw.dtsi:54.4-14: Warning (reg_format): /gpio_spi/gpio_spi@0:reg:
property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)
=> the #address-cells and #size-cells had to be nudged.

qca9531_dlink_dch-g020-a1.dts:19.6-39.4: Warning (i2c_bus_bridge):
/i2c: incorrect #size-cells for I2C bus
=> #size-cells = <0>;

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
2021-12-11 00:50:02 +01:00
David Bauer
0494278073 ath79: resolve GPIO address conflicts
The ar71xx GPIO driver only uses 0x24 registers, all following GPIO
registers are using to control pinmux functions, which are not handles
by the GPIO driver but the generic Linux pinctrl driver.

For some SoC conflicting address ranges were defined for these (AR7240 &
AR9330).

Resolve these cases and align the address space of the GPIO controller
between all SoCs, as the used address space of the driver is identical
for all these.

Signed-off-by: David Bauer <mail@david-bauer.net>
2021-07-01 23:26:49 +02:00
Adrian Schmutzler
3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00
Adrian Schmutzler
3ca2d31c54 ath79: move ath79-clk.h include to ath79.dtsi
ath79.dtsi uses ATH79_CLK_MDIO, so the include

  <dt-bindings/clock/ath79-clk.h>

needs to be moved there.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-09-25 23:24:09 +02:00
Adrian Schmutzler
dc1280ef65 ath79: enable gpio on ar933x by default
All other SoC DTSI files have gpio enabled by default, only
ar9330/ar9331 disable it by default, only to have it enabled again
afterwards for each individual device.

So, do not disable it in the first place, and drop all device-specific
status statements afterwards.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-07-03 17:37:02 +02:00
Chuanhong Guo
0046aef672 ath79: use ar934x-spi for ar933x as well
ar933x appears to have the same spi controller as ar934x but it's
not mentioned in datasheet at all. Use new spi driver instead to
gain more flash operating performance.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2020-02-06 22:53:52 +08:00
Adrian Schmutzler
6c407fb5db ath79: do not set inherited phy-mode/status properties again
There are several cases where phy-mode and status properties are
set again in DTS(I) files although those were set to the same values
in parent DTSI files already. Remove those cases (and thus also stop
their proliferation by copy/paste).

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-01-31 13:42:12 +01:00
Petr Štetiar
0893f28e19 ath79: ar9330: add missing watchdog node
It was reported in FS#2385, that Carambola2 doesn't currently have
working watchdog so fix it by adding watchdog node.

Ref: FS#2385
Signed-off-by: Petr Štetiar <ynezz@true.cz>
2019-07-17 16:49:20 +02:00
Chuanhong Guo
8dde11d521 ath79: dts: drop "simple-mfd" for gmacs in SoC dtsi
With a proper probe deferring for ag71xx we don't need to explicitly
probe mdio1 before gmac0.
Drop all "simple-mfd" in SoC dtsi so that gmac orders can be the same
as ar71xx.
This makes eth0/eth1 order the same as those in ar71xx, which means
we don't need a migration script for this anymore and we can merge
incorrectly split gmac/mdio driver back together.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-06-05 10:12:31 +02:00
Petr Štetiar
8be66c2332 ath79: ar9330: fix switch_led_disable_pins reg value
In commit e9652e1696 ("ath79: fix pinmux for ar933x devices") I've
wrongly changed desired register value to 0xf8 although it should've
been set to 0x0.

0xf8 value sets bits 3-7 (ETH_SWITCH_LEDx_EN) to 1 which actually
enables ethernet switch LEDs, so 0x0 is correct value in order to use
the pins as GPIO.

Fixes: e9652e1696 ("ath79: fix pinmux for ar933x devices")
Reported-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
2019-05-17 21:41:42 +02:00
Paul Wassi
e9652e1696 ath79: fix pinmux for ar933x devices
Properly disable the SoC's internal Switch LEDs on the pinmux.
Devices that previously called ath79_gpio_function_disable for
the switch LEDs, just need to reference switch_led_pins in the
pinctrl-0 property of the gpio-leds node.

Signed-off-by: Paul Wassi <p.wassi@gmx.at>
[changed desired pinctrl register value from 0x1f to proper 0xf8]
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[renamed pinmux name to switch_led_disable_pins to make purpose more clear]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
2019-05-15 13:34:24 +02:00
Chuanhong Guo
443fc9ac35 ath79: use ar8216 for builtin switch
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-03-24 01:44:27 +01:00
Mathias Kresin
55ff2951ea ath79: fix dts warnings
Fix all issues found by the devicetree compiler like wrong address/size
cells as well as wrong/missing/superfluous unit addresses.

Signed-off-by: Mathias Kresin <dev@kresin.me>
2018-08-08 08:11:11 +02:00
Chuanhong Guo
7a07b4cff0 ath79: Add switch reset definition in dts
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:35 +02:00
Chuanhong Guo
85189e4c00 ath79: ag71xx: Rework mdio clock settings
Allow specifying desired mdio clock frequency in dts.
Use default frequency around 5MHz for builtin switch and 2MHz for other mdio bus.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:34 +02:00
Chuanhong Guo
c7c807cb8c ath79: ar933x: Update dts for current ag71xx driver
gmac0 is always connected to switch phy4 and mdio1 is always needed.
So add phy handle for eth0 and enable mdio1 by default.
Move fixed-link for gmac1 from device dts to ar9331.dtsi because gmac1 is always connected to builtin switch.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:33 +02:00
Rocco Folino
9b575288eb ath79: add pinmux to ar9330
This patch adds the pinmux support to the ar9330 used to disable the
JTAG or to enable switch LEDs

Signed-off-by: Rocco Folino <rocco@folino.io>
2018-07-02 07:00:20 +02:00
Karl Palsson
35aae0735c ath79: ar9330.dtsi: fix typo in USB unit name
Make the unitname match the reg address.  This fixes a DTC warning.

Tested that USB is still functional on an ar9331 device including this
dtsi.

Signed-off-by: Karl Palsson <karlp@etactica.com>
2018-06-08 09:56:27 +02:00
Alex Maclean
5b0c899bfd ath79: correct wmac names in dts
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
2018-06-01 08:23:47 +02:00
John Crispin
83fb9ec5e0 ath79: make ahb wifi work
Signed-off-by: John Crispin <john@phrozen.org>
2018-05-24 15:43:39 +02:00
Johann Neuhauser
c15dfbeea0 ath79: fix gmac compatible in ar9330.dtsi and ag71xx_setup_gmac_933x
1. compatible property in node gmac was wrong

2. ag71xx_setup_gmac_933x should use np of gmac-config and
   not the pointer to gmac. gmac is only used for the reg address.

Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
2018-05-15 06:38:07 +02:00
Rafał Miłecki
66c8afd115 ath79: relicense DTS files to the GPL 2.0+ / MIT
Some maintainers prefer DTS files licensed under permissive license like
MIT / BSD. As all DT bindings should be OS independent and DTS files are
pretty separated from Linux code it probably makes sense to share them
across projects.

The safest solution is to use dual licensing: that way it stays clear
these files can be used in GPL projects without depending on current
belief of licenses compatibility.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: John Crispin <john@phrozen.org>
2018-05-07 10:31:35 +02:00
John Crispin
53c474abbd ath79: add new OF only target for QCA MIPS silicon
This target aims to replace ar71xx mid-term. The big part that is still
missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
subtargets will follow.

Signed-off-by: John Crispin <john@phrozen.org>
2018-05-07 08:06:51 +02:00