Upstream bcma patch:
bcma: use separated function to initialize bus on SoC
was backported incompletely. I missed arch code change.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42603
fix inclusion of functions.sh in dsl_fs init script
without this, the following error is seen during build:
./etc/init.d/dsl_fs: line 4: /lib/functions.sh: No such file or directory
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
SVN-Revision: 42575
Qihoo 360 C301 is a dual band wireless router supports 802.11n and 802.11ac.
Its chipset is AR9344 + AR9882 with two 16MB flashes.
This patch adds its initial support.
v2:
* use mtd_get_mac_ascii to fetch MAC address for ath10k.
* use ath79_register_pci to initialize AR9882.
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
SVN-Revision: 42552
This device actually has a 8250 serial with a shift of 0.
Tested this on a BCM4708.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 42538
We used separated patch for patches that were sent but not accepted yet.
It has changed now, so let's use the standard patch file for them.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42535
CONFIG_BLK_DEV does not activate any functionality, but many code, but
makes it possible to activate other options. Deactivating this breaks
the build of kmod-zram.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 42528
This series of patches ports back some fixes of the ad799x driver, which were
commited between 3.10 and 3.15.
Signed-off-by: Hartmut Knaack <knaack.h@gmx.de>
SVN-Revision: 42523
Convert gpiolib realization to platform driver and move to the
appropriate subdirectory. Misc GPIO interrupt acknowledgement placed
to the MISC IRQ handler since in fact we can detect only one GPIO state
change.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42512
Call generic_handle_irq() instead of do_IRQ() for chained interrupts,
remove XXX_NONE interrupts and call spurious_interrupt() when an interrupt
is unexpected.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42510
Rename config symbols to be consistent with other SoCs config symbols
supported by MIPS arch.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42508
Tested with AR2315, AR2316 and AR2317 SoCs, not tested with AR2318 but
changes seems correct: revision is one more than AR2317.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42507
Convert the PCI controller support code to platform driver and move it to
appropriate subdirectory.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42506
It seems that the PCI controller does not support I/O ports, so remove
the ports range. Also correct the beginning of the memory range and its
size.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42503
Use __raw_{read,write}l accessors and use Abort interrupt to detect a
configuration space read/write errors. The second change improves errors
detection, what improves the device presence detection and helps us to
avoid following (and similar) errors:
pci 0000:00:00.2: ignoring class 0x7e0200 (doesn't match header type 02)
pci 0000:00:00.2: bridge configuration invalid ([bus 03-90]), reconfiguring
pci 0000:00:00.2: not setting up bridge for bus 0000:01
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42502
Add PCI IRQ controller to facilitate interrupt handling, move interrupts
initialization to the IRQ controller initialization from
pcibios_plat_dev_init() callback.
Also remove odd PCI dev configuration manipulation from pcibios_plat_dev_init()
callback.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42501
Explicitly configure PCI host controller, and do not expose it to PCI
subsystem. The PCI host controller acts as a usual PCI device connected
to the bus, but its configuration as a usual PCI device is senseless,
since the host controller provide access to _internal_ memory space for
_external_ device.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42500
- add comment, which briefly describes PCI controller features and
Fonera 2.0g schematics.
- rename several functions and structures, to make it clear that this
code only for AR2315 chips.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42499
Caller (generic PCI code) already do proper locking so no need to add
another one here.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42498
