The act of attempting link at gen1 then trying to link at higher speeds
causes a hang with the specific PCIe switch used on the Gateworks Venice
boards. Work around this by linking at the highest speed first as is
common with all other PCI controller drivers.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/17717
Signed-off-by: Robert Marko <robimarko@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17762
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 23a18a57cf750d9081353cdd34e44982ea10e191)
Add several dt backports for the Gateworks Venice product family.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/17717
Signed-off-by: Robert Marko <robimarko@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17762
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 1ce87cf25c19f030b81954639545db2ab7f17062)
Add a set of upstream patches for the imx8m{m,n,p} based Venice
boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/15736
Signed-off-by: Robert Marko <robimarko@gmail.com>
copy 6.1 patches to 6.6 and fixup:
- removed patches already upstream
- adapted pathnames of dts patches for new kernel
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
