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3 Commits

Author SHA1 Message Date
John Crispin
b7e4c8d3bf lantiq: Print the status register whenever an error occurs 
This should help finding potential problems with the SPI driver.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

SVN-Revision: 47209
 2015-10-19 10:08:29 +00:00
John Crispin
2c7d536780 lantiq: Fixed reading the number of RX FIFOs in the SPI driver 
Until now the SPI driver used the TX bits for the RX FIFO. This seems
uncritical for now since both are equals on my devices (VR9), but this
could cause problems on other SoCs.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

SVN-Revision: 47208
 2015-10-19 10:08:18 +00:00
John Crispin
826b461427 lantiq: add 3.18 support 
Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 44348
 2015-02-09 12:13:25 +00:00