The default delays RXD 3. RDV 3, TXD 0, TXE 0 doesn't seem to work for some
boards. These boards depend on the preset values of u-boot which may
differ.
This reverts commit f2d4bb96b62512caa161dcc2867c91692fb16a38.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49071
The MR1750 must unset some bits in ETH_CFG which were set by u-boot to work
correctly under OpenWrt. But the global function
ath79_setup_qca955x_eth_cfg will not unset all of them to increase the
backward compatiblity with older mach-* files. A private (simplified)
version for MR1750 can be used instead.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49070
The MR900 must unset some bits in ETH_CFG which were set by u-boot to work
correctly under OpenWrt. But the global function
ath79_setup_qca955x_eth_cfg will not unset all of them to increase the
backward compatiblity with older mach-* files. A private (simplified)
version for MR900 can be used instead.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49069
Fix for invalid/random WLAN MAC address in WNR1000v2. Permanent platform
MAC is calculated and assigned during system startup. WLAN MAC follows
wired Ethernet interface addresses. This is the same fix as for WNR2000v3
and WNR612v2.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 49051
The delays of PHY/MAC on the MR1750 are done by u-boot and OpenWrt in
different ways. u-boot only modifies the ETH_CFG of the QCA955x based on
the link speed. But OpenWrt can only modify the PHY delays based on the
link speed.
This can lead to communication problems when u-boot initializes the ETH_CFG
for a specific link speed (e.g. 10BASE-T) but then OpenWrt the sets the PHY
delays to an incompatible value.
Instead reset the ETH_CFG delay bits of the QCA955x to a specific value and
only rely on the AT803x PHY settings.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49031
The delays of PHY/MAC on the MR900 are done by u-boot and OpenWrt in
different ways. u-boot only modifies the ETH_CFG of the QCA955x based on
the link speed. But OpenWrt can only modify the PHY delays based on the
link speed.
This can lead to communication problems when u-boot initializes the ETH_CFG
for a specific link speed (e.g. 10BASE-T) but then OpenWrt the sets the PHY
delays to an incompatible value.
Instead reset the ETH_CFG delay bits of the QCA955x to a specific value and
only rely on the AT803x PHY settings.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49030
Some u-boot versions for QCA955x change the delays based on the link speed
during boot. This usually breaks the support of other linkspeeds when
OpenWrt is booted. It also conflicts with the
at803x_platform_data::fixup_rgmii_tx_delay. OpenWrt has to set its own
values in QCA955X_GMAC_REG_ETH_CFG.
The default RGMII values from the Atheros u-boot are currently used to
preset the existing mach files. These may have to be adjusted for boards
using different values but which are not currently set them explicitely in
OpenWrt.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Christian Beier <cb@shoutrlabs.com>
Cc: Chris R Blake <chrisrblake93@gmail.com>
Cc: Benjamin Berg <benjamin@sipsolutions.net>
Cc: Heiner Kallweit <hkallweit1@gmail.com>
Cc: Cezary Jackiewicz <cezary.jackiewicz@gmail.com>
Cc: Matthias Schiffer <mschiffer@universe-factory.net>
Cc: Dirk Neukirchen <dirkneukirchen@web.de>
Cc: Christian Mehlis <christian@m3hlis.de>
Cc: Luka Perkov <luka@openwrt.org>
Cc: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 49029
Some u-boot versions for QCA955x set currently not cleared bits depending
on the used link speed. This breaks the rx/tx under OpenWrt. The mach-*.c
file is responsible to select the correct configuration bits and thus the
ath79_setup_qca955x_eth_cfg has to clear the unset.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49028
Complete internal switch initialization for QCA956X.
Set default mdio device if the interface mode of GE0 is not SGMII (fix ticket #21520).
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
SVN-Revision: 48937
This patch provides full GPIO support for WNR612v2 (LEDs and buttons).
It exposes all LEDs to operating system, including Ethernet ones.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 48924
This patch provides full GPIO support for WNR2000v3 (LEDs and buttons).
It exposes all LEDs to operating system, including Ethernet ones.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 48922
Enable platform-supplied WLAN LED name for ath9k device.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
Acked-by: Hartmut Knaack <knaack.h@gmx.de>
SVN-Revision: 48879
Fix for invalid/random WLAN MAC address in WNR612v2. Permanent platform
MAC is calculated and assigned during system startup. WLAN MAC follows
wired Ethernet interface addresses. This is the same fix as for WNR2000v3.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 48779
Fix for invalid/random WLAN MAC address in WNR2000v3. Permanent platform
MAC is calculated and assigned during system startup. WLAN MAC follows
wired Ethernet interface addresses.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 48777
This patch adds support for the Bitmain Antrouter R1
http://wiki.openwrt.org/toh/bitmain/r1
Signed-off-by: L. D. Pinney <ldpinney@gmail.com>
SVN-Revision: 48058
In r45970 the MAC swap handling was made opt-in, however some boards
have been forgotten during the conversion. Since the reference design
uses this MAC swapping, and pretty much all known boards using this chip
seem to do so too, enabling the swapping is a more reasonable default
than leaving it disabled.
Change the code to still allow boards to opt-out of this.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 47956
The following patch is to add ath79_register_m25p80_large, which sets
is_flash to false to support bit banging. This is needed on some 32MB+
SPI chips, such as the S25FL256S1
Signed-off-by: Chris R Blake <chrisrblake93@gmail.com>
SVN-Revision: 47952
Kernel part of support for the PowerCloud Systems CR5000. The
CR5000 is a dual-band 802.11n wireless router with 8MB flash,
64 MB RAM, (unused in stock firmware) USB 2.0 port, and five
port gigabit ethernet switch. The CR5000 was sold as hardware for
the Skydog cloud-managed router service.
Signed-off-by: Daniel Dickinson <openwrt@daniel.thecshore.com>
SVN-Revision: 47940
Kernel part of support for PowerCloud CR3000. The CR3000 is
a 802.11n 2.4 GHz wireless router with 8MB flash, 64MB RAM,
a four port fast ethernet switch, and a fast ethernet wan port which
was sold by PowerCloud Systems as hardware for the Skydog
cloud-managed router service.
Signed-off-by: Daniel Dickinson <openwrt@daniel.thecshore.com>
SVN-Revision: 47939
Kernel part of support for PowerCloud CAP324 Cloud AP.
The CAP324 Cloud AP was a device sold by PowerCloud Systems as hardware for
the CloudCommand service for 'cloud' based managment of large numbers
access points.
The CAP324 is a dual-band 802.11n wireless access point with 16MB flash
and 128MB RAM and single gigabit ethernet port. It can be powered via PoE
or a power adaptor.
Signed-off-by: Daniel Dickinson <openwrt@daniel.thecshore.com>
SVN-Revision: 47938
This patch adds support for Cisco's MR18.
Detailed instructions for the flashing the device can
be found in the OpenWrt forum thread:
<https://forum.openwrt.org/viewtopic.php?id=59248>
Signed-off-by: Chris R Blake <chrisrblake93@gmail.com>
SVN-Revision: 47878
This is based on patches from Federico Fissore <f.fissore@arduino.cc>
especially this one:
7e2976fa83
The console is running with 250000 baud which is a non standard baud
rate and needs an extra patch to be applied, I will try to get this
patch upstream or something else which accomplish the same.
Some upstream code looks like there are many different versions of this
SoC, are these only internal versions and all versions on the consumer
market are the same? I saw different GPIO configuration and flash sizes
of 8MB and 16MB?
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 47451
The international version is completely different from the already
supported Chinese version. The WLAN of the QCA956x SoC used by this router
has been fixed in r46948.
This patch looks like it changes a lot in
700-MIPS-ath79-openwrt-machines.patch; that is not the case. Unfortunately,
quilt decided to completely reorganize the Kconfig patch even though only
a single section has been added.
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
SVN-Revision: 47420
Antminers using the stock bootloader will not hash without this GPIO set.
Applies to DD and CC
Signed-off-by: L. D. Pinney <ldpinney@gmail.com>
SVN-Revision: 47261
