The current support for MikroTik NAND-based devices relies on a
gross hack that packs the kernel into a static YAFFS stub, as the
stock bootloader only supports booting a YAFFS-encapsulated kernel.
The problem with this approach is that since the kernel partition is
blindly overwritten without any kind of wear or badblock management
(due to lack of proper support for YAFFS in OpenWRT), the NAND flash
is not worn uniformly and eventually badblocks appear, leading to
unbootable devices.
This issue has been reported here [1] and discussed in more detail
here [2].
[1] https://forum.openwrt.org/t/rb433-bad-sector-cannot-start-openwrt/71519
[2] https://github.com/openwrt/openwrt/pull/3026#issuecomment-673597461
Until a proper fix is found (or the stock bootloader supports other
filesystems), we disable building these images to prevent unknowing
users from risking their devices.
Thanks to Thibaut Varène for summarizing the details above.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
A few devices in ath79 and ramips use mtd-concat to concatenate
individual partitions into a bigger "firmware" or "ubi" partition.
However, the original partitions are still present and visible,
and one can write to them directly although this might break the
actual virtual, concatenated partition.
As we cannot do much about the former, let's at least choose more
descriptive names than just "firmwareX" in order to indicate the
concatenation to the user. He might be less tempted into overwriting
a "fwconcat1" than a "firmware1", which might be perceived as an
alternate firmware for dual boot etc.
This applies the new naming consistently for all relevant devices,
i.e. fwconcatX for virtual "firmware" members and ubiconcatX for
"ubi" members.
While at it, use DT labels and label property consistently, and
also use consistent zero-based indexing.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Otherwise the missing symbol is added to target config for every kernel
config refresh.
While at it, remove the disabled symbol from target configs.
Fixes: 4943bc5cff ("kernel: only strip proc for small flash devices")
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Since generic has the option set to y and other targets now inherit that
choice, there is no behaviour change
Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
The option was introduced in upstream linux commit a6484045 ("[TCP]: Do
not present confusing congestion control options by default.").
The option is set to y in generic config and to the moment does not
incur additional size increment. Make it y for all so that packages
such as kmod-tcp-bbr do not have to set it on every occasion
Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
Specifications:
SOC: Qualcomm IPQ4018 (DAKOTA) ARM Quad-Core
RAM: 256 MiB
FLASH1: 4 MiB NOR
FLASH2: 128 MiB NAND
ETH: Qualcomm QCA8075
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11b/g/n 2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11n/ac W2 2x2
INPUT: Reset
LED: Power, Internet
UART1: On board pin header near to LED (3.3V, TX, RX, GND), 3.3V without pin - 115200 8N1
OTHER: On board with BLE module - by cp210x USB serial chip
On board hareware watchdog with GPIO0 high to turn on, and GPIO4 for watchdog feed
Install via uboot tftp or uboot web failsafe.
By uboot tftp:
(IPQ40xx) # tftpboot 0x84000000 openwrt-ipq40xx-generic-glinet_gl-ap1300-squashfs-nand-factory.ubi
(IPQ40xx) # run lf
By uboot web failsafe:
Push the reset button for 10 seconds util the power led flash faster,
then use broswer to access http://192.168.1.1
Afterwards upgrade can use sysupgrade image.
Signed-off-by: Dongming Han <handongming@gl-inet.com>
This commit adds support for Qualcomm IPQ8062 SoC.
IPQ8062 is a lower clock variant of IPQ8064.
CPU and NSS clocks:
- CPU: 384 MHz - 1 GHz
- NSS: 110 MHz - 550 MHz
opp and l2 clock values are taken from WG2600HP3 GPL source code [1].
Due to a lack of devices, I didn't test the following features.
- SATA
- NAND flash memory controller
- SD
- USB
- GSBI2, GSBI7
- PCIE2
- GMAC0, GMAC3
Works properly:
- GSBI4 UART
- GSBI5 SPI
- GMAC1, GMAC2
- PCIE0, PCIE1
- MDIO0
Does not work properly:
- CPU SPC
- This can cause a system hang. Same as IPQ8065.
See 2336c2dbb1
[1] https://www.aterm.jp/function/wg2600hp3/appendix/opensource.html
Signed-off-by: Yanase Yuki <dev@zpc.sakura.ne.jp>
The Makefile is rejecting all files with for a given prefix (here
"board-plasmacloud_pa2200") when it didn't match a known suffix. Instead it
stops the build with an error like:
Makefile:135: *** Unrecognized board-file suffix '.ipq4019' for 'board-plasmacloud_pa2200.ipq4019'. Stop.
The correct suffix for the QCA4019/hw1.0 is qca4019 and not ipq4019.
Fixes: 4871fd2616 ("ipq40xx: add support for Plasma Cloud PA2200")
Signed-off-by: Sven Eckelmann <sven@narfation.org>
The Makefile is rejecting all files with for a given prefix (here
"board-plasmacloud_pa1200") when it didn't match a known suffix. Instead it
stops the build with an error like:
Makefile:135: *** Unrecognized board-file suffix '.ipq4019' for 'board-plasmacloud_pa1200.ipq4019'. Stop.
The correct suffix for the QCA4019/hw1.0 is qca4019 and not ipq4019.
Fixes: ea5bb6bbfe ("ipq40xx: add support for Plasma Cloud PA1200")
Signed-off-by: Sven Eckelmann <sven@narfation.org>
FCC ID: U2M-EAP350
Engenius EAP350 is a wireless access point with 1 gigabit PoE ethernet port,
2.4 GHz wireless, external ethernet switch, and 2 internal antennas.
Specification:
- AR7242 SOC
- AR9283 WLAN (2.4 GHz, 2x2, PCIe on-board)
- AR8035-A switch (GbE with 802.3af PoE)
- 40 MHz reference clock
- 8 MB FLASH MX25L6406E
- 32 MB RAM EM6AA160TSA-5G
- UART at J2 (populated)
- 3 LEDs, 1 button (power, eth, 2.4 GHz) (reset)
- 2 internal antennas
MAC addresses:
MAC address is labeled as "MAC"
Only 1 address on label and in flash
The OEM software reports these MACs for the ifconfig
eth0 MAC *:0c art 0x0
phy0 --- *:0d ---
Installation:
2 ways to flash factory.bin from OEM:
- if you get Failsafe Mode from failed flash:
only use it to flash Original firmware from Engenius
or risk kernel loop or halt which requires serial cable
Method 1: Firmware upgrade page:
OEM webpage at 192.168.10.1
username and password "admin"
Navigate to "Upgrade Firmware" page from left pane
Click Browse and select the factory.bin image
Upload and verify checksum
Click Continue to confirm and wait 3 minutes
Method 2: Serial to load Failsafe webpage:
After connecting to serial console and rebooting...
Interrupt uboot with any key pressed rapidly
execute `run failsafe_boot` OR `bootm 0x9f670000`
wait a minute
connect to ethernet and navigate to
"192.168.1.1/index.htm"
Select the factory.bin image and upload
wait about 3 minutes
Return to OEM:
If you have a serial cable, see Serial Failsafe instructions
otherwise, uboot-env can be used to make uboot load the failsafe image
*DISCLAIMER*
The Failsafe image is unique to Engenius boards.
If the failsafe image is missing or damaged this will not work
DO NOT downgrade to ar71xx this way, it can cause kernel loop or halt
ssh into openwrt and run
`fw_setenv rootfs_checksum 0`
reboot, wait 3 minutes
connect to ethernet and navigate to 192.168.1.1/index.htm
select OEM firmware image from Engenius and click upgrade
Format of OEM firmware image:
The OEM software of EAP350 is a heavily modified version
of Openwrt Kamikaze. One of the many modifications
is to the sysupgrade program. Image verification is performed
simply by the successful ungzip and untar of the supplied file
and name check and header verification of the resulting contents.
To form a factory.bin that is accepted by OEM Openwrt build,
the kernel and rootfs must have specific names...
openwrt-senao-eap350-uImage-lzma.bin
openwrt-senao-eap350-root.squashfs
and begin with the respective headers (uImage, squashfs).
Then the files must be tarballed and gzipped.
The resulting binary is actually a tar.gz file in disguise.
This can be verified by using binwalk on the OEM firmware images,
ungzipping then untaring.
The OEM upgrade script is at /etc/fwupgrade.sh
Later models in the EAP series likely have a different platform
and the upgrade and image verification process differs.
OKLI kernel loader is required because the OEM software
expects the kernel to be no greater than 1024k
and the factory.bin upgrade procedure would
overwrite part of the kernel when writing rootfs.
Note on PLL-data cells:
The default PLL register values will not work
because of the external AR8035-A switch between
the SOC and the ethernet PHY chips.
For AR724x series, the PLL register for GMAC0
can be seen in the DTSI as 0x2c.
Therefore the PLL register can be read from uboot
for each link speed after attempting tftpboot
or another network action using that link speed
with `md 0x1805002c 1`.
uboot did not have a good value for 1 GBps
so it was taken from other similar DTS file.
Tested from master, all link speeds functional
Signed-off-by: Michael Pratt <mcpratt@pm.me>
FCC ID: A8J-EAP600
Engenius EAP600 is a wireless access point with 1 gigabit ethernet port,
dual-band wireless, external ethernet switch, 4 internal antennas
and 802.3af PoE.
Specification:
- AR9344 SOC (5 GHz, 2x2, WMAC)
- AR9382 WLAN (2.4 GHz, 2x2, PCIe on-board)
- AR8035-A switch (GbE with 802.3af PoE)
- 40 MHz reference clock
- 16 MB FLASH MX25L12845EMI-10G
- 2x 64 MB RAM NT5TU32M16DG
- UART at H1 (populated)
- 5 LEDs, 1 button (power, eth, 2.4 GHz, 5 GHz, wps) (reset)
- 4 internal antennas
MAC addresses:
MAC addresses are labeled MAC1 and MAC2
The MAC address in flash is not on the label
The OEM software reports these MACs for the ifconfig
eth0 MAC 1 *:5e ---
phy1 MAC 2 *:5f --- (2.4 GHz)
phy0 ----- *:60 art 0x0 (5 GHz)
Installation:
2 ways to flash factory.bin from OEM:
- if you get Failsafe Mode from failed flash:
only use it to flash Original firmware from Engenius
or risk kernel loop or halt which requires serial cable
Method 1: Firmware upgrade page:
OEM webpage at 192.168.1.1
username and password "admin"
Navigate to "Upgrade Firmware" page from left pane
Click Browse and select the factory.bin image
Upload and verify checksum
Click Continue to confirm and wait 3 minutes
Method 2: Serial to load Failsafe webpage:
After connecting to serial console and rebooting...
Interrupt uboot with any key pressed rapidly
execute `run failsafe_boot` OR `bootm 0x9fdf0000`
wait a minute
connect to ethernet and navigate to
"192.168.1.1/index.htm"
Select the factory.bin image and upload
wait about 3 minutes
Return to OEM:
If you have a serial cable, see Serial Failsafe instructions
otherwise, uboot-env can be used to make uboot load the failsafe image
*DISCLAIMER*
The Failsafe image is unique to Engenius boards.
If the failsafe image is missing or damaged this will not work
DO NOT downgrade to ar71xx this way, it can cause kernel loop or halt
ssh into openwrt and run
`fw_setenv rootfs_checksum 0`
reboot, wait 3 minutes
connect to ethernet and navigate to 192.168.1.1/index.htm
select OEM firmware image from Engenius and click upgrade
Format of OEM firmware image:
The OEM software of EAP600 is a heavily modified version
of Openwrt Kamikaze. One of the many modifications
is to the sysupgrade program. Image verification is performed
simply by the successful ungzip and untar of the supplied file
and name check and header verification of the resulting contents.
To form a factory.bin that is accepted by OEM Openwrt build,
the kernel and rootfs must have specific names...
openwrt-senao-eap600-uImage-lzma.bin
openwrt-senao-eap600-root.squashfs
and begin with the respective headers (uImage, squashfs).
Then the files must be tarballed and gzipped.
The resulting binary is actually a tar.gz file in disguise.
This can be verified by using binwalk on the OEM firmware images,
ungzipping then untaring.
The OEM upgrade script is at /etc/fwupgrade.sh
Later models in the EAP series likely have a different platform
and the upgrade and image verification process differs.
OKLI kernel loader is required because the OEM software
expects the kernel to be no greater than 1536k
and the factory.bin upgrade procedure would
overwrite part of the kernel when writing rootfs.
Note on PLL-data cells:
The default PLL register values will not work
because of the external AR8035-A switch between
the SOC and the ethernet PHY chips.
For AR934x series, the PLL register for GMAC0
can be seen in the DTSI as 0x2c.
Therefore the PLL register can be read from uboot
for each link speed after attempting tftpboot
or another network action using that link speed
with `md 0x1805002c 1`.
Unfortunately uboot did not have the best values
so they were taken from other similar DTS files.
Tested from master, all link speeds functional
Signed-off-by: Michael Pratt <mcpratt@pm.me>
The boards have equivalent hardware except for LEDs
and equivalent device config except for MACs
also use naming convention for mtd-concat partitions
to prepare for upcoming patch
"treewide: use more descriptive names for concatenated partitions"
Signed-off-by: Michael Pratt <mcpratt@pm.me>
FCC ID: A8J-ECB600
Engenius ECB600 is a wireless access point with 1 gigabit PoE ethernet port,
dual-band wireless, external ethernet switch, and 4 external antennas.
Specification:
- AR9344 SOC (5 GHz, 2x2, WMAC)
- AR9382 WLAN (2.4 GHz, 2x2, PCIe on-board)
- AR8035-A switch (GbE with 802.3af PoE)
- 40 MHz reference clock
- 16 MB FLASH MX25L12845EMI-10G
- 2x 64 MB RAM NT5TU32M16DG
- UART at H1 (populated)
- 4 LEDs, 1 button (power, eth, 2.4 GHz, 5 GHz) (reset)
- 4 external antennas
MAC addresses:
MAC addresses are labeled MAC1 and MAC2
The MAC address in flash is not on the label
The OEM software reports these MACs for the ifconfig
phy1 MAC 1 *:52 --- (2.4 GHz)
phy0 MAC 2 *:53 --- (5 GHz)
eth0 ----- *:54 art 0x0
Installation:
2 ways to flash factory.bin from OEM:
- if you get Failsafe Mode from failed flash:
only use it to flash Original firmware from Engenius
or risk kernel loop or halt which requires serial cable
Method 1: Firmware upgrade page:
OEM webpage at 192.168.1.1
username and password "admin"
Navigate to "Upgrade Firmware" page from left pane
Click Browse and select the factory.bin image
Upload and verify checksum
Click Continue to confirm and wait 3 minutes
Method 2: Serial to load Failsafe webpage:
After connecting to serial console and rebooting...
Interrupt uboot with any key pressed rapidly
execute `run failsafe_boot` OR `bootm 0x9fdf0000`
wait a minute
connect to ethernet and navigate to
"192.168.1.1/index.htm"
Select the factory.bin image and upload
wait about 3 minutes
Return to OEM:
If you have a serial cable, see Serial Failsafe instructions
otherwise, uboot-env can be used to make uboot load the failsafe image
*DISCLAIMER*
The Failsafe image is unique to Engenius boards.
If the failsafe image is missing or damaged this will not work
DO NOT downgrade to ar71xx this way, it can cause kernel loop or halt
ssh into openwrt and run
`fw_setenv rootfs_checksum 0`
reboot, wait 3 minutes
connect to ethernet and navigate to 192.168.1.1/index.htm
select OEM firmware image from Engenius and click upgrade
Format of OEM firmware image:
The OEM software of ECB600 is a heavily modified version
of Openwrt Kamikaze. One of the many modifications
is to the sysupgrade program. Image verification is performed
simply by the successful ungzip and untar of the supplied file
and name check and header verification of the resulting contents.
To form a factory.bin that is accepted by OEM Openwrt build,
the kernel and rootfs must have specific names...
openwrt-senao-ecb600-uImage-lzma.bin
openwrt-senao-ecb600-root.squashfs
and begin with the respective headers (uImage, squashfs).
Then the files must be tarballed and gzipped.
The resulting binary is actually a tar.gz file in disguise.
This can be verified by using binwalk on the OEM firmware images,
ungzipping then untaring.
The OEM upgrade script is at /etc/fwupgrade.sh
Later models in the ECB series likely have a different platform
and the upgrade and image verification process differs.
OKLI kernel loader is required because the OEM software
expects the kernel to be no greater than 1536k
and the factory.bin upgrade procedure would
overwrite part of the kernel when writing rootfs.
Note on PLL-data cells:
The default PLL register values will not work
because of the external AR8035-A switch between
the SOC and the ethernet PHY chips.
For AR934x series, the PLL register for GMAC0
can be seen in the DTSI as 0x2c.
Therefore the PLL register can be read from uboot
for each link speed after attempting tftpboot
or another network action using that link speed
with `md 0x1805002c 1`.
Unfortunately uboot did not have the best values
so they were taken from other similar DTS files.
Tested from master, all link speeds functional
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Commit 5fc28ef479 ("ath79: Add support for Plasma Cloud PA300")
added the IMAGE/sysupgrade.bin/squashfs definition, which leaks into
other devices, resulting in sysupgrade.bin images that are actually
tarballs and do not boot when directly written to flash.
We can use the normal sysupgrade.bin command variable for this device.
Signed-off-by: Sven Wegener <sven.wegener@stealer.net>
[fix format, spelling]
Signed-off-by: David Bauer <mail@david-bauer.net>
b75bcad dhcpv6-ia: remove assignment equal to 0 checks
d1ae052 dhcpv6-ia: fix logic to include IA_PD prefix with lifetimes set to 0
9d5e379 dhcpv6-ia: fix prefix delegation behavior
Signed-off-by: Hans Dedecker <dedeckeh@gmail.com>
The image never worked in any release and is also broken in snapshots
due to stock bootloader not loading more than 4 MiB.
Hence it's better to remove the image for now, users who want to flash
OpenWrt on new devices may build LEDE 17.01 with everything possible
disabled to get a small enough and working factory image.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Lets use the generic upstream phy_print_status() instead of doing
something similar by hand.
Before:
ess_edma c080000.edma: eth1: GMAC Link is up with phy_speed=1000
After:
ess_edma c080000.edma eth1: Link is Up - 1Gbps/Full - flow control rx/tx
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Since we now have a proper PHY driver for QCA807x and AR803x has already
been supported properly there is no need for the driver to be poking
on PHY registers for ethtool ops.
So, lets simply use the generic
phy_ethtool_ksettings_get/phy_ethtool_ksettings_set functions.
This also has the advantage of properly populating stuff other than
speeds like, transceiver type, MDI-X etc.
ethtool before:
root@OpenWrt:/# ethtool eth1
Settings for eth1:
Supported ports: [ TP MII ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
1000baseX/Full
Supported pause frame use: Symmetric Receive-only
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
1000baseX/Full
Advertised pause frame use: Symmetric Receive-only
Advertised auto-negotiation: Yes
Advertised FEC modes: Not reported
Link partner advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
Link partner advertised pause frame use: No
Link partner advertised auto-negotiation: No
Link partner advertised FEC modes: Not reported
Speed: 1000Mb/s
Duplex: Full
Port: Twisted Pair
PHYAD: 4
Transceiver: internal
Auto-negotiation: on
MDI-X: Unknown
Supports Wake-on: d
Wake-on: d
Current message level: 0x00000000 (0)
Link detected: yes
ethtool after:
root@OpenWrt:/# ethtool eth1
Settings for eth1:
Supported ports: [ TP MII ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
1000baseX/Full
Supported pause frame use: Symmetric Receive-only
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
1000baseX/Full
Advertised pause frame use: Symmetric Receive-only
Advertised auto-negotiation: Yes
Advertised FEC modes: Not reported
Link partner advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
Link partner advertised pause frame use: Symmetric Receive-only
Link partner advertised auto-negotiation: Yes
Link partner advertised FEC modes: Not reported
Speed: 1000Mb/s
Duplex: Full
Port: Twisted Pair
PHYAD: 4
Transceiver: external
Auto-negotiation: on
MDI-X: off (auto)
Supports Wake-on: d
Wake-on: d
Current message level: 0x00000000 (0)
Link detected: yes
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Since the new PHY driver manages each PHY individually and therefore
registers each PHY that is marked with gpio-controller; DT property as a
GPIO controller we need to convert old DT bindings to account for this.
Only 2 boards use this so its not much of an issue.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
This adds necessary DT properties for QCA807x PHY-s to IPQ4019 DTSI.
Also adds the PSGMII PHY as it wont get probed otherwise.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
PHY needs to be soft reset before starting it from ethernet driver as
AR40xx calibration will leave it in unwanted state.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Since we now have proper PHY driver for the QCA807x PHY-s, lets remove
PHY handling from AR40xx.
This removes PHY driver, PHY GPIO driver and PHY init code.
AR40xx still needs to handle PSGMII calibration as that requires R/W
from the switch, so I am unable to move it into PHY driver.
This also converted the AR40xx driver to use OF_MDIO to find the MDIO
bus as it now cant be set through the PHY driver.
So lets depend on OF_MDIO in KConfig.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s.
They are 2 or 5 port IEEE 802.3 clause 22 compliant
10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s.
They feature 2 SerDes, one for PSGMII or QSGMII connection with MAC,
while second one is SGMII for connection to MAC or fiber.
Both models have a combo port that supports 1000BASE-X and 100BASE-FX
fiber.
Each PHY inside of QCA807x series has 2 digitally controlled output only
pins that natively drive LED-s.
But some vendors used these to driver generic LED-s controlled by
user space, so lets enable registering each PHY as GPIO controller and
add driver for it.
This also adds the ability to specify DT properties so that 1000 Base-T
LED will also be lit up for 100 and 10 Base connections.
This is usually done by U-boot, but boards running mainline U-boot are
not configuring this yet.
These PHY-s are commonly used in Qualcomm IPQ40xx, IPQ60xx and IPQ807x
boards.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
With the reworked MDIO driver, EDMA will fail to get the MII BUS as it
used the MII BUS stored inside the MDIO structure private data.
This obviously does not work with the modernized driver, so lets switch
to using a purpose build of_mdio_find_bus() which will return the MII
BUS and only requires the MDIO node to be passed.
This is easy as we already have the node parsed.
Also, since we now require OF_MDIO add that as dependency.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
IPQ40xx MDIO driver was upstreamed in kernel version 5.8.
So lets backport the upstream version and drop our local one.
This also refreshed the kernel config since the symbol name has changed.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
As of hostapd upstream commit 7d2ed8ba "Remove CONFIG_IEEE80211W build parameter"
https://w1.fi/cgit/hostap/commit?id=7d2ed8bae86a31dd2df45c24b3f7281d55315482
802.11w feature is always enabled in the build time.
It doesn't make sense to opt-in 802.11w per driver as hostapd will always
be compiled with this feature enabled.
As suggested by Hauke Mehrtens, for now keep 11w enabled in build_features.h
for compatibility reasons. This option will be dropped when LuCI is adjusted.
Signed-off-by: Dobroslaw Kijowski <dobo90@gmail.com>
Without this change no libc is selected and the build will fail. This
will select glibc for ARC CPUs.
Fixes: 95f1002aca ("toolchain: default to glibc for ARC")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
ELECOM WRC-1167GST2 is a 2.4/5 GHz band 11ac (Wi-Fi 5) router, based
on MT7621A.
Specification:
- SoC : MediaTek MT7621A
- RAM : DDR3 256 MiB
- Flash : SPI-NOR 32 MiB
- WLAN : 2.4/5 GHz 2T2R (MediaTek MT7615D)
- Ethernet : 10/100/1000 Mbps x5
- Switch : MediaTek MT7530 (SoC)
- LED/keys : 6x/6x (2x buttons, 1x slide-switch)
- UART : through-hole on PCB
- J4: 3.3V, GND, TX, RX from ethernet port side
- 57600n8
- Power : 12VDC, 1A
MAC addresses:
LAN : 04:AB:18:**:**:07 (Factory, 0xE000 (hex))
WAN : 04:AB:18:**:**:08 (Factory, 0xE006 (hex))
2.4 GHz : 04:AB:18:**:**:09 (none)
5 GHz : 04:AB:18:**:**:0A (none)
Flash instruction using factory image:
1. Boot WRC-1167GST2 normally
2. Access to "http://192.168.2.1/" and open firmware update page
("ファームウェア更新")
3. Select the OpenWrt factory image and click apply ("適用") button
4. Wait ~150 seconds to complete flashing
Notes:
- there is no way to configure the correct MAC address for secondary phy
(5GHz) on MT7615D
- Wi-Fi band on primary phy (2.4GHz) cannot be limitted by specifying
ieee80211-freq-limit
(fail to register secondary phy due to error)
- mtd-mac-address in the wifi node is required for using
mtd-mac-address-increment
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
[rebase onto split DTSI]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
ELECOM WRC-1167GS2-B is a 2.4/5 GHz band 11ac (Wi-Fi 5) router, based
on MT7621A.
Specification:
- SoC : MediaTek MT7621A
- RAM : DDR3 128 MiB
- Flash : SPI-NOR 16 MiB
- WLAN : 2.4/5 GHz 2T2R (MediaTek MT7615D)
- Ethernet : 10/100/1000 Mbps x5
- Switch : MediaTek MT7530 (SoC)
- LED/keys : 6x/6x (2x buttons, 1x slide-switch)
- UART : through-hole on PCB
- J4: 3.3V, GND, TX, RX from ethernet port side
- 57600n8
- Power : 12VDC, 1A
MAC addresses:
LAN : 04:AB:18:**:**:13 (Factory, 0xFFF4 (hex))
WAN : 04:AB:18:**:**:14 (Factory, 0xFFFA (hex))
2.4 GHz : 04:AB:18:**:**:15 (none)
5 GHz : 04:AB:18:**:**:16 (Factory, 0x4 (hex))
Flash instruction using factory image:
1. Boot WRC-1167GS2-B normally
2. Access to "http://192.168.2.1/" and open firmware update page
("ファームウェア更新")
3. Select the OpenWrt factory image and click apply ("適用") button
4. Wait ~120 seconds to complete flashing
Notes:
- there is no way to configure the correct MAC address for secondary phy
(5GHz) on MT7615D
- Wi-Fi band on primary phy (2.4GHz) cannot be limitted by specifying
ieee80211-freq-limit
(fail to register secondary phy due to error)
- mtd-mac-address in the wifi node is required for using
mtd-mac-address-increment
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
[rebase onto split DTSI patch]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This creates a dedicated DTSI for ELECOM WRC GS devices with 2 PCI
WiFi chips in preparation for the 1 chip - dual radio devices, so
the latter can reuse part of the common definitions.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This reverts commit b1952dc259 as it's
causing issues on the buildbot which uses some kind of ccache wrapper
and so the breakage needs to be investigated further:
bash: cmake: command not found
time: tools/ccache/compile#0.05#0.03#0.15
ERROR: tools/ccache failed to build.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
SOC: IPQ4018 / QCA Dakota
CPU: Quad-Core ARMv7 Processor rev 5 (v71) Cortex-A7
DRAM: 256 MiB
NOR: 32 MiB
ETH: Qualcomm Atheros QCA8075 (2 ports)
PLC: MaxLinear G.hn 88LX5152
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
INPUT: RESET, WiFi, PLC Button
LEDS: red/white home, white WiFi
To modify a retail device to run OpenWRT firmware:
1) Setup a TFTP server on IP address 192.168.0.100 and copy the OpenWRT
initramfs (initramfs-fit-uImage.itb) to the TFTP root as 'uploadfile'.
2) Power on the device while pressing the recessed reset button next to
the Ethernet ports. This causes the bootloader to retrieve and start
the initramfs.
3) Once the initramfs is booted, the device will come up with IP
192.168.1.1. You can then connect through SSH (allow some time for
the first connection).
4) On the device shell, run 'fw_printenv' to show the U-boot environment.
Backup this information since it contains device unique factory data.
5) Change the boot command to support booting OpenWRT:
# fw_setenv bootcmd 'sf probe && sf read 0x84000000 0x180000 0x400000 && bootm'
6) Change directory to /tmp, download the sysupgrade (e.g. through wget)
and install it with sysupgrade. The device will reboot into OpenWRT.
Notice that there is currently no support for booting the G.hn chip.
This requires userland software we lack the rights to share right now.
Signed-off-by: Stefan Schake <stefan.schake@devolo.de>
When hostapd gets restarted to often/quickly will cause procd to not restart it
anymore. it will think that hapd is in a crash loop.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name> [adjust respawn time]
Currently, you are not able to get statistics about IPv4 and IPv6
usage. This information can be collected via the snmp and snmp6.
However, in the current state this interface is disabled as you can
read in the "902-debloat_proc.patch":
"Strip non-essential /proc functionality to reduce code size"
Tools like netstat use the snmp/6 interface to collect interface
statistics. Some prometheus exporters also mention this:
- prometheus-collectors/netstat.lua
- prometheus-collectors/snmp6 (still a PR)
- collectd/snmp6 (still a PR)
PRs:
- https://github.com/collectd/collectd/pull/3789
- https://github.com/openwrt/packages/pull/14158
Instead of enabling it as default for all devices we condition it
default y if SMALL_FLASH
A test shows it needs around 16 kiB.
Signed-off-by: Nick Hainke <vincent@systemli.org>
[fixed whitespace issue]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
The Seagate BlackArmor NAS220 is a consumer NAS
with two internal drive bays. The stock OS runs
RAID 1 over the disks via mdadm.
Device specification:
- SoC: Marvell 88F6192 800 MHz
- RAM: 128 MB
- Flash: 32 MB
- 2 x internal SATA II drives
- Ethernet: 10/100/1000 Mbps (single port, no switch)
- WLAN: None
- LED: Power, Status, Sata Activity
- Key: Power, Reset
- Serial: 10 pin header, (115200,8,N,1), 3.3V TTL
9|x - x|10
7|x - x|8
5|x - GND|6
3|x - RX|4
1|TX - x|2
front of case
- USB ports: 2 x USB 2.0
Flash instruction:
NOTE: this process uses a serial connection. It will upgrade the
bootloader and reset the bootloader environment variables
TFTP server setup
- Setup PC with TFTP server set the PC IP to 10.4.50.5 as TFTP server
- Copy these files to TFTP server location
- u-boot.kwb
- seagate_blackarmor-nas220-initramfs-uImage
- seagate_blackarmor-nas220-squashfs-sysupgrade.bin
- seagate_blackarmor-nas220-squashfs-factory.bin
Seagate NAS setup
- Connect LAN cable between PC and seagate device
- Connect to serial to seagate device
Install u-boot
- Boot seagate device and stop in bootloader by pressing any key
- run 'printenv' from u-boot and save the values
- tftpboot 0x2000000 u-boot.kwb
- nand erase.part uboot
- nand write 0x2000000 0x0 ${filesize}
- reset
Update MAC address in u-boot env
- Stop in u-boot by pressing any key
- Get your MAC address from your saved printenv. Is also on chassis
- setenv ethaddr <your MAC>
- saveenv
Option 1 (recommended) - Install OpenWrt via initramfs and sysupgrade
- tftpboot 0x2000000 seagate_blackarmor-nas220-initramfs-uImage
- bootm 0x2000000
- *OpenWrt should be running now, however it is not written to flash yet*
- From the running instance of OpenWrt use Luci's "flash image" feature
from the web site or use sysupgrade from the console to write
seagate_blackarmor-nas220-squashfs-sysupgrade.bin to flash
Option 2 - Install OpenWrt by flashing factory image from u-boot
- nand erase.part ubi
- tftpboot 0x2000000 seagate_blackarmor-nas220-squashfs-factory.bin
- nand write 0x2000000 ubi ${filesize}
- reset
Signed-off-by: Kip Porterfield <kip.porterfield@gmail.com>
The ASRock G10 is a 2.4/5 GHz band 11ac "Gaming" router,
based on Qualcomm IPQ8064.
Specifications:
SoC: Qualcomm IPQ8064
CPU: Dual-Core A15 @ (384 - 1,400 MHz, 2C2T)
DRAM: 512 MiB (~467 MiB available)
NAND: 128 MB (Micron MT29F1G08ABBEAH4)
WLAN0: 4T4R 5 GHz Wlan (QCA9980)
WLAN1: 4T4R 2.4 GHz Wlan (QCA9980)
ETH: 5x 10/100/1000 Mbps Ethernet (QCA8337)
INPUT: Reset Button, WPS 2.4G and WPS 5G Button
LEDS: 1 multicolor status LED
USB: 2x USB 3.0 Type-A
POWER: 12VDC/3A AC Adapter + dedicated Power Switch
UART: Setting is 115200-8-N-1. 1x4 .1" unpopulated header
on the PCB (J6 - very tiny silkscreen next to TX).
Pinout: 1. 3v3 (Square - best skipped!), 2. RX, 3. GND, 4. TX
WARNING: The serial port needs a TTL/RS-232 3.3v level converter!
(Depending on the serial adapter RX and TX might need to
be swapped).
Note about the IR-Remote:
There's a 8-Bit MCU (SONIX SN8F25E21SG) which is controlling the
IR-Remote and is fed by the IR-Photodiode. The SoC can talk to
the device via I2C. The vendor's GPL archive comes with the source
of the interface driver for this as a (character driver), the main
control software is however a blob.
Installation Instructions:
1. Download factory image to disk
2. Apply factory image via stock web-gui
Back to stock:
1. Login to router via ssh
2. run "asrock_g10_back_to_factory" script from /sbin
Notes:
- If something goes wrong durring sysupgrade, router will go back to
factory image.
- Asrock G10 uses partition layout from smem. So partition layout can
be normal or alternate.
- 900-arm-add-cmdline-override.patch was copied from 102-powerpc-add-cmdline-override.patch
from powerpc target.
Knowledge about BOOTCONFIG partition was based on user "jmomo" post from old
OpenWrt forum (Post #50):
https://forum.archive.openwrt.org/viewtopic.php?id=65956&p=2
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[bump to 5.4, add factory image, fix sysupgrade, convert partition
layout to smem, remove ipq-wifi-asrock-g10 and use ART, minor fixes]
Co-Authored-by: Pawel Dembicki <paweldembicki@gmail.com>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Tested-by: Lukasz Ostapiuk <palibrzuch@gmail.com>
Newer EnGenius software that still uses the tar.gz platform
instead of the custom header requires more checks for upgrading,
but their script includes a way to skip them...
the existence of a file in the tar.gz called failsafe.bin
Their upgrade script has these lines:
\#pass check when upload with full image file
[ "${errcode}" -eq "1" ] && [ -f failsafe.bin ] && errcode="0"
This overrides the script's "errcode" variable
which can be set if any of the following actions/checks fail:
- untarring of the upload
- magic number for kernel: "2705"
- magic num for rootfs: "7371" or "6873"
- md5sums for each file in the format
filename:md5
- existence of a file matching FWINFO*
that it has boardname in the name somewhere (grep)
that the 4th field of separator "-" is at least 3 (version)
Otherwise we would need to generate md5sums in this strange format
and touch a file with specific requirements in the name.
This does not effect boards where the advanced checks do not apply.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
[fixed SoB to match From:]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
FCC ID: A8J-ENSTAC
Engenius EnStationAC v1 is an outdoor wireless access point/bridge with
2 gigabit ethernet ports on 2 external ethernet switches,
5 GHz only wireless, internal antenna plates, and proprietery PoE.
Specification:
- QCA9557 SOC
- QCA9882 WLAN (PCI card, 5 GHz, 2x2, 26dBm)
- AR8035-A switch (RGMII GbE with PoE+ IN)
- AR8031 switch (SGMII GbE with PoE OUT)
- 40 MHz reference clock
- 16 MB FLASH MX25L12845EMI-10G
- 2x 64 MB RAM NT5TU32M16FG
- UART at J10 (unpopulated)
- internal antenna plates (19 dbi, directional)
- 7 LEDs, 1 button (power, eth, wlan, RSSI) (reset)
MAC addresses:
MAC addresses are labeled as ETH and 5GHz
Vendor MAC addresses in flash are duplicate
eth0 ETH *:d3 art 0x0/0x6
eth1 ---- *:d4 ---
phy0 5GHz *:d5 ---
Installation:
2 ways to flash factory.bin from OEM:
- if you get Failsafe Mode from failed flash:
only use it to flash Original firmware from Engenius
or risk kernel loop or halt which requires serial cable
Method 1: Firmware upgrade page:
OEM webpage at 192.168.1.1
username and password "admin"
Navigate to "Firmware" page from left pane
Click Browse and select the factory.bin image
Upload and verify checksum
Click Continue to confirm and wait 3 minutes
Method 2: Serial to load Failsafe webpage:
After connecting to serial console and rebooting...
Interrupt uboot with any key pressed rapidly
execute `run failsafe_boot` OR `bootm 0x9fd70000`
wait a minute
connect to ethernet and navigate to
"192.168.1.1/index.htm"
Select the factory.bin image and upload
wait about 3 minutes
Return to OEM:
If you have a serial cable, see Serial Failsafe instructions
otherwise, uboot-env can be used to make uboot load the failsafe image
*DISCLAIMER*
The Failsafe image is unique to Engenius boards.
If the failsafe image is missing or damaged this will not work
DO NOT downgrade to ar71xx this way, it can cause kernel loop or halt
ssh into openwrt and run
`fw_setenv rootfs_checksum 0`
reboot, wait 3 minutes
connect to ethernet and navigate to 192.168.1.1/index.htm
select OEM firmware image from Engenius and click upgrade
TFTP recovery:
rename initramfs to 'vmlinux-art-ramdisk'
make available on TFTP server at 192.168.1.101
power board
hold or press reset button repeatedly
NOTE: for some Engenius boards TFTP is not reliable
try setting MTU to 600 and try many times
Format of OEM firmware image:
The OEM software of EnStationAC is a heavily modified version
of Openwrt Altitude Adjustment 12.09. One of the many modifications
is to the sysupgrade program. Image verification is performed
simply by the successful ungzip and untar of the supplied file
and name check and header verification of the resulting contents.
To form a factory.bin that is accepted by OEM Openwrt build,
the kernel and rootfs must have specific names...
openwrt-ar71xx-enstationac-uImage-lzma.bin
openwrt-ar71xx-enstationac-root.squashfs
and begin with the respective headers (uImage, squashfs).
Then the files must be tarballed and gzipped.
The resulting binary is actually a tar.gz file in disguise.
This can be verified by using binwalk on the OEM firmware images,
ungzipping then untaring.
Newer EnGenius software requires more checks but their script
includes a way to skip them, otherwise the tar must include
a text file with the version and md5sums in a deprecated format.
The OEM upgrade script is at /etc/fwupgrade.sh.
OKLI kernel loader is required because the OEM software
expects the kernel to be no greater than 1536k
and the factory.bin upgrade procedure would otherwise
overwrite part of the kernel when writing rootfs.
Note on PLL-data cells:
The default PLL register values will not work
because of the external AR8033 switch between
the SOC and the ethernet PHY chips.
For QCA955x series, the PLL registers for eth0 and eth1
can be see in the DTSI as 0x28 and 0x48 respectively.
Therefore the PLL registers can be read from uboot
for each link speed after attempting tftpboot
or another network action using that link speed
with `md 0x18050028 1` and `md 0x18050048 1`.
For eth0 at 1000 speed, the value returned was
ae000000 but that didn't work, so following
the logical pattern from the rest of the values,
the guessed value of a3000000 works better.
later discovered that delay can be placed on the PHY end only
with phy-mode as 'rgmii-id' and set register to 0x82...
Tested from master, all link speeds functional
Signed-off-by: Michael Pratt <mcpratt@pm.me>
[fixed SoB to match From:]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
WNDR4700 uboot has an issue with decompressing kernel with default dictionary size (-d23 which is about 8MB).
Limiting lzma dictionary lowers memory footprint and allows device to boot the kernel.
The highest bootable dictonary size is 18, choosing 16 for an extra safety margin.
Kernel size befor and after:
-d23: 2663665 Bytes
-d16: 2892757 Bytes
Kernel size increased by 230kB (9%)
Fixes: FS#3258
Signed-off-by: Wiktor Stasiak <wiktor.stasiak@gmail.com>
