Commit Graph

14 Commits

Author SHA1 Message Date
Daniel Golle
452e4f064f mediatek: filogic: mt7988: mark RTC clock as critical
A dependency of the MT7988 MMC host controller on the SoC's RTC clock
being running has been discovered. Mark RTC clock as critical to fix
MMC host on MT7988.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 0454691960)
2023-08-13 16:30:13 +01:00
Daniel Golle
ad2fa6bc9c mediatek: filogic: restore non-const type in pinctrl-mt7988 driver
When building with Linux 5.15 the 'const' type results in warnings.
Restore the original non-const type in those cases.

Fixes: 36d0aa9c2d ("mediatek: filogic: sync pinctrl-mt7988 with MediaTek SDK")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 1eb67cb070)
2023-08-07 16:48:08 +01:00
Daniel Golle
830bb57f6a mediatek: filogic: sync pinctrl-mt7988 with MediaTek SDK
Update pinctrl driver for the MT7988 with driver from mtk-openwrt-feeds.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 36d0aa9c2d)
2023-08-07 16:48:07 +01:00
Daniel Golle
6092c39c13 mediatek: use backported Ethernet PHY driver also for 5.15
Backport in-SoC Gigabit Ethernet PHY driver instead of carrying the
driver in files-5.15.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 9fac590096)
2023-07-13 12:05:28 +01:00
Daniel Golle
a65ec9fea7 mediatek: sync MT7986 device trees with upstream
Sync device tree files for MT7986 boards with what landed in upstream
Linux tree to easy maintainance and also allow for a smooth update to
Linux 6.1.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 7a0ec001ff)
2023-06-09 19:23:03 +01:00
Daniel Golle
84e3d27355 mediatek: add driver for built-in 2.5G Ethernet PHY
Add driver for the built-in 2.5G Ethernet PHY found in the MT7988 SoC.
To function the PHY also needs firmware files which have not yet been
published via linux-firmware.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit ef2a831dab)
2023-05-24 19:26:52 +01:00
Daniel Golle
98e6233202 mediatek: update pending SoC Ethernet PHY driver
Update driver for MediaTek's built-in Gigabit Ethernet PHYs which can be
found in the MT7981 and MT7988 SoCs.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 987a0b2b30)
2023-05-24 19:26:52 +01:00
Sam Shih
d5dc84f44e mediatek: add mt7988 pinctrl driver support
This adds provisional pinctrl driver support for the MediaTek MT7988 SoC.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 9e6a7e808f)
2023-05-24 19:26:52 +01:00
Sam Shih
d74c3d8895 mediatek: add mt7988 clock drivers support
This adds clock drivers for the MediaTek MT7988 SoC

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit b33c185876)
2023-05-24 19:26:52 +01:00
Daniel Golle
f4f8c0e8de mediatek: sync pinctrl-mt7981 and pinctrl-mt7986 drivers
Now that new pinconf features have been backported sync pinctrl-mt7981
and pinctrl-m7986 with bleeding-edge upstream versions.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-04-13 20:01:33 +01:00
Daniel Golle
18a9ae56e9 mediatek: backport pinctrl driver for MT7981 SoC
Backport the pinctrl driver for the MT7981 SoC. The driver has also
been submitted upstream and is part of Linux 6.3.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-03-27 19:07:54 +01:00
Daniel Golle
658c4dd43f mediatek: backport clk driver for MT7981 SoC
Backport driver for common clocks in MT7981 SoC. The driver has also
been submitted upstream and became part of Linux 6.3.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-03-27 19:07:54 +01:00
Daniel Golle
c15e7e2910
mediatek: filogic: consolidate adc '32k' clock
Add dependency to '32k' ADC clock so it is always enabled for thermal
and raw access to ADC values. This allows to remove the patch for the
ADC driver and reduce the patch adding thermal support for MT7986 to
only add the new efuse layout and temperature decoding for V3.

Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2022-10-20 20:37:50 +01:00
Sam Shih
dabcaac443 mediatek: add mt7986 soc support to the target
It will be supported by the new filogic subtarget

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2022-08-28 20:33:15 +01:00