Prior to performing a PROGRAM LOAD RANDOM DATA operation, a WRITE
ENABLE (06h) command must be issued to change the contents of the
memory array. Following a WRITE ENABLE (06) command, **first a PROGRAM
LOAD (02h or 32h) command must be issued to reset the cache**, then
issue a PROGRAM LOAD RANDOM DATA (84h or 34h) command
This is dirty fix provided to use by MediaTek engineer Sky Huang which
may resolve the "OpenWrt Kiss of Death" issue we've been seeing on the
Linksys E8450 aka. Belkin RT3200. However, it means that everything has
to be re-written with that patch already applied, ie. we need to rebuild
the installer once it is part of snapshot builds to have any effect.
Users already on FIP-in-UBI layout are advised to re-write 'fip' UBI
volume and 'bl2' MTD partition manually once from within Linux after
this fix has been applied.
A similar fix will also be required for U-Boot.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
In preparation to update to upcoming Linux 6.6.33 move accepted patches
from mediatek target to backport folder, so moving to newer Linux 6.6
releases becomes easier and also other patches on top can be applied
more easily.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
In commit cd4de3251c ("mediatek: wait for fitblk rootfs"), the linux
6.6 files and patches has been forgotton to be fixed.
Fixes: cd4de3251c ("mediatek: wait for fitblk rootfs")
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
The patch "710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch"
makes use of "syscon_regmap_lookup_by_phandle" which requires that
"syscon" be in the compatible list.
Without this patch, PCIe probe will fail with the following error:
[ 1.287467] mtk-pcie 1a143000.pcie: host bridge /pcie@1a143000 ranges:
[ 1.294019] mtk-pcie 1a143000.pcie: Parsing ranges property...
[ 1.299901] mtk-pcie 1a143000.pcie: MEM 0x0020000000..0x0027ffffff -> 0x0020000000
[ 1.307954] mtk-pcie 1a143000.pcie: missing hifsys node
[ 1.313185] mtk-pcie: probe of 1a143000.pcie failed with error -22
Fixes: 4c6e9a9943 ("kernel: bump 6.6 to 6.6.30")
Signed-off-by: Rany Hany <rany_hany@riseup.net>
The compatible string for the MediaTek MT7988 SoC ended up being
'mediatek,mt7988a' instead of 'mediatek,mt7988' in the now upstream
dtsi. Adapt the cpufreq driver so support for frequency scaling is
again usable.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Airoha EN8801SC PHY is a gigabit PHY used on Edgecore EAP111 so, include
the MTK driver with some cleanups.
Unfortunatelly, there is no specification sheet nor datasheet available
in order to demistify the magic PBUS writes and work on upstreaming
this driver.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Add new emmc groups in the pinctrl driver for the
MediaTek MT7981 SoC:
* emmc reset, with pin 15.
* emmc 4-bit bus-width, with pins 16 to 19, and 24 to 25.
* emmc 8-bit bus-width, with pins 16 to 25.
The existing emmc_45 group is kept for legacy reasons, even
if this is the union of emmc_reset and emmc_8 groups.
Signed-off-by: Jean Thomas <jean.thomas@wifirst.fr>
As shared remove functions now returns void instead of int we need to
use .remove_new instead of .remove.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
