Commit Graph

26 Commits

Author SHA1 Message Date
Rosen Penev
481bf5805a ath79: usb: remove reset names
Upstream uses devm_reset_control_array_get_optional_shared, which does
not use names. reset-names is also not specified in the documentation.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17118
Signed-off-by: John Crispin <john@phrozen.org>
2024-12-13 15:29:04 +01:00
Rosen Penev
787cb9d87e ath79: change phy-names to only usb
Both generic-ehci.yaml and generic-ohci.yaml state that phy-names is to
only be usb.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17118
Signed-off-by: John Crispin <john@phrozen.org>
2024-12-13 15:29:04 +01:00
Rosen Penev
dcef169319 ath79: usb: remove usb- from reset-names
This matches the upstream PHY driver, which removed it.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17118
Signed-off-by: John Crispin <john@phrozen.org>
2024-12-13 15:29:04 +01:00
Rosen Penev
2607e3fe24
ath79: fix avoid_unnecessary_addr_size warnings
Raised to dtc.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
2024-01-05 16:17:57 +01:00
Shiji Yang
4778f6e959 ath79: move usb led trigger node to SoC dtsi
These frequently used usb led triggers are universal. They should be
moved to SoC dtsi.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
2022-11-12 17:10:12 +01:00
Christian Lamparter
b2aca5a263 ath79: fix various dts warnings
ar9344_openmesh_mr600-v1.dts:40.10-44.5: Warning (gpios_property):
/leds-ath9k/wifi2g: Missing property '#gpio-cells' in node
/ahb/pcie-controller@180c0000/wifi@0,0 or bad phandle
=> added gpio-controller + #gpio-cells

qca955x_zyxel_nbg6x16.dtsi:121.3-13: Warning (reg_format):
/ahb/usb@1b000000/port@1:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
../dts/qca955x_zyxel_nbg6x16.dtsi:131.3-13: Warning (reg_format):
/ahb/usb@1b400000/port@1:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
qca955x_zyxel_nbg6x16.dtsi:120.20-123.4: Warning (avoid_default_addr_size):
/ahb/usb@1b000000/port@1: Relying on default #address-cells value
=> ath79's usb-nodes are missing the address- and size-cells properties.
These are needed for usb led trigger support.

ar7242_ubnt_sw.dtsi:54.4-14: Warning (reg_format): /gpio_spi/gpio_spi@0:reg:
property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)
=> the #address-cells and #size-cells had to be nudged.

qca9531_dlink_dch-g020-a1.dts:19.6-39.4: Warning (i2c_bus_bridge):
/i2c: incorrect #size-cells for I2C bus
=> #size-cells = <0>;

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
2021-12-11 00:50:02 +01:00
David Bauer
0494278073 ath79: resolve GPIO address conflicts
The ar71xx GPIO driver only uses 0x24 registers, all following GPIO
registers are using to control pinmux functions, which are not handles
by the GPIO driver but the generic Linux pinctrl driver.

For some SoC conflicting address ranges were defined for these (AR7240 &
AR9330).

Resolve these cases and align the address space of the GPIO controller
between all SoCs, as the used address space of the driver is identical
for all these.

Signed-off-by: David Bauer <mail@david-bauer.net>
2021-07-01 23:26:49 +02:00
Adrian Schmutzler
3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00
David Bauer
cea169702c ath79: remove ar934x MDIO reset from MAC node
Remove the MDIO reset from the MAC mode for the AR934x SoC family.
The reset is currently also defined for the MDIO node, where the reset
is acquired exclusively.

In case the ethernet node is enabled, this triggers a warning, as the
reset is already acquired by the MAC.

Signed-off-by: David Bauer <mail@david-bauer.net>
2020-12-02 23:13:46 +01:00
Adrian Schmutzler
3ca2d31c54 ath79: move ath79-clk.h include to ath79.dtsi
ath79.dtsi uses ATH79_CLK_MDIO, so the include

  <dt-bindings/clock/ath79-clk.h>

needs to be moved there.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-09-25 23:24:09 +02:00
Sungbo Eo
736995ce19 ath79: rearrange nand node by register address
All other nodes in the DTS are placed in order of address space. Harmonize
the nand nodes as well.

Signed-off-by: Sungbo Eo <mans0n@gorani.run>
2020-07-02 21:34:37 +02:00
Hauke Mehrtens
1e95f9b3ea ath79: Make upstream ag71xx driver work
* Fix some bugs in the driver
* Add missing clock and reset references in dts
* Rename mdio-bus to mdio so the driver find it

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2020-02-28 17:50:46 +01:00
Daniel Golle
16031ebaf8 ath79: add support for Atheros AR934x HS UART
AR934x chips also got the 'old' qca,ar9330-uart in addition to the
'new' ns16550a compatible one. Add support for UART1 clock selector as
well as device-tree bindings in ar934x.dtsi to make use of that uart.

Reported-by: Piotr Dymacz <pepe2k@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2020-02-07 12:54:33 +02:00
Chuanhong Guo
ebf0d8dade ath79: add new ar934x spi driver
A new shift mode was introduced since ar934x which has a way better
performance than current bitbang driver and can handle higher spi
clock properly. This commit adds a new driver to make use of this
new feature.
This new driver has chipselect properly configured and we don't need
cs-gpios hack in dts anymore. Remove them.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2020-02-06 22:53:03 +08:00
Johann Neuhauser
bda6b6144d ath79: ar934x: use reset for usb-phy-analog
This was already available on ar71xx, but is missing on ath79.
This solves the slow usb speed on TP-Link WDR3600/WDR4300 and similar,
as reported in Flyspray [0], OpenWRT Forum [1] and GitHub PR [2].

[0] https://bugs.openwrt.org/index.php?do=details&task_id=2567
[1] https://forum.openwrt.org/t/usb-wdr4300-low-speed-on-external-storage/46794
[2] https://github.com/openwrt/openwrt/pull/964

Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
2020-01-15 23:15:20 +01:00
Michal Cieslakiewicz
758a4d1766 ath79: add AR934x NAND Flash Controller driver
This patch contains updated driver for Atheros NAND Flash Controller
written originally by Gabor Juhos for ar71xx (aka 'ar934x-nfc').
ath79 version has adapted to work with kernel 4.19 and Device Tree.
It has also been renamed to 'ar934x-nand' to avoid confusion with
Near-Field Communication technology.
Controller is present on Atheros AR934x SoCs and required for accessing
internal flash storage on routers like Netgear WNDR4300.
This port preserves all NAND programming code while moving platform
configuration to Device Tree and replacing some kernel functions marked
for retirement by 4.19.
Suitable definition is included in 'ar934x.dtsi' ('nand@1b000200' section).

Most important changes to ar71xx version are:
* old kernel sections of code removed
* 'bool swap_dma' provided by platform data is now set by boolean DT
  property 'qca,nand-swap-dma'
* board-supplied (mach-*.c code) platform data removed - its elements
  become either unused, redundant or replaced by DT methods (like reset)
* IRQ is reserved by devm_request_irq() so free_irq() is not needed anymore
* calls to deprecated nand_scan_ident() + nand_scan_tail() function pair
  replaced by using recommended nand_scan() with attach_chip() callback
* ECC is set to hardware by default, can be overriden by standard DT
  'nand-ecc-*' properties (software Hamming or BCH are other options)

This driver has been successfully tested on Netgear WNDR4300 running
experimental ath79 OpenWrt master branch.

Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
[add reset control]
Signed-off-by: David Bauer <mail@david-bauer.net>
2019-10-20 15:32:53 +02:00
Chuanhong Guo
f65501e1c2 ath79: ar93xx/qca95xx: move gmac/wmac/pcie node out of apb bus
according to functional block diagram in datasheet, these devices
don't belong to apb bus.
Move these nodes out to match datasheet description.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-07-16 09:52:43 +08:00
Chuanhong Guo
8dde11d521 ath79: dts: drop "simple-mfd" for gmacs in SoC dtsi
With a proper probe deferring for ag71xx we don't need to explicitly
probe mdio1 before gmac0.
Drop all "simple-mfd" in SoC dtsi so that gmac orders can be the same
as ar71xx.
This makes eth0/eth1 order the same as those in ar71xx, which means
we don't need a migration script for this anymore and we can merge
incorrectly split gmac/mdio driver back together.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-06-05 10:12:31 +02:00
Chuanhong Guo
443fc9ac35 ath79: use ar8216 for builtin switch
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-03-24 01:44:27 +01:00
Chuanhong Guo
51cdf0e9eb ath79: ar934x: assert mac/mdio reset together for gmac0
This allows resetting gmac registers during initialization.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2019-03-05 03:02:34 +01:00
Mathias Kresin
55ff2951ea ath79: fix dts warnings
Fix all issues found by the devicetree compiler like wrong address/size
cells as well as wrong/missing/superfluous unit addresses.

Signed-off-by: Mathias Kresin <dev@kresin.me>
2018-08-08 08:11:11 +02:00
Chuanhong Guo
7a07b4cff0 ath79: Add switch reset definition in dts
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:35 +02:00
Chuanhong Guo
f6c99241ba ath79: ar934x: Update dts for current ag71xx driver
Enable mdio1 by default because mdio1 is needed when eth1 is enabled.

PS: If a ar9341 device has only one port and you only want to use gmac0,
change compatible of gmac1 to "syscon", "simple-mfd" in dts.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:33 +02:00
Chuanhong Guo
b346c37588 ath79: Fix mac reset and gmac compatible in ar934x.dtsi
Also add phy-mode and fixed-link as gmac1 is always connected
to the builtin switch.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-07-30 10:43:33 +02:00
Johann Neuhauser
dcc942e666 ath79: ar934x: use irq-ath79-intc driver and enable wmac
Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
2018-06-20 11:12:00 +02:00
Johann Neuhauser
a7e1e919af ath79: preliminary support for TP-Link WDR3600 / WDR4300 (AR9344)
working:
 - leds
 - buttons
 - lan / wan
 - usb (hub port 1 + 2)
 - wifi 5g
 - sysupgrade
 - ...

not working:
 - wifi 2g

Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
2018-05-22 20:53:15 +02:00