Shiji Yang
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656c9847d5
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ramips: add back the missing periph clock for Ralink RT3883
periph clock is the parent clock of some other clocks.
Link: https://lore.kernel.org/all/CAMhs-H_NS-n2tx5SZpCMiVZtBFzX_nTa_vnS8We0UevkwFq93Q@mail.gmail.com/
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/16318
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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2024-09-22 19:12:16 +02:00 |
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