Use the new timer driver for the RTL839X devices and remove the
no longer needed modules.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
[correct timer compatible order, update selected symbols]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Use the new timer driver for the RTL838X devices. Remove the no
longer needed modules.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
[correct timer compatible order, update selected symbols]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Now that we provide a clock driver for the Reltek SOCs the CPU frequency might
change on demand. This has direct visible effects during operation
- the CEVT 4K timer is no longer a stable clocksource
- after CPU frequencies changes time calculation works wrong
- sched_clock falls back to kernel default interval (100 Hz)
- timestamps in dmesg have only 2 digits left
[ 0.000000] sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps ...
[ 0.060000] pid_max: default: 32768 minimum: 301
[ 0.070000] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[ 0.070000] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[ 0.080000] dyndbg: Ignore empty _ddebug table in a CONFIG_DYNAMIC_DEBUG_CORE build
[ 0.090000] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, ...
Looking around where we can start the CEVT timer for RTL930X is a good basis.
Initially it was developed as a clocksource driver for the broken timer in that
specific SOC series. Afterwards it was shifted around to the CEVT location,
got SMP enablement and lost its clocksource feature. So we at least have
something to copy from. As the timers on these devices are well understood
the implementation follows this way:
- leave the RTL930X implementation as is
- provide a new driver for RTL83XX devices only
- swap RTL930X driver at a later time
Like the clock driver this patch contains a self contained module that is SOC
independet and already provides full support for the RTL838X, RTL839X and
RTL930X devices. Some of the new (or reestablished) features are:
- simplified initialization routines
- SMP setup with CPU hotplug framework
- derived from LXB clock speed
- supplied clocksource
- dedicated register functions for better readability
- documentation about some caveats
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
[remove unused header includes, remove old CONFIG_MIPS dependency, add
REALTEK_ prefix to driver symbol]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
OpenWRT's developer guide prefers having actual patches so they an be
sent upstream more easily.
However, in this case, Adding proper fields also allows for `git am` to
properly function. Some of these patches are quite old, and lack much
traceable history.
This commit tries to rectify that, by digging in the history to find
where and how it was first added.
It is by no means perfect and also shows some patches that should have
been long gone.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Currently we fix interrupts/timers for the secondary CPU by patching
vsmp_init_secondary(). Get a little bit more generic and use the
upstream recommended way instead. Additionally avoid a check around
register_cps_smp_ops() because it does that itself.
See https://lkml.org/lkml/2022/9/12/522
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
The interrupt controller depends on two control registers. GIMR enables
or disables interrupts and IRRx routes these to MIPS CPU interrupts 2-7.
Wiki currently states "A value of '0' (in IRRx) disconnects this input from
the output line, independent of the line's setting in GIMR."
Contrary to normal intuition this statement DOES NOT mean, that interrupts
can be disabled by IRRx alone. The sad truth was discovered by enabling
SMP for an Zyxel XGS1010 on the 930x target. It shows that driver and
interrupts behave as follows:
- Timer 0 interrupt 7 has active routing to CPU0 and no routing to CPU1
- Timer 1 interrupt 8 has no routing to CPU0 and active routing to CPU1
- Unmasking (enabling) interrupts writes 1 bits to all GIMR registers
- Masking (disabling) interrupts writes 0 bits to both GIMR registers
During operation we can encounter a situation like
- GIMR bit for a interrupt/CPU combination is set to enabed (=1)
- IRRx routing bits for a interrupt/CPU combination are set to disabed (=0)
This setting already allows the hardware to fire interrupts to the target
CPU/VPE if the other CPU/VPE is currently busy. Especially for CPU bound
timer interrupts this is lethal. If timer interrupt 7 arrives at CPU1 and
vice versa for interrupt 8 the restart trigger gets lost. The timer dies
and a msleep() operation in the kernel will halt endlessly.
Fix this by tracking the IRRx active routing setting in a new bitfield with
0="routing active" and 1="no routing". Enable interrupts in GIMR only
for a interrupt & CPU if routing is active. Thus we have
- GIMR = 0 / IRRx = 0 -> everything disabled
- GIMR = 1 / IRRx > 0 -> active and normal routing
- GIMR = 0 / IRRx > 0 -> masked (disabled) with normal routing
- GIMR = 1 / IRRx = 0 -> no longer possible
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
8 and 16 bit writes to the GPIO peripheral are apparently not supported,
and only worked most of the time. This resulted in garbabe writes to the
interrupt mask registers, causing spurious unhandled interrupts, which
could lead to CPU lock-ups as these kept retriggering.
Instead of clearing these spurious interrupt when they occur, the
upstream patch will just make sure all register writes have the intended
result, so these don't happen at all.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
A new clock driver makes more sense if it can be used from consumers
like cpufreq. Before we enable the driver we must tell the config that
the RTL838X and RTL839X targets allow CPU frequency changing.
Even though these targets currently rely on the CPU's internal R4K
timer, MIPS_EXTERNAL_TIMER is selected to allow for CPU frequency change
testing. The Realtek timers, which are clocked by the Lexra bus, still
need to be supported and used in order to provide correct wall times
when reclocking the CPU.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
[add paragraph about MIPS_EXTERNAL_TIMER to commit message]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
As the symbol RTL930x shows, the bool enables the RTL930x platform, not
the RTL839x one.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
(slightly changed commit subject)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
The interrupt controller in the internal GPIO peripheral will sometimes
generate spurious interrupts. If these are not properly acknowledged, the
system will be held busy until reboot. These spurious interrupts are identified
by the fact that there is no system IRQ number associated, since the interrupt
line was never allocated. Although most prevalent on RTL839x, RTL838x SoCs have
also displayed this behaviour.
Reported-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> # DGS-1210-52
Reported-by: Birger Koblitz <mail@birger-koblitz.de> # Netgear GS724TP v2
Reported-by: Jan Hoffmann <jan@3e8.eu> # HPE 1920-16G
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Delete the crypto-lib-blake2s kmod package, as BLAKE2s is now built-in.
Patches automatically rebased.
Build system: x86_64
Build-tested: ipq806x/R7800, x86/64
Signed-off-by: John Audia <therealgraysky@proton.me>
On uniprocessor builds, for_each_cpu(cpu, mask) will assume 'mask'
always contains exactly one CPU, and ignore the actual mask contents.
This causes the loop to run, even when it shouldn't on an empty mask,
and tries to access an uninitialised pointer.
Fix this by wrapping the loop in a cpumask_empty() check, to ensure it
will not run on uniprocessor builds if the CPU mask is empty.
Fixes: af6cd37f42 ("realtek: replace RTL93xx GPIO patches")
Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Reported-by: Robert Marko <robimarko@gmail.com>
Tested-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Patches to support the SoC's GPIO controller for RTL930x and RTL931x
devices have been accepted upstream. Replace the current preliminary
patch with the upstream ones, excluding devictree binding changes.
The updated patches add GPIO IRQ balancing support on RTL930x, but this
cannot be used until these devices also support SMP.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Ensures that the DSA driver sets exactly the same default flags as the
bridge when a port joins or leaves. Without this we end up with a
confusing flag mismatch, where DSA and bridge ports use different sets
of flags.
This is critical as the "learning" mismatch will be harmful to the
network, causing all traffic to be flooded on all ports.
The original commit was buggy, trying to set the flags one-by-one in a
loop. This was not supported by the API and the end result was that
all but the last flag were cleared. This bug was implicitly fixed
upstream by commit e18f4c18ab5b ("net: switchdev: pass flags and mask
to both {PRE_,}BRIDGE_FLAGS attributes").
This is a minimum temporary stop measure fix for the critical lack of
"learning" only. The major API change associated with a full v5.12+
backport is neither required nor wanted. A simpler fix, moving the
call to dsa_port_bridge_flags() out of the loop, has therefore been
merged into this modified backport.
Fixes: afa3ab54c0 ("realtek: Backport bridge configuration for DSA")
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
[fix typos in commit message]
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Instead of directly calling SoC-specific functions in order to access
(paged) MII registers or MMD registers, create infrastructure to allow
using the generic phy_*, phy_*_paged and phy_*_mmd functions.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Import commit ("c6af53f038aa3 net: mdio: add helpers to extract clause
45 regad and devad fields") from Linux 5.17 to allow making the MDIO
code in the ethernet driver more readable.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
We add the RTL931X sub-target with kernel configuration for
a dual core MIPS InterAptive CPU.
Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Adds the DSA API for bridge configuration (flooding, L2 learning,
and aging) offload as found in Linux 5.12 so that we can implement
it in our drivver.
Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Add the LAG configuration API for DSA as found in Linux 5.12 so that we
can implement it in the dsa driver.
Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The RTL9300 has a broken R4K MIPS timer interrupt, however, the
R4K clocksource works. We replace the RTL9300 timer with a
Clock Event Timer (CEVT), which is VSMP aware and can be instantiated
as part of brining a VSMTP cpu up instead of the R4K CEVT source.
For this we place the RTL9300 CEVT timer in arch/mips/kernel
together with other MIPS CEVT timers, initialize the SoC IRQs
from a modified smp-mt.c and instantiate each timer as part
of the MIPS time setup in arch/mips/include/asm/time.h instead
of the R4K CEVT, similarly as is done by other MIPS CEVT timers.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
In order to support VSMP, enable support for both VPEs
of the RTL839X and RTL930X SoCs in the irq-realtek-rtl
driver. Add support for IRQ affinity setting.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Creates RTL83XX as a basic kernel config parameter for the
RTL838X, RTL839x, RTL930X and RTL931X platforms with respective
configurations for the SoCs, which are introduced in addition.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The EEPROMs on SFP modules are compatible both to I2C as well
as SMBus. However, the kernel so far only supports I2C
access. We add SMBus access routines, because the I2C driver
for the RTL9300 HW only supports that protocol. At the same
time we disable I2C access to PHYs on SFP modules as otherwise
detection of any SFP module would fail. This is not in any
way problematic at this point in time since the RTL93XX
platform so far does not support PHYs on SFP modules.
The patches are copied and rebased version of:
https://bootlin.com/blog/sfp-modules-on-a-board-running-linux/
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The RTL9300/RTL9310 I2C controllers have support for 2 independent I2C
masters, each with a fixed SCL pin, that cannot be changed. Each of these
masters can use 8 (RTL9300) or 16 (RTL9310) different pins for SDA.
This multiplexer directly controls the two masters and their shared
IO configuration registers to allow multiplexing between any of these
busses. The two masters cannot be used in parallel as the multiplex
is protected by a standard multiplex lock.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for the RTL9300 and RTL9310 I2C controller.
The controller implements the SMBus protocol for SMBus transfers
over an I2C bus. The driver supports selecting one of the 2 possible
SCL pins and any of the 8 possible SDA pins. Bus speeds of
100kHz (standard speed) and 400kHz (high speed I2C) are supported.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This patch removes support for the legacy GPIO driver, since now
the gpio-otto driver can be used on all platforms
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
We add support for the RTL930X and RTL931X architectures
in the gpio-realtek-otto.c driver.
Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Had to update generic defconfig (make kernel_menuconfig CONFIG_TARGET=generic)
for this bump, but since that only modifies the target defined in .config,
and since that target also needed to be updated for unrelated reasons, manually
propagated the newly added symbol to the generic config.
Removed upstreamed:
pending-5.10/860-Revert-ASoC-mediatek-Check-for-error-clk-pointer.patch[1]
All other patches automatically rebased.
1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.99&id=080f371d984e8039c66db87f3c54804b0d172329
Build system: x86_64
Build-tested: bcm2711/RPi4B, mt7622/RT3200
Run-tested: bcm2711/RPi4B, mt7622/RT3200
Signed-off-by: John Audia <graysky@archlinux.us>
Removed target for patch which does not exist:
bcm27xx/patches-5.10/950-0249-kbuild-Disable-gcc-plugins.patch
All patches automatically rebased.
Build system: x86_64
Build-tested: bcm2711/RPi4B, ipq806x/R7800*
Run-tested: bcm2711/RPi4B, ipq806x/R7800*
* Had to revert 7f1edbd412 in order to build
(binutils 2.37, https://bugs.openwrt.org/index.php?do=details&task_id=4149)
Signed-off-by: John Audia <graysky@archlinux.us>
The Realtek Otto watchdog timer driver was accepted upstream, and is
queued for 5.17. Update the patch's file name, and replace by the final
version.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Add patch submitted upstream to linux-watchdog and replace the MIPS
architecture symbols. Requires one extra patch for the DIV_ROUND_*
macros, which have moved to a different header since 5.10.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
Backport the patch queued upstream for 5.16. The patch differs slightly
from the upstream patch due to an upstream change that added a
convenience function.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Deleted (upstreamed):
bcm27xx/patches-5.10/950-0145-xhci-add-quirk-for-host-controllers-that-don-t-updat.patch [1]
Manually rebased:
bcm27xx/patches-5.10/950-0355-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
bcm53xx/patches-5.10/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
Note: although automatically rebaseable, the last patch has been edited to avoid
conflicting bit definitions.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.10.y&id=b6f32897af190d4716412e156ee0abcc16e4f1e5
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
