Switch to OpenWrt uImage.FIT bootmethod and include various bootloader
artifacts with the generated binaries.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 035a88ae55)
* re-factor WED components to boot fine also on limited loaders
* add LEDs of integrated GE PHY
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 3ef8760e87)
Set correct pull-type data and add additional uart groups for MT7981.
Assign functions to configure pin bias for MT7986.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 9f8fde216d)
Unfortunately some device tree properties have slipped under the table
when switching from our downstream device tree.
Bring back 3W power for SFP cages and restore thermal trip points to
make sense again.
Fixes: 7a0ec001ff ("mediatek: sync MT7986 device trees with upstream")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 06a150aed7)
A dependency of the MT7988 MMC host controller on the SoC's RTC clock
being running has been discovered. Mark RTC clock as critical to fix
MMC host on MT7988.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 0454691960)
When building with Linux 5.15 the 'const' type results in warnings.
Restore the original non-const type in those cases.
Fixes: 36d0aa9c2d ("mediatek: filogic: sync pinctrl-mt7988 with MediaTek SDK")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 1eb67cb070)
Update pinctrl driver for the MT7988 with driver from mtk-openwrt-feeds.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 36d0aa9c2d)
The PHY driver now uses regmap created from pio syscon, we no longer
need the boottrap device.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit f321a49fd5)
Backport in-SoC Gigabit Ethernet PHY driver instead of carrying the
driver in files-5.15.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 9fac590096)
The PHY driver needs to read a register containing the values of the
bootstrap pins (which happen to be the PHY LEDs) to determine the LED
polarities. Allow regmap access to first pinctrl bank by adding the
'syscon' compatible, and reference the pinctrl in the MDIO bus where
the PHY driver will look for it.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 1f1e0b1144)
Sync device tree files for MT7986 boards with what landed in upstream
Linux tree to easy maintainance and also allow for a smooth update to
Linux 6.1.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 7a0ec001ff)
PCK and MCK should really be P=PMIC and M=MEM, which means that they
should effectively be CLK_PMIC and CLK_ARB.
Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 0580747ada)
Add reserved memory for pstore/ramoops to device tree used by Linux
as well as U-Boot.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 3eb354f999)
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Pick accepted patches from upstream Linux tree instead of having to
maintain our slightly different downstream patches.
Import pending patch fixing I2C on MT7981 by making sure all clocks
are enabled before accessing I2C registers.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 213b728276)
This add basic device tree support for mediatek MT7988 SoC
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit e3a681bab4)
Add driver for the built-in 2.5G Ethernet PHY found in the MT7988 SoC.
To function the PHY also needs firmware files which have not yet been
published via linux-firmware.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit ef2a831dab)
Update driver for MediaTek's built-in Gigabit Ethernet PHYs which can be
found in the MT7981 and MT7988 SoCs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 987a0b2b30)
This adds provisional pinctrl driver support for the MediaTek MT7988 SoC.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 9e6a7e808f)
This adds clock drivers for the MediaTek MT7988 SoC
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit b33c185876)
Setup all necessary clocks to get MMC to work on MT7981, similar to
how it is done also on MT7986.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit a9989b30d0)
There is no reason to limit USB to 2.0 mode
by default, delete this limit.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
(cherry picked from commit b2beb4c688)
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Now that new pinconf features have been backported sync pinctrl-mt7981
and pinctrl-m7986 with bleeding-edge upstream versions.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Backport the pinctrl driver for the MT7981 SoC. The driver has also
been submitted upstream and is part of Linux 6.3.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Backport driver for common clocks in MT7981 SoC. The driver has also
been submitted upstream and became part of Linux 6.3.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add dependency to '32k' ADC clock so it is always enabled for thermal
and raw access to ADC values. This allows to remove the patch for the
ADC driver and reduce the patch adding thermal support for MT7986 to
only add the new efuse layout and temperature decoding for V3.
Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* set correct clocks for PWM to work.
* MT7986 PWM does have the 26MHz-clock-select, set that in patch
* drop useless 'passive' trip point in thermal zone
* extend pwm-fan to have 3 active operating points
* set reasonable trip points in thermal zone
* invert pwm-fan operating points and set shorter period to allow
less noisy operation of the PWM fan of the BPi-R3.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add support for hardware I2C and PWM units found in the Filogic SoCs
as well as the CPU thermal support.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Import patches from mtk-openwrt-feeds (MTK SDK) to support reading
t-phy settings affecting PCIe as well as USB2 and USB3 from efuse.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
efuse is used to store board-specific settings of some of the in-SoC
peripherals. Add it to device tree, so it gets probed on boot and can
be accessed by other drivers.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Older MT7623 ARMv7 SoC as well as new Filogic platforms come with
inside-secure,safexcel-eip97 units. Enable them in DTS and select the
driver kernel module by default on those platforms.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
It will be supported by the new filogic subtarget
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
