The following devices have a Winbond W25Q256FV flash chip,
which does not have the RESET pin enabled by default,
and otherwise would require setting a bit in a status register.
Before moving to Linux 5.4, we had the patch:
0053-mtd-spi-nor-add-w25q256-3b-mode-switch.patch
which kept specific flash chips with explicit 3-byte and 4-byte address modes
to stay in 3-byte address mode while idle (after an erase or write)
by using a custom flag SPI_NOR_4B_READ_OP that was part of the patch.
this was obsoleted by the patch:
481-mtd-spi-nor-rework-broken-flash-reset-support.patch
which uses the newer upstream flag SNOR_F_BROKEN_RESET
for devices with a flash chip that cannot be hardware reset with RESET pin
and therefore must be left in 3-byte address mode when idle.
The new patch requires that the DTS of affected devices
have the property "broken-flash-reset", which was not yet added for most of them.
This commit adds the property for remaining affected devices in ramips target,
specifically because of the flash chip model.
However, it is possible that there are other devices
where the flash chip uses an explicit 4-byte address mode
and the RESET pin is not connected to the SOC on the board,
and those DTS would also need this property.
Ref: 22d982ea00 ("ramips: add support for switching between 3-byte and 4-byte addressing")
Ref: dfa521f129 ("generic: spi-nor: rework broken-flash-reset")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
[pepe2k@gmail.com: backported to 21.02]
Fixes: #9655, #9636, #9547
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
(backported from commit 74516f4357)
upstream driver merged 3 separated gpio banks into one gpio node.
and gpioX Y in our local driver should be replaced with gpio X*32+Y.
This patch is created using the following sed command:
sed -i -r 's/(.*)gpio([0-9]) ([0-9]+)(.*)/echo "\1gpio $((\2*32+\3))\4"/ge'
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
mt76x8 uses esw_rt3050 driver, which does not accept mediatek,portmap with
string values. Convert the strings to integers to make it work.
According to its switch setup, WRTnode 2P/2R have a WAN port at port 0,
so the correct value should be 0x3e.
tplink_8m.dtsi uses "llllw", but it does not match switch setups of any
device using the DTSI. Remove it from the DTSI and add correct value to DTS
for each device.
These devices have a WAN port at port 0. Set the value to 0x3e.
- tplink,archer-c20-v4
- tplink,archer-c50-v3
- tplink,tl-mr3420-v5
- tplink,tl-wr840n-v4
- tplink,tl-wr841n-v13
- tplink,tl-wr842n-v5
These devices have only one ethernet port. They don't need portmap setting.
- tplink,tl-wa801nd-v5
- tplink,tl-wr802n-v4
- tplink,tl-wr902ac-v3
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
This converts all remaining devices to use interrupt-driven
gpio-keys compatible instead of gpio-keys-polled.
The poll-interval is removed.
While at it, add/remove newlines in keys and leds node where
necessary.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Only the 2R version got the STM32 uC connected as 2nd SPI device.
Hence move the spidev node from mt7628an_wrtnode_wrtnode2.dtsi to
mt7628an_wrtnode_wrtnode2r.dts.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
