Commit Graph

4 Commits

Author SHA1 Message Date
Petr Štetiar
6648e9458f ath79: set mib-poll-interval on mdio0 attached ar83xx switch
Commit "generic: ar8216: add mib_poll_interval switch attribute" sets
mib-poll-interval as disabled by default (was set to 2s), so it makes
switch LEDs trigger disfunctional on devices which don't have
mib-poll-interval set.

So this patch sets mib-poll-interval to 500ms on devices which have
ar83xx switch connected to mdio0 bus, as the same value was set for
built in switches in 443fc9ac35 ("ath79: use ar8216 for builtin
switch").

Some measurements performed on TP-Link Archer C7-v5:

 mib-type=0, mib-poll-interval=500ms (10s pidstat)

  Average:  %usr %system  %guest   %wait    %CPU   CPU  Command
  Average:  0.00    1.93    0.00    0.00    1.93     -  kworker/0:2

  iperf3 (30s): 334 Mbits/sec

 mib-type=0, mib-poll-interval=2s (10s pidstat)

  Average:  %usr %system  %guest   %wait    %CPU   CPU  Command
  Average:  0.00    1.14    0.00    0.00    1.14     -  kworker/0:2

  iperf3 (30s): 334 Mbits/sec

So it seems like we get 4x faster LED refresh rate for additional 0.8%
CPU load.

Signed-off-by: Petr Štetiar <ynezz@true.cz>
2019-05-20 21:19:48 +02:00
David Santamaría Rogado
6c558bae64 ath79: TP-Link Archer C7 v4 swap usb led names
Commit 34b10b46 made usb match with the corresponding usb label.
The problem is that v4 seems to use in stock firmware the
upper led for usb 1 and the lower led for usb 2.

The led assigned varies between TP-Link models and even
same model versions. For example, Archer C7 v1 and v2 have
the leds in the reverse order.

Revert 34b10b46 and swap led labels instead, now usb port
and led label match and also respect the original behavior.

Tested-by: Oldrich Jedlicka <oldium.pro@gmail.com>
Signed-off-by: David Santamaría Rogado <howl.nsp@gmail.com>
2019-03-02 12:59:48 +01:00
David Santamaría Rogado
34b10b468e ath79: TP-Link Archer C7 v4 swap usb port leds
USB 1 triggers usb2 led and USB 2 triggers usb1.
Lower LED is usb1 and upper LED usb2.

Signed-off-by: David Santamaría Rogado <howl.nsp@gmail.com>
2019-02-28 11:32:55 +01:00
Oldřich Jedlička
12310f05b7 ath79: add support for TP-LINK Archer C7 v4
TP-Link Archer C7 v4 is a dual-band AC1750 router, based on the
Qualcomm/Atheros QCA9561 SoC + QCA9880.

Specification:

- 775/650/258 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 3T3R 2.4 GHz
- 3T3R 5 GHz
- 5x 10/100/1000 Mbps Ethernet
- 7x LED, 2x button
- UART header on PCB

Flash instruction:
1. Upload openwrt-ath79-generic-tplink_archer-c7-v4-squashfs-factory.bin
   via Web interface

Flash instruction using TFTP recovery:
1. Set PC to fixed ip address 192.168.0.66
2. Download openwrt-ath79-generic-tplink_archer-c7-v4-squashfs-factory.bin
   and rename it to ArcherC7v4_tp_recovery.bin
3. Start a tftp server with the file tp_recovery.bin in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
   the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.

Signed-off-by: Oldřich Jedlička <oldium.pro@gmail.com>
2019-02-05 19:37:31 +01:00