The GS1900-48 is a 48 + 2 port Gigabit L2 switch with 48 gigabit ports.
Hardware:
RTL8393M SoC
Macronix MX25l12805D (16MB flash)
128MB RAM
6 * RTL8218B external PHY
2 * RTL8231 GPIO extenders to control the port LEDs, system LED and
Reset button
2 Uplink ports are SFP cages which support 1000 Base-X mini GBIC modules.
Power is supplied via a 230 volt mains connector.
The board has a hard reset switch SW1, which is is not reachable from the outside.
J4 provides a 12V RS232 serial connector which is connected through U8 to
the 3.3V UART of the RTL8393. Conversion is done by U8, a SIPEX 3232EC.
To connect to the UART, wires can be soldered to R603 (TX) and R602 (RX).
Installation:
Install the squashfs image via Realtek's original Web-Interface.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Update the IRQ configuration to work with the new rtl-intc controller.
Also change all KSEG1 addresses in reg = <> of the devics to physical
addresses.
Use the new gpio-otto controller instead of the legacy driver.
Also remove the memory node as this is better put into a device .dts.
Also remove the RTL8231 GPIO controller node from this base file
since the chip might not be found in all Realtek RTL839x devices.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Replace the interrupt controller node with the new realtek,rtl-intc
node and change all device interrupts to use the 2 field notation:
interrupts = <[SoC IRQ] [Index to MIPS IRQ]>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The GS110TPP has an RGB LED used for system status indication. Expose
all three components as separate GPIO LEDs connected via the device's
RTL8231.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Since the move to 5.10, there are now two GPIO drivers. The gpio0 node
refers to the internal GPIOs, so the indirect-access-bus-id is no longer
relevant for that node.
Set indirect-access-bus-id to the correct value (31) on the correct node
(gpio1) and enable the device.
Cc: Raylynn Knight <rayknight@me.com>
Cc: Michael Mohr <akihana@gmail.com>
Cc: Stijn Segers <foss@volatilesystems.org>
Cc: Stijn Tintel <stijn@linux-ipv6.be>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Bjørn Mork <bjorn@mork.no>
The Netgear GS110TPP v1 switch cannot reliably perform cold reboots
using the system's internal reset controller.
On this device, and the other supported Netgear switches, internal GPIO
line 13 is connected to the system's hard reset logic. Expose this GPIO
on all systems to ensure restarts work properly.
Cc: Raylynn Knight <rayknight@me.com>
Cc: Michael Mohr <akihana@gmail.com>
Cc: Stijn Segers <foss@volatilesystems.org>
Cc: Stijn Tintel <stijn@linux-ipv6.be>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Bjørn Mork <bjorn@mork.no>
The internal GPIO controller on RTL838x is also an IRQ controller, which
requires the 'interrupt-controller' and '#interrupts-cells' properties
to be present in the device tree.
Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Add and enable the Realtek Otto WDT peripheral found on these SoCs.
Default all devices to use standard (cold) reboot and "soc" resets.
Devices that require the PLL value fixup before restarting, should pick
the "cpu" or "software" reset mode. These devices also need to provide a
custom reboot mode, by adding the reboot argument to the kernel command
line:
WDT reset mode | kernel reboot mode
----------------+---------------------------------------
soc | reboot=cold (default if not specified)
cpu | reboot=warm
software | reboot=software
Preferrably, these devices should use an alternative restart method like
gpio-restart to provide reliable restarts.
Note that watchdog restarts are not yet exposed, since the
_machine_restart override is still present.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
The CPU peripherals on RTL83xx/RTL930x are connected to the CPU via the
Lexra bus. This bus can provide a clock signal to these peripherals, but
no clock driver is currently available. Instead, use a fixed-clock to
provide the clock frequency, and update the dependent peripherals.
Lexra bus clock frequencies:
- RTL838x: 200MHz
- RTL839x: 200MHz
- RTL930x: 175MHz
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
All current devices use identical bootargs, so let's move that to the
common devicetree includes.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
On the devices with PoE support, the secondary UART (uart1) on the SoC
is used to communicate between the SoC and controller.
Enable the secondary UART on the following devices:
- D-Link DGS-1210-10P
- Netgear GS110TPP v1
- Netgear GS310TP v1
- ZyXEL GS1900-8HP v1/v2
- ZyXEL GS1900-10HP
- ZyXEL GS1900-24HP v2
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
The new backported GPIO driver supports interrupt, so use gpio-keys
instead of gpio-keys-polled for keys connected to the internal GPIO
controller.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
this patch includes the following changes:
- adjust mapping for the new driver
- GPIO 24 -> GPIO 0
- GPIO 47 -> GPIO 0 (+ disabling system LED)
- disable pins in the invalid range
(out of the range 0-31 of the new driver)
- are these pins on the external RTL8231 (&gpio1)?
- GPIO 67 (-> GPIO 3 on &gpio1?)
- GPIO 94 (-> GPIO 30 on &gpio1?)
- drop "indirect-access-bus-id" property from gpio0 node in device dts
files
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
This patch adds a pinctrl-single pinmux node to allow disabling system
LED and enabling GPIO 0 (old driver: GPIO 24).
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
this patch updates SoC dtsi (rtl838x.dtsi, rtl930x.dtsi) for the
following backported drivers:
- gpio-realtek-otto (5.13)
- spi-realtek-rtl (5.12)
- irq-realtek-rtl (5.12)
And, disable SoC GPIO node (gpio0) in rtl930x.dtsi in dts-5.10.
Currently, the upstreamed driver doesn't support the GPIO controller on
RTL930x SoC.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
the following changes are included in this patch:
- node is enabled by default, drop 'status = "okay"'
- adjust order of "compatible" lines and "reg" lines
- add a new blank line before fixed-link node in rtl830x.dtsi
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
This patch adds "dts-5.10" directory to use backported drivers.
There are several specification changes in the new drivers, so there
are some compatibility issues in using dts/dtsi files for 5.4.
The old DTS files are moved to "dts-5.4", so their corresponding
kernel version is obvious as well.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
[change "dts" to "dts-5.4", adjust Makefile]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
