Commit Graph

4 Commits

Author SHA1 Message Date
Christian Marangi
0a4b309f41
generic: backport initial LEDs hw control support
Backport initial LEDs hw control support. Currently this is limited to
only rx/tx and link events for the netdev trigger but the API got
accepted and the additional modes are working on and will be backported
later.

Refresh every patch and add the additional config flag for QCA8K new
LEDs support.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2023-06-06 11:01:31 +02:00
Robert Marko
1f8c8bca5e
ipq40xx: add PSGMII PHY mode to phylink_get_linkmodes()
Upstream commit ("net: phylink: add generic validate implementation") was
backported, however PSGMII PHY mode patch for ipq40xx was not updated to
add PSGMII to phylink_get_linkmodes() so the following warning would be
printed during kernel compilation:
drivers/net/phy/phylink.c: In function 'phylink_get_linkmodes':
drivers/net/phy/phylink.c:360:9: error: enumeration value 'PHY_INTERFACE_MODE_PSGMII' not handled in switch [-Werror=switch]
  360 |         switch (interface) {
      |         ^~~~~~

Resolve the warning by adding the PSGMII mode to phylink_get_linkmodes().

Signed-off-by: Robert Marko <robimarko@gmail.com>
2023-05-12 03:15:34 +02:00
John Audia
9110126620 kernel: bump 5.15 to 5.15.72
Removed upstreamed:
  generic/pending-5.15/722-net-mt7531-only-do-PLL-once-after-the-reset.patch[1]
  bcm53xx/patches-5.15/082-v6.0-clk-iproc-Do-not-rely-on-node-name-for-correct-PLL-s.patch[2]

All other patches automatically rebased

Build system: x86_64
Build-tested: bcm2711/RPi4B, mt7622/RT3200, mvebu/cortexa72
Run-tested: bcm2711/RPi4B, mt7622/RT3200, mvebu/cortexa72 (RB5009UG+S+IN)

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.72&id=5de02ab84aeca765da0e4d8e999af35325ac67c2
2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.72&id=ab5c5787ab5ecdc4a7ea20b4ef542579e1beb49d

Signed-off-by: John Audia <therealgraysky@proton.me>
2022-10-09 22:26:16 +02:00
Robert Marko
17a55f9c9d ipq40xx: add PSGMII PHY mode define
PSGMII is a Qualcomm specific mode similar to QSGMII but it has 5 SGMII
lines instead of 4 in QSGMII.

This just adds the support for the PHY layer to be able to identify the
mode for further use.
It is required for the DSA driver.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2022-10-02 23:04:38 +02:00