this worked in 3.18 but broke at some point. the old code that loaded a
irq table was incorrewct anyhow as it mapped the irqs int he domain which
should really be done when the driver using them loads them and not the
irq driver itself.
Signed-off-by: John Crispin <john@phrozen.org>
even it's a little bit verbose, unmacrod board descriptions are much
easier to read and to understand.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
The user benpicco in #openwrt reported that images are build which are
bigger that the available flash size.
He provided a proof of concept fix and gave permission to me to send it
for inclusion.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The RJ45 WAN port is used for xDSL as well as the IP101A.
The pins 1,2,3,6 of the RJ45 are connected to the IP101A and the
pins 4,5 are connected to the xdsl chip.
Drop the ip101a-rst node. It can't be controlled and is not required
at all.
Signed-off-by: Mathias Kresin <dev@kresin.me>
The STP pinmux was initially added in assumption LAN2 led is driven by
it. It worked somehow because STP group and gphy0 led0 share the GPIO.
Do it the right way by adding the gphy0 led0 the gphy function.
According to the author, the SPI node is a copy & paste leftover. Which
makes sense since nothing is connected to the SPI bus on this device.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Use the brnboot partition layout as it is listed in the OpenWrt wiki
article for this board.
Configure the brnboot root selector for this device as well.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Cleanup the pinmux configuration by removing the unused spi node. Nothing is connected to the SPI bus on devices.
The stp_out pinmux child node covers the same GPIOs as the already used
stp group.
The same applies to the gphy-leds_out pinmux node and the "gphy0
led1" as well as "gphy1 led0" groups.
Signed-off-by: Mathias Kresin <dev@kresin.me>
This patch fixes the missing Lan interface config in the file
/etc/config/network for ARV4518PWR01/A which results in eth0 and br-lan
being down and therefore no way to access the router unless via UART-TTL.
Signed-off-by: Mohammed Berdai <mohammed.berdai@gmail.com>
The only difference between the VG3503J profiles is the version of the
gphy firmware that gets loaded. This can be handled perfect fine in one
device tree source file.
Signed-off-by: Mathias Kresin <dev@kresin.me>
VGV7510KW2 with VRX288 v1.2 has brnboot 1.8 installed. Starting with
this brnboot version, the "GPHY Clock Source" isn't set anymore by
brnboot, with the result that xrx200-net fails to probe/initialize the
phys.
Use the phy clock source device tree binding to specify the clock source.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 49284
brnboot based devices can have two Image partitions. When flashing
images via the brnboot recovery web interface, the Image partitions are
written alternating.
The current active Image partition is stored in the first byte of the
Primary_Setting partition by using 0x00 for Code_Image_0 and 0x01 for
Code_Image_1.
By using the information about the active "Code Image", it is possible
to ensure that the rootfs belongs to the current booted Image/Kernel.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 49281
Starting with kernel 4.4, the use of partitions as direct subnodes of the
mtd device is discouraged and only supported for backward compatiblity
reasons.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 49280
Use the same name for TP-Link images as it was with the old image build
code.
Move the BOARD_ID export to the TP-Link image build recipe, to indicate
that the variable is only related in this context.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 49279
Based on the vg3503j_gphy_led.sh script published in the VG3503J wiki
article, the OEM Firmware uses the following PHY led functionality:
gphy led 0: LINK/ACTIVITY
gphy led 1: LINK
gphy led 2: ACTIVITY
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 49278
The VGV7510KW22 has the leds for LAN1-3 connected to pin1 of the phys
and the led for LAN4 connect to pin0 of the phy. This results with the
current configuration in a fast flashing LAN4 led as soon as a network
cable is connected. Something similar was reported on the forum[1] for
the VGV7519 as well.
Since it isn't predicable to which pin a (single) phy led is connected,
use the (default) pin1 functionality
Constant On: 10/100/1000MBit
Blink Fast: None
Blink Slow: None
Pulse: TX/RX
for all ethernet phy leds.
After checking pictures of all vr9 boards, it looks like only the VG3503J
has more than one led connected per phy. Using the phy led device tree
bindings to assign the functionality to the "additional" leds, the
VG3503J phy leds should behave as before.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
[1] https://forum.openwrt.org/viewtopic.php?pid=321523
SVN-Revision: 49270
