The internal RTC does not work correctly on these Linksys boards based
on Marvell SoCs. It is off by 3 minutes in 10 minutes running, this
was reported by multiple users. On the Linksys Mamba device the device
tree comment says that no crystal is connected to the internal RTC, this
is probably also true for the other devices.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Some boards like the Turris Omnia have an RTC chip that does not get
initialized. Initializing the RTC at the driver level helps get rid of
bootloader hacks that write special register values.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
The patch breaks LED operation and has already been reverted in 4.4.121.
4.9.87 is still affected; revert it locally until the issue is sorted out
upstream.
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
The deletion of the mdio node childs was meant for testing and were
committed accidentally. Without the mdio nodes the network isn't
initialised.
While at it, remove the orphaned qcom-ipq4019-gl-b1300.dts as well.
Fixes: FS#1439
Signed-off-by: Mathias Kresin <dev@kresin.me>
* QCA IPQ4028
* 256 MB of RAM
* 32 MB of SPI NOR flash (mx25l25635e)
* 128 MB of SPI NAND flash (gd5f1gq4ucy1g)
* 2T2R 2.4 GHz
- QCA4019 hw1.0 (SoC)
- uses AP-DK03 BDF from QCA4019/hw1.0/board-2.bin
* 2T2R 5 GHz
- QCA4019 hw1.0 (SoC)
- uses AP-DK03 BDF from QCA4019/hw1.0/board-2.bin
* 2 fully software controllable GPIO-LEDs
* 2 additional GPIO-LEDs which also affect the SIM card detection
* 1x button (reset)
* 1x GPIO buzzer
* 1x USB (xHCI)
* 1x NGFF (USB-only with Dual-SIM support, untested)
* TTL pins are on board (R124 is next to GND, then follows: RX, TX, VCC)
* 2x gigabit ethernet
- phy@mdio4:
+ Manual: Ethernet port 0
+ gmac0 (ethaddr) in original firmware
+ 802.3af POE (HV version)
+ 24v passive POE (LV version)
- phy@mdio3:
+ Manual: Ethernet port 1
+ gmac1 (eth1addr) in original firmware
* DC Jack connector
+ 24-56V (HV version)
+ 12-24V (LV version)
The SPI NAND flash isn't supported at the moment.
The bootloader has to be updated before OpenWrt is installed to fix a
reboot problem. The nor-ipq40xx-single.img from
https://downloads.compex.com.sg/?dir=uploads/QSDK/QCA-Reference/WPJ428/b170123-IPQ40xx-Reference-Firmware
has to be downloaded and the transfered in u-boot via TFTP
set ipaddr 192.168.1.11
set serverip 192.168.1.10
ping ${serverip}
tftpboot 0x84000000 nor-ipq40xx-single.img
imgaddr=0x84000000 && source $imgaddr:script
The sysupgrade image can be installed directly on flash using u-boot:
sf probe
tftpboot 0x84000000 openwrt-ipq40xx-compex_wpj428-squashfs-sysupgrade.bin
sf erase 0x00180000 +$filesize
sf write 0x84000000 0x00180000 $filesize
bootipq
The initramfs image can be started using
tftpboot 0x82000000 openwrt-ipq40xx-compex_wpj428-initramfs-fit-uImage.itb
set fdt_high 0x83000000
bootm 0x82000000
The used SIM card slot can be changed using
# slot 1 (also enables orange LED)
echo 1 > /sys/class/gpio/gpio3/value
# slot 2
echo 0 > /sys/class/gpio/gpio3/value
It can be checked whether a SIM card is inserted in the current slot and
the red LED is subsequently on via:
echo 2 > /sys/class/gpio/export
cat /sys/class/gpio/gpio2/value
Signed-off-by: Sven Eckelmann <sven@narfation.org>
There are 2 ethernet ports on Nexx WT1520 and WT3020. These ethernet
ports are assigned as follows, and other ports cannot be used.
- WT1520:
- port0 -> lan
- port4 -> wan
- WT3020:
- port0 -> wan
- port4 -> lan
I dropped ports that cannot be used.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Hardware highlights:
- SoC: Qualcomm Atheros IPQ8064/5 ARM Dual Core CPU
- RAM: (512MB or 1GB) DDR3 System Memory
- Storage: 32MB NOR (Cypress S25FL256S1)
256MB NAND (Micron MT29F2G08ABBEAH4)
- Ethernet: 5 x 1G via QCA8337N
- USB: 1 x USB 2.0/3.0 + 1 x USB 2.0 on mini PCIe3 socket
- PCIe: 3x mini PCIe (third mini PCIE3 is PCIe/USB shared)
- SIM Card Slot: 2 x Slot
- Buttons: Reset Button
- LEDs: 18x, 8x GPIO controllable
- Buzzer
The correct amount of RAM will be passed by the bootloader.
In contrast to the documentation provided by Compex, the third PCIe
doesn't use GPIO16 for PERST. Instead, GPIO3 is shared and used as PERST
for PCIe0 and PCIe2.
So far, no one was able to get USB 3.0 working with the 1GB RAM version,
while it works fine for my 512MB version. Since USB 3.0 doesn't work with
the Compex firmware for the 1G variant either, it could be a hardware
issue with these boards.
OpenWrt will be installed to the NAND flash. Make sure to have a full
working image on the NOR flash. It will be the backup in case anything
goes wrong.
It has been observed that an image loaded via tftpboot might have
bitflips. Hence the extra step to create a crc32 checksum to allow to
compare the checksum with the one from the source file prior to flashing.
In all cases it is necessary to set the following u-boot parameter to an
empty (whitespace) value, to ensure that the chosen bootargs of the dts
isn't overwritten or set to bogus - not working - values:
(IPQ) # set bootargs " "
(IPQ) # set fsbootargs " "
(IPQ) # saveenv
The sysupgrade image can be installed directly on flash using u-boot (put
jumper in JP13 (leave JP9 open) to boot from nand):
(IPQ) # set serverip 192.168.1.20
(IPQ) # set ipaddr 192.168.1.1
(IPQ) # tftpboot 0x42000000 openwrt-ipq806x-compex_wpq864-squashfs-nand-factory.bin
(IPQ) # crc32 0x42000000 $filesize
(IPQ) # nand erase 0x1340000 0x4000000
(IPQ) # nand write 0x42000000 0x1340000 $filesize
The initramfs image can be started using:
(IPQ) # set fdt_high 0x48000000
(IPQ) # tftpboot 0x44000000 openwrt-ipq806x-compex_wpq864-initramfs-fit-uImage.itb
(IPQ) # bootm 0x44000000
Signed-off-by: Christian Mehlis <christian@m3hlis.de>
Signed-off-by: Mathias Kresin <dev@kresin.me>
Initialise the UBOOT variable by default. Otherwise it will be
unintended inherit to following images if set and causes an uboot build
where not required.
Signed-off-by: Mathias Kresin <dev@kresin.me>
This makes some of the mtd patches apply again after some generic
patches were changed.
These problems where found by build bot.
Fixes: ac9bcefa3b ("kernel: use V10 of mtd patchset adding support for "compatible" string")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This patch adds support for Cisco Meraki MR33
hardware highlights:
SOC: IPQ4029 Quad-Core ARMv7 Processor rev 5 (v7l) Cortex-A7
DRAM: 256 MiB DDR3L-1600 @ 627 MHz Micron MT41K128M16JT-125IT
NAND: 128 MiB SLC NAND Spansion S34ML01G200TFV00 (106 MiB usable)
ETH: Qualcomm Atheros AR8035 Gigabit PHY (1 x LAN/WAN) + PoE
WLAN1: QCA9887 (168c:0050) PCIe 1x1:1 802.11abgn ac Dualband VHT80
WLAN2: Qualcomm Atheros QCA4029 2.4GHz 802.11bgn 2:2x2
WLAN3: Qualcomm Atheros QCA4029 5GHz 802.11a/n/ac 2:2x2 VHT80
LEDS: 1 x Programmable RGB+White Status LED (driven by Ti LP5562 on i2c-1)
1 x Orange LED Fault Indicator (shared with LP5562)
2 x LAN Activity / Speed LEDs (On the RJ45 Port)
BUTTON: one Reset button
MISC: Bluetooth LE Ti cc2650 PG2.3 4x4mm - BL_CONFIG at 0x0001FFD8
AT24C64 8KiB EEPROM
Kensington Lock
Serial:
WARNING: The serial port needs a TTL/RS-232 3V3 level converter!
The Serial setting is 115200-8-N-1. The board has a populated
1x4 0.1" header with half-height/low profile pins.
The pinout is: VCC (little white arrow), RX, TX, GND.
Flashing needs a serial adaptor, as well as patched ubootwrite utility
(needs Little-Endian support). And a modified u-boot (enabled Ethernet).
Meraki's original u-boot source can be found in:
<https://github.com/riptidewave93/meraki-uboot/tree/mr33-20170427>
Add images to do an installation via bootloader:
0. open up the MR33 and connect the serial console.
1. start the 2nd stage bootloader transfer from client pc:
# ubootwrite.py --write=mr33-uboot.bin
(The ubootwrite tool will interrupt the boot-process and hence
it needs to listen for cues. If the connection is bad (due to
the low-profile pins), the tool can fail multiple times and in
weird ways. If you are not sure, just use a terminal program
and see what the device is doing there.
2. power on the MR33 (with ethernet + serial cables attached)
Warning: Make sure you do this in a private LAN that has
no connection to the internet.
- let it upload the u-boot this can take 250-300 seconds -
3. use a tftp client (in binary mode!) on your PC to upload the sysupgrade.bin
(the u-boot is listening on 192.168.1.1)
# tftp 192.168.1.1
binary
put openwrt-ipq40xx-meraki_mr33-squashfs-sysupgrade.bin
4. wait for it to reboot
5. connect to your MR33 via ssh on 192.168.1.1
For more detailed instructions, please take a look at the:
"Flashing Instructions for the MR33" PDF. This can be found
on the wiki: <https://openwrt.org/toh/meraki/mr33>
(A link to the mr33-uboot.bin + the modified ubootwrite is
also there)
Thanks to Jerome C. for sending an MR33 to Chris.
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
Signed-off-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This patch adds support for ASUS RT-AC58U/RT-ACRH13.
hardware highlights:
SOC: IPQ4018 / QCA Dakota
CPU: Quad-Core ARMv7 Processor rev 5 (v7l) Cortex-A7
DRAM: 128 MiB DDR3L-1066 @ 537 MHz (1074?) NT5CC64M16GP-DI
NOR: 2 MiB Macronix MX25L1606E (for boot, QSEE)
NAND: 128 MiB Winbond W25NO1GVZE1G (cal + kernel + root, UBI)
ETH: Qualcomm Atheros QCA8075 Gigabit Switch (4 x LAN, 1 x WAN)
USB: 1 x 3.0 (via Synopsys DesignWare DWC3 controller in the SoC)
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
INPUT: one Reset and one WPS button
LEDS: Status, WAN, WIFI1/2, USB and LAN (one blue LED for each)
Serial:
WARNING: The serial port needs a TTL/RS-232 3V3 level converter!
The Serial setting is 115200-8-N-1. The board has an unpopulated
1x4 0.1" header. The pinout (VDD, RX, GND, TX) is printed on the
PCB right next to the connector.
U-Boot Note: The ethernet driver isn't always reliable and can sometime
time out... Don't worry, just retry.
Access via the serial console is required. As well as a working
TFTP-server setup and the initramfs image. (If not provided, it
has to be built from the OpenWrt source. Make sure to enable
LZMA as the compression for the INITRAMFS!)
To install the image permanently, you have to do the following
steps in the listed order.
1. Open up the router.
There are four phillips screws hiding behind the four plastic
feets on the underside.
2. Connect the serial cable (See notes above)
3. Connect your router via one of the four LAN-ports (yellow)
to a PC which can set the IP-Address and ssh and scp from.
If possible set your PC's IPv4 Address to 192.168.1.70
(As this is the IP-Address the Router's bootloader expects
for the tftp server)
4. power up the router and enter the u-boot
choose option 1 to upload the initramfs image. And follow
through the ipv4 setup.
Wait for your router's status LED to stop blinking rapidly and
glow just blue. (The LAN LED should also be glowing blue).
3. Connect to the OpenWrt running in RAM
The default IPv4-Address of your router will be 192.168.1.1.
1. Copy over the openwrt-sysupgrade.bin image to your router's
temporary directory
# scp openwrt-sysupgrade.bin root@192.168.1.1:/tmp
2. ssh from your PC into your router as root.
# ssh root@192.168.1.1
The default OpenWrt-Image won't ask for a password. Simply hit the Enter-Key.
Once connected...: run the following commands on your temporary installation
3. delete the "jffs2" ubi partition to make room for your new root partition
# ubirmvol /dev/ubi0 --name=jffs2
4. install OpenWrt on the NAND Flash.
# sysupgrade -v /tmp/openwrt-sysupgrade.bin
- This will will automatically reboot the router -
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Rename the dts file to match the used SoC type and drop the unnecessary
KERNEL_INSTALL from the image build code.
Remove the fixed rootfs and kernel partitions and create an image with
rootfs appended after kernel.
Setup a switch portmap matching the hardware and a default network/switch
configuration to make make the second lan port working. Use eth0 as lan
to have it consistent accross the target.
Use the power LED to indicate the boot status.
Sort the SoC entries within the dts by address and use dtc labels
whenever possible.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
This removes the block- and pagesize from the FritzBox 4040
image description, fixing incorrectly working sysupgrade.
With this commit, the default values for block- and pagesize are
used.
Signed-off-by: David Bauer <mail@david-bauer.net>
[chunkeey@gmail.com: removed 105-mtd-nor-add-mx25l25635f.patch as well]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Sort the soc entries in the dts by address and use dtc labels whenever
possible.
Adjust the DTS files, the OpenMesh A42 is actually an IPQ4018 and not an
IPQ4019.
Signed-off-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
There's an interaction issue between the clk changes:"
clk: qcom: ipq4019: Add the apss cpu pll divider clock node
clk: qcom: ipq4019: remove fixed clocks and add pll clocks
" and the cpufreq-dt.
cpufreq-dt is now spamming the kernel-log with the following:
[ 1099.190658] cpu cpu0: dev_pm_opp_set_rate: failed to find current OPP
for freq 761142857 (-34)
This only happens on certain devices like the Compex WPJ428
and AVM FritzBox!4040. However, other devices like the Asus
RT-AC58U and Meraki MR33 work just fine.
The issue stem from the fact that all higher CPU-Clocks
are achieved by switching the clock-parent to the P_DDRPLLAPSS
(ddrpllapss). Which is set by Qualcomm's proprietary bootcode
as part of the DDR calibration.
For example, the FB4040 uses 256 MiB Nanya NT5CC128M16IP clocked
at round 533 MHz (ddrpllsdcc = 190285714 Hz).
whereas the 128 MiB Nanya NT5CC64M16GP-DI in the ASUS RT-AC58U is
clocked at a slightly higher 537 MHz ( ddrpllsdcc = 192000000 Hz).
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
In the commit bde5e7a632 ("kernel: backport mtd implementation for
"compatible" in "partitions" subnode") patches that got accepted into
l2-mtd.git were backported to the kernels 4.9 and 4.14. Unfortunately
there was a regression report, patches were dropped and never reached
4.16.
This commit replaces these pseudo-backports with the latest version
that includes regression fix and futher changes that were requested.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Revert the changes I applied to aa5014dd1a ("ramips: mt7620n: enable
port 4 as EPHY by default").
The driver expects a node mdio-bus to be present, regardless of the
actual node status. If the node is missing the driver fails to load with
mtk_soc_eth 10100000.ethernet: no mdio-bus child node found
Disable port4 by default again. If the port is enabled but not present, a
"invalid port id 4" warning is shown during boot.
Fixes: FS#1428
Signed-off-by: Mathias Kresin <dev@kresin.me>
In kernels 4.0 and older that header file was located in some subdir of
arch/mips/include. Target brcm47xx supports kernels 4.4 and 4.9 only so
that code isn't needed anymore.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
If CONFIG_GPIO_SYSFS=n, compilation fails with
drivers/built-in.o: In function `gpio_export_with_name':
include/asm-generic/gpio.h:128: undefined reference to `__gpiod_export'
This is because the stub in that case has the wrong name,
_gpiod_export() - note the missing underscore (_) at the
start.
Fix the stub, and add the correct prototype for the real
implementation.
Signed-off-by: André Draszik <git@andred.net>
Optimize the compiler output for larger cache blast cases that are
common for DMA-based networking.
On ar71xx, I measured a routing throughput increase of ~8%
Signed-off-by: Ben Menchaca <ben.menchaca@qca.qualcomm.com>
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This reverts the changes needed for the upstream b53 DSA switch driver
to use the OpenWrt b43 swconfig switch driver instead.
Tested-by: TheWerthFam <thewerthfam@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit introduces new subtarget for Marvell EBU Armada Cortex A53
processor based devices.
The first device is Globalscale ESPRESSObin. Some hardware specs:
SoC: Marvell Armada 3700LP (88F3720) dual core ARM Cortex A53
processor up to 1.2GHz
RAM: 512MB, 1GB or 2GB DDR3
Storage: SATA interface
µSD card slot with footprint for an optional 4GB EMMC
4MB SPI NOR flash for bootloader
Ethernet: Topaz Networking Switch (88E6341) with 3x GbE ports
Connectors: USB 3.0
USB 2.0
µUSB port connected to PL2303SA (USB to serial bridge
controller) for UART access
Expansion: 2x 46-pin GPIO headers for accessories and shields with
I2C, GPIOs, PWM, UART, SPI, MMC, etc
MiniPCIe slot
Misc: Reset button, JTAG interface
Currently booting only from µSD card is supported.
The boards depending on date of dispatch can come with various U-Boot
versions. For the newest version 2017.03-armada-17.10 no manual
intervention should be needed to boot OpenWrt image. For the older ones
it's necessary to modify default U-Boot environment:
1. Interrupt boot process to run U-Boot command line,
2. Run following commands:
(for version 2017.03-armada-17.06 and 2017.03-armada-17.08)
setenv bootcmd "load mmc 0:1 0x4d00000 boot.scr; source 0x4d00000"
saveenv
(for version 2015.01-armada-17.02 and 2015.01-armada-17.04)
setenv bootargs "console=ttyMV0,115200 root=/dev/mmcblk0p2 rw rootwait"
setenv bootcmd "ext4load mmc 0:1 ${fdt_addr} armada-3720-espressobin.dtb; ext4load mmc 0:1 ${kernel_addr} Image; booti ${kernel_addr} - ${fdt_addr}"
saveenv
3. Poweroff, insert SD card with OpenWrt image, boot and enjoy.
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
Adds support for the Turris Omnia and builds an eMMC sysupgrade image in
the same format as the SolidRun ClearFog.
An initramfs image in the simple yet Omnia-specific 'medkit' image format
is also built in order to ease the initial flashing process.
Notable hardware support omissions are support for switching between SFP
cage and copper PHY, and RGB LED control.
Due to a current limitation of DSA, only 1/2 CPU switch uplinks are used.
Specifications:
- Marvell Armada 385 1.6GHz dual-core ARMv7 CPU
- 1GB DDR3 RAM
- 8GB eMMC Flash
- 5x Gigabit LAN via Marvell 88E6176 Switch (2x RGMII CPU ports)
- 1x switchable RJ45 (88E1514 PHY) / SFP SGMII WAN
- 2x USB 3.0
- 12x dimmable RGB LEDs controlled by independent MCU
- 3x Mini PCIe slots
- Optional Compex WLE200N2 Mini PCIe AR9287 2x2 802.11b/g/n (2.4GHz)
- Optional Compex WLE900VX Mini PCIe QCA9880 3x3 802.11ac (2.4 / 5GHz)
- Optional Quectel EC20 Mini PCIe LTE modem
Flash instructions:
If the U-Boot environment has been modified previously (likely manually via
serial console), first use serial to reset the default environment.
=> env default -a
=> saveenv
Method 1 - USB 'medkit' image w/o serial
- Copy openwrt-mvebu-turris-omnia-sysupgrade.img.gz and
omnia-medkit-openwrt-mvebu-turris-omnia-initramfs.tar.gz to the root of a
USB flash drive formatted with FAT32 / ext2/3/4 / btrfs / XFS.
Note that the medkit MUST be named omnia-medkit*.tar.gz
- Disconnect other USB devices from the Omnia and connect the flash drive
to either USB port.
- Power on the Omnia and hold down the rear reset button until 4 LEDs are
illuminated, then release.
- Wait approximately 2 minutes for the Turris Omnia to flash itself with
the temporary image, during which LEDs will change multiple times.
- Connect a computer to a LAN port of the Turris Omnia with a DHCP client
- (if necessary) ssh-keygen -R 192.168.1.1
- ssh root@192.168.1.1
$ mount /dev/sda1 /mnt
$ sysupgrade /mnt/openwrt-mvebu-turris-omnia-sysupgrade.img.gz
- Wait another minute for the final OpenWrt image to be flashed. The Turris
Omnia will reboot itself and you can remove the flash drive.
Method 2 - TFTP w/ serial
- Extract omnia-medkit-openwrt-mvebu-turris-omnia-initramfs.tar.gz and copy
dtb + zImage to your TFTP server (rename if desired)
- Connect Turris Omnia WAN port to DHCP-enabled network with TFTP server
- Connect serial console and interrupt U-Boot
=> dhcp
=> setenv serverip <tftp_server_ip_here>
=> tftpboot 0x01000000 zImage
=> tftpboot 0x02000000 dtb
=> bootz 0x01000000 - 0x02000000
- OpenWrt will now boot from ramdisk
- Download openwrt-mvebu-turris-omnia-sysupgrade.img.gz to /tmp/
$ sysupgrade /tmp/openwrt-mvebu-turris-omnia-sysupgrade.img.gz
- Wait another minute for the final OpenWrt image to be flashed. The Turris
Omnia will reboot itself.
Signed-off-by: Ryan Mounce <ryan@mounce.com.au>
As at this commit, DSA is not enabled in the kernel config for mvebu, so these
nodes have been ignored. In preparation for the first mvebu board using DSA,
disable these nodes for existing boards to avoid issues.
Signed-off-by: Ryan Mounce <ryan@mounce.com.au>
Only register the chipidea usb device if the strapping option indicates
device mode. If not, use the regular ehci platform driver.
Add qca955x device mode support, tested on 8devices Rambutan.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
The Lantiq XRX200 aka VR9 doesn't have an asc0. Instead,
there is an USIF module which can either be an UART or a
SPI Controller.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
According to the datasheet the mt7620n have a fixed switch configuration
with 5 ephy (10/100) port. No RGMII configuration is possible.
Drop the mdio node as well. Without RGMII, the mdio node doesn't make any
sense
Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
[drop mdio node, enable port4 by default]
Signed-off-by: Mathias Kresin <dev@kresin.me>
In some boards port 4 of mt7620 switch is powered down in bootloader
configuration as lan/wan package leak mitigation.
Reset ephy port 4 to default settings to power up the port.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
[clarify issue in commit message]
Signed-off-by: Mathias Kresin <dev@kresin.me>
This bumps the 4.4. kernel in master to 4.4.119.
Includes more Meltdown & Spectre mitigation.
* Refresh patches.
* Refresh x86/config for RETPOLINE.
* Deleted 8049-PCI-layerscape-Add-fsl-ls2085a-pcie-compatible-ID.patch (accepted upstream)
* Deleted 8050-PCI-layerscape-Fix-MSG-TLP-drop-setting.patch (accepted upstream)
* Deleted 650-pppoe_header_pad.patch (does not apply anymore (code was replaced)).
Bumps from 4.4.112 to 4.4.115 were handled by Kevin Darbyshire-Bryant.
Compile-tested on: ar71xx & oxnas.
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Rosen Penev <rosenp@gmail.com>
