This is the case e.g. if JFFS2 partition is full.
see: https://www.mail-archive.com/linux-unionfs@vger.kernel.org/msg00246.html
(a small error in a logmessage was changed and reported upstream)
runtime tested on ar71xx with kernel 3.18.11 and r45772
this paritially fixes#19564
Signed-off-by: Bastian Bittorf <bittorf@bluebottle.com>
Acked-by: Jo-Philipp Wich <jow@openwrt.org>
SVN-Revision: 45833
This patch is to add support for the Meraki MR12 and MR16 Access Points.
Currently everything is working, minus the 2nd NIC interface on the MR12
which is built into the SoC.
Signed-off-by: Chris R Blake <chrisrblake93 at gmail.com>
SVN-Revision: 45726
There are 2 images missing: TLWR2543 TLWR1043V2 which have special properties.
v2: set correct DEVICE_PROFILES for all images.
v2: migrate TP-LINK TL-WR710N v2 which was committed after v1.
v2: split very very long line `TARGET_DEVICES +=` into smaller parts
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
SVN-Revision: 45643
Users will now be provided with the inherent wifi toggle functionality
of /etc/rc.button/rfkill
Signed-off-by: Michael J. Bazzinotti <mbazzinotti@gmail.com>
SVN-Revision: 45635
Originally pressing a button would trigger a release state and vice-versa,
as observed from hotplug.d.
Signed-off-by: Michael J. Bazzinotti <mbazzinotti@gmail.com>
SVN-Revision: 45634
Most people report broken ethernet with upstream. Last year, user "franz.flasch"
authored a working mach-file. His patch is outdated so I modernized it. Original
patch and user commentary on page 1:
https://forum.openwrt.org/viewtopic.php?pid=260861#p260861
I have figured out what the critical differences are between the two that caused
upstream ethernet to break.
1) Both ath79_init_mac() functions calls must be invocated before any GMAC init
2) must init GMAC0 before GMAC1
That was enough to get upstream to function, but I wanted to enjoy my confidence
having tested franz's patch for a week sucessfully, so I put his whole
function in, which only features more differences in order of function calls.
An expert should consider these changes, which could pose potential bugs/issues:
1) No longer using the flag AR934X_ETH_CFG_SW_PHY_SWAP in the
ath79_setup_ar934x_eth_cfg() call.
2) Possible consequence of no longer explicitly setting ethernet duplex/speed.
Review: With this patch, my ethernet and wireless works.
Signed-off-by: Michael J. Bazzinotti <mbazzinotti@gmail.com>
SVN-Revision: 45633
It is common that the router provider be used rather than product name.
One can see this in target/linux/ar71xx/base-files/etc/uci-defaults/01_leds
Signed-off-by: Michael J. Bazzinotti <mbazzinotti@gmail.com>
SVN-Revision: 45630
This patch adds support for the XW version of the Rocket M series devices
manufactured by Ubiquiti, based on the Atheros AR9342 SoC.
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
SVN-Revision: 45553
It was reported that OM5P-AN needs not only a delay setting of 1 for RXD/RDV
but 2. These was found when testing with a NetGear GS752TP POE switch with a
cable length of 50ft and 250ft.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 45524
The ETH_RXDV_DELAY (17:16) and ETH_RXD_DELAY (15:14) are currently not cleared
by the function ath79_setup_ar934x_eth_cfg. Clearing these in the
ath79_setup_ar934x_eth_cfg may cause problems on some hardware because they
rely on the preset value by the bootloader.
Instead another function is introduced which also works on ETH_CFG on AR934x.
It can be used to safely clear and set ETH_RXDV_DELAY and ETH_RXD_DELAY on
machines which require special settings.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 45523
The commit r38948 ("ag71xx: add F1E specific feature bit definitions to AR934X
register file") introduced definitions for some bits in the RDV/RXD part of the
ETH_CFG register of AR934x. These are incomplete because ETH_RXDV_DELAY is
specified as 17:16 and ETH_RXD_DELAY is specified 15:14. The original commit
only specified the lower bits. The upper bits also have to be unset when the
lower bits should only be set.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 45522
The tx/rx delay bits in the ETH_XMII_CONTROL register have to be unset when the
enable_rgmii_rx_delay/enable_rgmii_tx_delay will be set in the AT803x PHY.
Othwise the throughput in gigabit mode is heavily reduced.
Signed-off-by: Sven Eckelmann <sven@open-mesh.org>
SVN-Revision: 45521
Profile definitions need to be checked and fixed before this patch can
be applied again.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 45511
The new building code included the rootfs twice when building tplink initramfs images.
To make it more readable move initramfs into an own build step
Build/mktplinkfw-initramfs.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
SVN-Revision: 45491
The new image size is verified by a running tplink device and checked
against mktplinkfw source code.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
SVN-Revision: 45488
Open-Mesh OM5P-AN use a AT8035 (F1E) behind one of the ethernet ports. This PHY
requires special flags to work correctly. Otherwise massive packet loss happens
with active POE or when switching the link speed from gigabit ethernet to fast
ethernet. The generic PHY doesn't have support to change these settings.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 45439
The OM5P-AN boards are suffering from ethernet packet loss when booting with
some active POE setups or when switching to Fast Ethernet when previously
booted with Gigabit ethernet attached.
The cause of the problem is that the AR8035 PHYs requires special register
settings to work reliably on these boards. Enable the RGMII TX, RX delays and
disable SmartEE functionality of the AR8035 PHYs. Also enable the RXD and RDV
delay in the ETH_CFG register to fix the issue.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 45438
None of the LEDs are enabled by default on the Hornet-UB X2 board
(the 16/64MB version of the Hornet-UB), because it uses a different
board-name ("hornet-ub-x2"); but hornet-ub and hornet-ub-x2 boards
are equivalent WRT their LEDs.
SIgned-off-by: Joshua Judson Rosen <jrosen@harvestai.com>
SVN-Revision: 45328
On newer Mikrotik boards, the radio calibration data
is stored differently and uses LZO compression instead
of RLE.
Update the RouterBOOT helper code to support the new
format.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 45297
