Commit Graph

8 Commits

Author SHA1 Message Date
Ansuel Smith
abc17bf306 ath79: convert mtd-mac-address to nvmem implementation
Define nvmem-cells and convert mtd-mac-address to nvmem implementation.
The conversion is done with an automated script.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
2021-07-19 14:51:22 +02:00
Ansuel Smith
d284e6ef0f treewide: convert mtd-mac-address-increment* to generic implementation
Rework patch 681-NET-add-mtd-mac-address-support to implement
only the function to read the mac-address from mtd.
Generalize mtd-mac-address-increment function so it can be applied
to any source of of_get_mac_address.
Rename any mtd-mac-address-increment to mac-address-increment.
Rename any mtd-mac-address-increment-byte to mac-address-increment-byte.

This should make simplify the conversion of target to nvmem implementation.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
2021-07-19 14:51:22 +02:00
Michael Pratt
a58cb22bbe ath79: adjust ath79/tiny Senao APs to 4k blocksize
ath79/tiny kernel config has
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
from commit
05d35403b2

Because of this, these changes are required for 2 reasons:

1.

Senao devices in ath79/tiny
with a 'failsafe' partition and the tar.gz sysupgrade platform
and a flash chip that supports 4k sectors
will fail to reboot to openwrt after a sysupgrade.

the stored checksum is made with the 64k blocksize length
of the image to be flashed,
and the actual checksum changes after flashing due to JFFS2 space
being formatted within the length of the rootfs from the image

example:
0x440000 length of kernel + rootfs (from sysupgrade.bin)
0x439000 offset of rootfs_data (from kernel log)

2.

for boards with flash chips that support 4k sectors:
saving configuration over sysupgrade is not possible
because sysupgrade.tgz is appended at a 64k boundary
and the mtd parser starts JFFS2 at a 4k boundary.

for boards with flash chips that do not support 4k sectors:
partitioning with 4k boundaries causes a boot loop
from the mtd parser not finding kernel and rootfs.

Also:

Some of the Senao boards that belong in ath79/tiny,
for example ENH202,
have a flash chip that does not support 4k sectors
(no SECT_4K symbol in upstream source).

Because of this, partitioning must be different for these devices
depending on the flash chip model detected by the kernel.

Therefore:

this creates 2 DTSI files
to replace the single one with 64k partitioning
for 4k and 64k partitioning respectively.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
2021-04-08 09:20:59 +02:00
Adrian Schmutzler
4204d70d7a ath79: create common DTSI for Senao ar724x APs
This creates a shared DTSI for ar724x Senao/Engenius APs:

 - ENH202 v1
 - EAP350 v1
 - ECB350 v1

Since ar7240/ar7242 have different configuration, this new file
mostly contains the partitioning.

Suggested-by: Michael Pratt <mcpratt@pm.me>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00
Adrian Schmutzler
3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00
Bjørn Mork
01a1e21863 kernel: mtdsplit_uimage: replace "openwrt, okli" parser
The only difference between the "openwrt,okli" and the generic
parser is the magic.  Set this in device tree for all affected
devices and  remove the "openwrt,okli" parser.

Tested-by: Michael Pratt <mcpratt@protonmail.com> # EAP300 v2, ENS202EXT and ENH202
Signed-off-by: Bjørn Mork <bjorn@mork.no>
2021-01-22 21:03:11 +01:00
Adrian Schmutzler
1fb40a72da treewide: use more descriptive names for concatenated partitions
A few devices in ath79 and ramips use mtd-concat to concatenate
individual partitions into a bigger "firmware" or "ubi" partition.

However, the original partitions are still present and visible,
and one can write to them directly although this might break the
actual virtual, concatenated partition.

As we cannot do much about the former, let's at least choose more
descriptive names than just "firmwareX" in order to indicate the
concatenation to the user. He might be less tempted into overwriting
a "fwconcat1" than a "firmware1", which might be perceived as an
alternate firmware for dual boot etc.

This applies the new naming consistently for all relevant devices,
i.e. fwconcatX for virtual "firmware" members and ubiconcatX for
"ubi" members.

While at it, use DT labels and label property consistently, and
also use consistent zero-based indexing.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-12-27 20:33:45 +01:00
Michael Pratt
7073ebf0f9 ath79: add support for Senao Engenius ECB350 v1
FCC ID: A8J-ECB350

Engenius ECB350 v1 is an indoor wireless access point with a gigabit ethernet port,
2.4 GHz wireless, external antennas, and PoE.

**Specification:**

  - AR7242 SOC
  - AR9283 WLAN			2.4 GHz (2x2), PCIe on-board
  - AR8035-A switch		RGMII, GbE with 802.3af PoE
  - 40 MHz reference clock
  - 8 MB FLASH			25L6406EM2I-12G
  - 32 MB RAM
  - UART at J2			(populated)
  - 2 external antennas
  - 3 LEDs, 1 button		(power, lan, wlan) (reset)

**MAC addresses:**

  MACs are labeled as WLAN and WAN
  vendor MAC addresses in flash are duplicate

  phy0	WLAN	*:b8	---
  eth0	WAN	*:b9	art 0x0/0x6

**Installation:**

  - if you get Failsafe Mode from failed flash:
      only use it to flash Original firmware from Engenius
      or risk kernel loop or halt which requires serial cable

  Method 1: Firmware upgrade page:

  OEM webpage at 192.168.1.1
  username and password "admin"
  Navigate to "Firmware" page from left pane
  Click Browse and select the factory.bin image
  Upload and verify checksum
  Click Continue to confirm and wait 3 minutes

  Method 2: Serial to load Failsafe webpage:

  After connecting to serial console and rebooting...
  Interrupt uboot with any key pressed rapidly
  execute `run failsafe_boot` OR `bootm 0x9f670000`
  wait a minute
  connect to ethernet and navigate to
  "192.168.1.1/index.htm"
  Select the factory.bin image and upload
  wait about 3 minutes

**Return to OEM:**

  If you have a serial cable, see Serial Failsafe instructions
  otherwise, uboot-env can be used to make uboot load the failsafe image

  *DISCLAIMER*
  The Failsafe image is unique to Engenius boards.
  If the failsafe image is missing or damaged this will not work
  DO NOT downgrade to ar71xx this way, it can cause kernel loop or halt

  ssh into openwrt and run
  `fw_setenv rootfs_checksum 0`
  reboot, wait 3 minutes
  connect to ethernet and navigate to 192.168.1.1/index.htm
  select OEM firmware image from Engenius and click upgrade

**TFTP recovery** (unstable / not reliable):

  rename initramfs to 'vmlinux-art-ramdisk'
  make available on TFTP server at 192.168.1.101
  power board while holding or pressing reset button repeatedly

  NOTE: for some Engenius boards TFTP is not reliable
  try setting MTU to 600 and try many times

**Format of OEM firmware image:**

  The OEM software of ECB350 v1 is a heavily modified version
  of Openwrt Kamikaze. One of the many modifications
  is to the sysupgrade program. Image verification is performed
  by the successful ungzip and untar of the supplied file
  and name check and header verification of the resulting contents.
  To form a factory.bin that is accepted by OEM Openwrt build,
  the kernel and rootfs must have specific names
  and begin with the respective headers (uImage, squashfs).
  Then the files must be tarballed and gzipped.
  The resulting binary is actually a tar.gz file in disguise.
  This can be verified by using binwalk on the OEM firmware images,
  ungzipping then untaring.

  The OEM upgrade script is at /etc/fwupgrade.sh.

  OKLI kernel loader is required because the OEM software
  expects the kernel size to be no greater than 1536k
  and otherwise the factory.bin upgrade procedure would
  overwrite part of the kernel when writing rootfs.
  The factory upgrade script follows the original mtd partitions.

**Note on PLL-data cells:**

  The default PLL register values will not work
  because of the AR8035 switch between
  the SOC and the ethernet port.

  For AR724x series, the PLL register for GMAC0
  can be seen in the DTSI as 0x2c.
  Therefore the PLL register can be read from u-boot
  for each link speed after attempting tftpboot
  or another network action using that link speed
  with `md 0x1805002c 1`

  However the registers that u-boot sets are not ideal and sometimes wrong...
  the at803x driver supports setting the RGMII clock/data delay on the PHY side.
  This way the pll-data register only needs to handle invert and phase.

  for this board no extra adjustements are needed on the MAC side
  all link speeds functional

Signed-off-by: Michael Pratt <mcpratt@pm.me>
2020-12-22 19:11:50 +01:00