Commit Graph

13 Commits

Author SHA1 Message Date
Adrian Schmutzler
3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00
Adrian Schmutzler
3ca2d31c54 ath79: move ath79-clk.h include to ath79.dtsi
ath79.dtsi uses ATH79_CLK_MDIO, so the include

  <dt-bindings/clock/ath79-clk.h>

needs to be moved there.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-09-25 23:24:09 +02:00
Adrian Schmutzler
0cfdc7d446 target: update SPDX license names
SPDX moved from GPL-2.0 to GPL-2.0-only and from GPL-2.0+ to
GPL-2.0-or-later. Reflect that in the SPDX license headers.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-09-22 20:58:26 +02:00
Chuanhong Guo
028daa9974 ath79: ag71xx: apply interface mode to MII0/1_CTRL on ar71xx/ar913x
We currently don't have any code configuring interface mode in ath79,
meaning that we relies on bootloader to set the correct interface mode.

This patch added code to set interface correctly so that everything works
even if bootloader configures it wrong.(e.g. on WNDR3800 u-boot set
the second GMAC mode to RMII but it should be RGMII.)

Introduced "qca,mac-idx" for the difference in MII_CTRL register value.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-08-28 11:26:53 +02:00
Chuanhong Guo
cf50f72069 ath79: ar913x: fix eth pll register
PLL for eth0 internal clock on ar913x is at 0x18050014
and AR913X_ETH0_PLL_SHIFT is 20 instead of 17

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-08-13 08:37:19 +02:00
Chuanhong Guo
8e4e545ecb ath79: fix eth pll for ar913x
PLL node is missing syscon in compatible string.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-08-11 21:46:18 +02:00
Chuanhong Guo
387736af41 ath79: ag71xx: remove PHY reset
Bit 8/12 of reset controller which is marked as PHY_RESET/SWITCH_RESET
in datasheets will trigger either a reset for builtin switch or assert
an external ETH0_RESET_L/ETH1_RESET_L pin, which are usually connected
to external PHY/switch. None of them should be triggered every time an
interface is brought up in ethernet driver.

Remove PHY reset support from ag71xx and definition for them in dtsi.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2018-08-09 18:44:57 +02:00
Alex Maclean
5b0c899bfd ath79: correct wmac names in dts
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
2018-06-01 08:23:47 +02:00
Lucian Cristian
253095131d ath79: initial tl-wr1043nd v1 support
Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
Signed-off-by: John Crispin <john@phrozen.org>
2018-05-24 15:43:39 +02:00
Matthias Schiffer
aea146736c
ath79: fix TP-Link TL-WR1043ND v1 image build
Both initramfs and flashed images are built and boot. No Ethernet, no WLAN,
probably further issues, so the image is not added to TARGET_DEVICES for
now.

Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
2018-05-17 22:11:56 +02:00
John Crispin
7fe77a5962 ath79: revert license change on upstream DTS files
Signed-off-by: John Crispin <john@phrozen.org>
2018-05-07 12:52:03 +02:00
Rafał Miłecki
66c8afd115 ath79: relicense DTS files to the GPL 2.0+ / MIT
Some maintainers prefer DTS files licensed under permissive license like
MIT / BSD. As all DT bindings should be OS independent and DTS files are
pretty separated from Linux code it probably makes sense to share them
across projects.

The safest solution is to use dual licensing: that way it stays clear
these files can be used in GPL projects without depending on current
belief of licenses compatibility.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: John Crispin <john@phrozen.org>
2018-05-07 10:31:35 +02:00
John Crispin
53c474abbd ath79: add new OF only target for QCA MIPS silicon
This target aims to replace ar71xx mid-term. The big part that is still
missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
subtargets will follow.

Signed-off-by: John Crispin <john@phrozen.org>
2018-05-07 08:06:51 +02:00