Some Russian d-link routers require that their firmware be signed with a
salted md5 checksum followed by the bytes 0x00 0xc0 0xff 0xee. This tool
signs factory images the OEM's firmware accepts them.
Signed-off-by: Andrew Pikler <andrew.pikler@gmail.com>
Specifications:
* QCA9557, 16 MiB Flash, 128 MiB RAM, 802.11n 2T2R
* QCA9882, 802.11ac 2T2R
* Gigabit LAN Port (AR8035), 802.11af PoE
Installation:
* Factory Web UI is at 192.168.0.50
login with 'admin' and blank password, flash factory.bin
* Recovery Web UI is at 192.168.0.50
connect network cable, hold reset button during power-on and keep it
pressed until uploading has started (only required when checksum is ok,
e.g. for reverting back to oem firmware), flash factory.bin
After flashing factory.bin, additional free space can be reclaimed by
flashing sysupgrade.bin, since the factory image requires some padding
to be accepted for upgrading via OEM Web UI.
Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
The Ubiquiti Network airCube AC is a cube shaped device supporting
2.4 GHz and 5 GHz with internal 2x2 MIMO antennas.
It can be powered with either one of:
- 24v power supply with 3.0mm x 1.0mm barrel plug
- 24v passive PoE on first LAN port
There are four 10/100/1000 Mbps ports (1 * WAN + 3 * LAN).
First LAN port have optional PoE passthrough to the WAN port.
SoC: Qualcomm / Atheros AR9342
RAM: 64 MB DDR2
Flash: 16 MB SPI NOR
Ethernet: 4x 10/100/1000 Mbps (1 WAN + 3 LAN)
LEDS: 1x via a SPI controller (not yet supported)
Buttons: 1x Reset
Serial: 1x (only RX and TX); 115200 baud, 8N1
Missing features:
- LED control is not supported
Physical to internal switch port mapping:
- physical port #1 (poe in) = switchport 2
- physical port #2 = switchport 3
- physical port #3 = switchport 5
- physical port #4 (wan/poe out) = switchport 4
Factory update is tested and is the same as for Ubiquiti AirCube ISP
hence the shared configuration between that devices.
Signed-off-by: Roman Kuzmitskii <damex.pp@icloud.com>
This patch adds support for the MikroTik RouterBOARD wAPR-2nD (wAP R)
router, a weatherproof 2.4 GHz access point with a miniPCI-e slot and
a SIM card slot.
Specifications:
- SoC: Qualcomm Atheros QCA9533
- Flash: 16 MB (SPI)
- RAM: 64 MB
- Ethernet: 1x 10/100 Mbps (PoE in)
- WiFi: AR9531 2T2R 2.4 GHz (SoC)
- miniPCI-e slot
- 4x green LEDs (1x WiFi, 3x RSSI)
- 1x reset button
See https://mikrotik.com/product/RBwAPR-2nD for more details.
Flashing:
TFTP boot initramfs image and then perform sysupgrade. Follow common
MikroTik procedure as in https://openwrt.org/toh/mikrotik/common.
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
Device specifications:
* QCA IPQ4019
* 256 MB of RAM
* 32 MB of SPI NOR flash (w25q256)
- 2x 15 MB available; but one of the 15 MB regions is the recovery image
* 2T2R 2.4 GHz
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=20,variant=PlasmaCloud-PA2200
* 2T2R 5 GHz (channel 36-64)
- QCA9888 hw2.0 (PCI)
- requires special BDF in QCA9888/hw2.0/board-2.bin
bus=pci,bmi-chip-id=0,bmi-board-id=16,variant=PlasmaCloud-PA2200
* 2T2R 5 GHz (channel 100-165)
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=21,variant=PlasmaCloud-PA2200
* GPIO-LEDs for 2.4GHz, 5GHz-SoC and 5GHz-PCIE
* GPIO-LEDs for power (orange) and status (blue)
* 1x GPIO-button (reset)
* TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX)
* 2x gigabit ethernet
- phy@mdio3:
+ Label: Ethernet 1
+ gmac0 (ethaddr) in original firmware
+ used as LAN interface
- phy@mdio4:
+ Label: Ethernet 2
+ gmac1 (eth1addr) in original firmware
+ 802.3at POE+
+ used as WAN interface
* 12V 2A DC
Flashing instructions:
The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be
used to transfer the factory image to the u-boot when the device boots up.
Signed-off-by: Marek Lindner <marek.lindner@kaiwoo.ai>
[sven@narfation.org: prepare commit message, rebase, use all LEDs, switch
to dualboot_datachk upgrade script, use eth1 as designated WAN interface]
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Device specifications:
* QCA IPQ4018
* 256 MB of RAM
* 32 MB of SPI NOR flash (w25q256)
- 2x 15 MB available; but one of the 15 MB regions is the recovery image
* 2T2R 2.4 GHz
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=16,variant=PlasmaCloud-PA1200
* 2T2R 5 GHz
- QCA4019 hw1.0 (SoC)
- requires special BDF in QCA4019/hw1.0/board-2.bin with
bus=ahb,bmi-chip-id=0,bmi-board-id=17,variant=PlasmaCloud-PA1200
* 3x GPIO-LEDs for status (cyan, purple, yellow)
* 1x GPIO-button (reset)
* 1x USB (xHCI)
* TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX)
* 2x gigabit ethernet
- phy@mdio4:
+ Label: Ethernet 1
+ gmac0 (ethaddr) in original firmware
+ used as LAN interface
- phy@mdio3:
+ Label: Ethernet 2
+ gmac1 (eth1addr) in original firmware
+ 802.3af/at POE(+)
+ used as WAN interface
* 12V/24V 1A DC
Flashing instructions:
The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be
used to transfer the factory image to the u-boot when the device boots up.
Signed-off-by: Marek Lindner <marek.lindner@kaiwoo.ai>
[sven@narfation.org: prepare commit message, rebase, use all LEDs, switch
to dualboot_datachk upgrade script, use eth1 as designated WAN interface]
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Other vendors are using functionality similar to the ones OpenMesh used to
implement two areas on the flash to store the default image and a fallback
image. So just change the name to dualboot_datachk.sh to avoid duplicated
code just to have the same script for different vendors.
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Device specifications:
* Qualcomm/Atheros QCA9533 v2
* 650/600/217 MHz (CPU/DDR/AHB)
* 64 MB of RAM
* 16 MB of SPI NOR flash (mx25l12805d)
- 2x 7 MB available; but one of the 7 MB regions is the recovery image
* 2x 10/100 Mbps Ethernet
* 2T2R 2.4 GHz Wi-Fi
* multi-color LED (controlled via red/green/blue GPIOs)
* 1x GPIO-button (reset)
* external h/w watchdog (enabled by default)
* TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX)
* 2x fast ethernet
- eth0
+ Label: Ethernet 1
+ 24V passive POE (mode B)
+ used as WAN interface
- eth1
+ Label: Ethernet 2
+ 802.3af POE
+ builtin switch port 2
+ used as LAN interface
* 12-24V 1A DC
* external antennas
Flashing instructions:
The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be
used to transfer the factory image to the u-boot when the device boots up.
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Device specifications:
* Qualcomm/Atheros QCA9533 v2
* 650/600/217 MHz (CPU/DDR/AHB)
* 64 MB of RAM
* 16 MB of SPI NOR flash (mx25l12805d)
- 2x 7 MB available; but one of the 7 MB regions is the recovery image
* 2x 10/100 Mbps Ethernet
* 2T2R 2.4 GHz Wi-Fi
* multi-color LED (controlled via red/green/blue GPIOs)
* 1x GPIO-button (reset)
* external h/w watchdog (enabled by default)
* TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX)
* 2x fast ethernet
- eth0
+ Label: Ethernet 1
+ 24V passive POE (mode B)
+ used as WAN interface
- eth1
+ Label: Ethernet 2
+ 802.3af POE
+ builtin switch port 2
+ used as LAN interface
* 12-24V 1A DC
* internal antennas
Flashing instructions:
The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be
used to transfer the factory image to the u-boot when the device boots up.
Signed-off-by: Sven Eckelmann <sven@narfation.org>
The MIPS code is supposed to fall back to u-boots bootargs whenever the
/chosen/bootargs property is missing. But this feature was accidentally
disabled when the boot_command_line was initialized with an empty space
just to work around problems with early_init_dt_scan_chosen.
But this feature is necessary for some boards which have a dualboot
mechanism and whose u-boot is calculating the correct partition at runtime
without writing this information back to the u-boot-env.
Signed-off-by: Sven Eckelmann <sven@narfation.org>
FCC ID: A8J-ECB350
Engenius ECB350 v1 is an indoor wireless access point with a gigabit ethernet port,
2.4 GHz wireless, external antennas, and PoE.
**Specification:**
- AR7242 SOC
- AR9283 WLAN 2.4 GHz (2x2), PCIe on-board
- AR8035-A switch RGMII, GbE with 802.3af PoE
- 40 MHz reference clock
- 8 MB FLASH 25L6406EM2I-12G
- 32 MB RAM
- UART at J2 (populated)
- 2 external antennas
- 3 LEDs, 1 button (power, lan, wlan) (reset)
**MAC addresses:**
MACs are labeled as WLAN and WAN
vendor MAC addresses in flash are duplicate
phy0 WLAN *:b8 ---
eth0 WAN *:b9 art 0x0/0x6
**Installation:**
- if you get Failsafe Mode from failed flash:
only use it to flash Original firmware from Engenius
or risk kernel loop or halt which requires serial cable
Method 1: Firmware upgrade page:
OEM webpage at 192.168.1.1
username and password "admin"
Navigate to "Firmware" page from left pane
Click Browse and select the factory.bin image
Upload and verify checksum
Click Continue to confirm and wait 3 minutes
Method 2: Serial to load Failsafe webpage:
After connecting to serial console and rebooting...
Interrupt uboot with any key pressed rapidly
execute `run failsafe_boot` OR `bootm 0x9f670000`
wait a minute
connect to ethernet and navigate to
"192.168.1.1/index.htm"
Select the factory.bin image and upload
wait about 3 minutes
**Return to OEM:**
If you have a serial cable, see Serial Failsafe instructions
otherwise, uboot-env can be used to make uboot load the failsafe image
*DISCLAIMER*
The Failsafe image is unique to Engenius boards.
If the failsafe image is missing or damaged this will not work
DO NOT downgrade to ar71xx this way, it can cause kernel loop or halt
ssh into openwrt and run
`fw_setenv rootfs_checksum 0`
reboot, wait 3 minutes
connect to ethernet and navigate to 192.168.1.1/index.htm
select OEM firmware image from Engenius and click upgrade
**TFTP recovery** (unstable / not reliable):
rename initramfs to 'vmlinux-art-ramdisk'
make available on TFTP server at 192.168.1.101
power board while holding or pressing reset button repeatedly
NOTE: for some Engenius boards TFTP is not reliable
try setting MTU to 600 and try many times
**Format of OEM firmware image:**
The OEM software of ECB350 v1 is a heavily modified version
of Openwrt Kamikaze. One of the many modifications
is to the sysupgrade program. Image verification is performed
by the successful ungzip and untar of the supplied file
and name check and header verification of the resulting contents.
To form a factory.bin that is accepted by OEM Openwrt build,
the kernel and rootfs must have specific names
and begin with the respective headers (uImage, squashfs).
Then the files must be tarballed and gzipped.
The resulting binary is actually a tar.gz file in disguise.
This can be verified by using binwalk on the OEM firmware images,
ungzipping then untaring.
The OEM upgrade script is at /etc/fwupgrade.sh.
OKLI kernel loader is required because the OEM software
expects the kernel size to be no greater than 1536k
and otherwise the factory.bin upgrade procedure would
overwrite part of the kernel when writing rootfs.
The factory upgrade script follows the original mtd partitions.
**Note on PLL-data cells:**
The default PLL register values will not work
because of the AR8035 switch between
the SOC and the ethernet port.
For AR724x series, the PLL register for GMAC0
can be seen in the DTSI as 0x2c.
Therefore the PLL register can be read from u-boot
for each link speed after attempting tftpboot
or another network action using that link speed
with `md 0x1805002c 1`
However the registers that u-boot sets are not ideal and sometimes wrong...
the at803x driver supports setting the RGMII clock/data delay on the PHY side.
This way the pll-data register only needs to handle invert and phase.
for this board no extra adjustements are needed on the MAC side
all link speeds functional
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Add support for the ar71xx supported GL.iNet GL-USB150 to ath79.
GL.iNet GL-USB150 is an USB dongle WiFi router, based on Atheros AR9331.
Specification:
- 400/400/200 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- Realtek RTL8152B USB to Ethernet bridge (connected with AR9331 PHY4)
- 1T1R 2.4 GHz
- 2x LED, 1x button
- UART header on PCB
Flash instruction:
Vendor software is based on openwrt so you can flash the sysupgrade
image via the vendor GUI or using command line sysupgrade utility.
Make sure to not save configuration over reflash as uci settings
differ between versions.
Signed-off-by: Chen Minqiang <ptpt52@gmail.com>
factory.bin was not tested for ECB1750...
but it was tested on it's sister board ECB1200
The product ID for the header can be verified by inspecting
the header of OEM images, or in the u-boot environment.
Also:
- the LAN LED is controlled directly by the AR8035 switch
- the labelled (first increment) MAC for both is ethaddr (eth0)
- list packages in alphabetical order
- use default sysupgrade.bin recipe
Signed-off-by: Michael Pratt <mcpratt@pm.me>
These boards are sister boards
exactly the same hardware except that ECB1200 has:
- QCA9557
- 2 RF circuits/antennas per band instead of 3
- a resistor blocking UART RX line
Tested-by: sven friedmann <sf.openwrt@okay.ms>
Signed-off-by: Michael Pratt <mcpratt@pm.me>
FCC ID: A8J-ECB1200
Engenius ECB1200 is an indoor wireless access point with a GbE port,
2.4 GHz and 5 GHz wireless, external antennas, and 802.3af PoE.
**Specification:**
- QCA9557 SOC MIPS, 2.4 GHz (2x2)
- QCA9882 WLAN PCIe card, 5 GHz (2x2)
- AR8035-A switch RGMII, GbE with 802.3af PoE, 25 MHz clock
- 40 MHz reference clock
- 16 MB FLASH 25L12845EMI-10G
- 2x 64 MB RAM 1538ZFZ V59C1512164QEJ25
- UART at JP1 (unpopulated, RX shorted to ground)
- 4 external antennas
- 4 LEDs, 1 button (power, eth, wifi2g, wifi5g) (reset)
**MAC addresses:**
MAC Addresses are labeled as ETH and 5GHZ
U-boot environment has the vendor MAC addresses
MAC addresses in ART do not match vendor
eth0 ETH *:5c u-boot-env ethaddr
phy0 5GHZ *:5d u-boot-env athaddr
---- ---- ???? art 0x0/0x6
**Installation:**
Method 1: Firmware upgrade page:
OEM webpage at 192.168.1.1
username and password "admin"
Navigate to "Firmware" page from left pane
Click Browse and select the factory.bin image
Upload and verify checksum
Click Continue to confirm and wait 3 minutes
Method 2: Serial to load Failsafe webpage:
After connecting to serial console and rebooting...
Interrupt uboot with any key pressed rapidly
(see TFTP recovery)
perform a sysupgrade
**Serial Access:**
the RX line on the board for UART is shorted to ground by resistor R176
therefore it must be removed to use the console
but it is not necessary to remove to view boot log
optionally, R175 can be replaced with a solder bridge short
the resistors R175 and R176 are next to the UART pinout at JP1
**Return to OEM:**
If you have a serial cable, see Serial Failsafe instructions
Unlike most Engenius boards, this does not have a 'failsafe' image
the only way to return to OEM is TFTP or serial access to u-boot
**TFTP recovery:**
Unlike most Engenius boards, TFTP is reliable here
rename initramfs-kernel.bin to 'ap.bin'
make the file available on a TFTP server at 192.168.1.10
power board while holding or pressing reset button repeatedly
or with serial access:
run `tftpboot` or `run factory_boot` with initramfs-kernel.bin
then `bootm` with the load address
**Format of OEM firmware image:**
The OEM software of ECB1200 is a heavily modified version
of Openwrt Altitude Adjustment 12.09.
This Engenius board, like ECB1750, uses a proprietary header
with a unique Product ID. The header for factory.bin is
generated by the mksenaofw program included in openwrt.
**Note on PLL-data cells:**
The default PLL register values will not work
because of the AR8035 switch between
the SOC and the ethernet port.
For QCA955x series, the PLL registers for eth0 and eth1
can be see in the DTSI as 0x28 and 0x48 respectively.
Therefore the PLL registers can be read from uboot
for each link speed after attempting tftpboot
or another network action using that link speed
with `md 0x18050028 1` and `md 0x18050048 1`.
However the registers that u-boot sets are not ideal and sometimes wrong...
the at803x driver supports setting the RGMII clock/data delay on the PHY side.
This way the pll-data register only needs to handle invert and phase.
for this board clock invert is needed on the MAC side
all link speeds functional
Signed-off-by: Michael Pratt <mcpratt@pm.me>
FCC ID: A8J-ESR750H
Engenius ESR600H is an indoor wireless router with a gigabit switch,
2.4 GHz and 5 GHz wireless, internal and external antennas, and a USB port.
**Specification:**
- RT3662F MIPS SOC, 5 GHz WMAC (2x2)
- RT5392L PCI on-board, 2.4 GHz (2x2)
- AR8327 RGMII, 7-port GbE, 25 MHz clock
- 40 MHz reference clock
- 8 MB FLASH 25L6406EM2I-12G
- 64 MB RAM
- UART at J12 (unpopulated)
- 2 internal antennas (5 GHz)
- 2 external antennas (2.4 GHz)
- 9 LEDs, 1 button (power, wps, wifi2g, wifi5g, 5 LAN/WAN)
- USB 2 port (GPIO controlled power)
**MAC addresses:**
MAC Addresses are labeled as WAN and WLAN
U-boot environment has the the vendor MAC address for ethernet
MAC addresses in "factory" are part of wifi calibration data
eth0.2 WAN *:13:e7 u-boot-env wanaddr
eth0.1 ---- *:13:e8 u-boot-env wanaddr + 1
phy0 WLAN *:14:b8 factory 0x8004
phy1 ---- *:14:bc factory 0x4
**Installation:**
Method 1: Firmware upgrade page
OEM webpage at 192.168.0.1
username and password "admin"
Navigate to Network Setting --> Tools --> Firmware
Click Browse and select the factory.dlf image
Click Continue to confirm and wait 6 minutes or more...
Method 2: Serial console to load TFTP image:
(see TFTP recovery)
**Return to OEM:**
Unlike most Engenius boards, this does not have a 'failsafe' image
the only way to return to OEM is serial access to uboot
Unlike most Engenius boards, public images are not available...
so the only way to return to OEM is to have a copy
of the MTD partition "firmware" BEFORE flashing openwrt.
**TFTP recovery:**
Unlike most Engenius boards, TFTP is reliable here
however it requires serial console access
(soldering pins to the UART pinouts)
build your own image...
with 'ramdisk' selected under 'Target Images'
rename initramfs-kernel.bin to 'uImageESR-600H'
make the file available on a TFTP server at 192.168.99.8
interrupt boot by holding or pressing '4' in serial console
as soon as board is powered on
`tftpboot 0x81000000`
`bootm 0x81000000`
perform a sysupgrade
**Format of OEM firmware image:**
This Engenius board uses the Senao proprietary header
with a unique Product ID. The header for factory.bin is
generated by the mksenaofw program included in openwrt.
.dlf file extension is also required for OEM software to accept it
**Note on using OKLI:**
the kernel is now too large for the bootloader to handle
so OKLI is used via the `kernel-loader` image command
recently in master several other ramips boards have the same problem
'Kernel panic - not syncing: Failed to find ralink,rt3883-sysc node'
see commit ad19751edc
Signed-off-by: Michael Pratt <mcpratt@pm.me>
If _machine_hang is not defined on MIPS, the kernel will check if the
CPU can enter a more power efficient sleep mode. Since the realtek
platform supports mips32_r2, this should issue a WAIT instruction
instead of a trivial infinite loop.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Most of Build/elecom-wrc-factory and Build/elecom-wrc-gs-factory are
nearly equal, Unify those definitions by using "-N" option of mkhash and
splitting the appending text at the end of firmware image for WRC-GS/GST
devices.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Incorrect values were used for the switch initialization causing the
lan port leds to not light up in case of 10Mb or 100Mb connections.
This commit fixes this problem and removes unused values.
Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
All modifications made by update_kernel.sh run in a fresh clone
without any existing toolchains.
Build system: x86_64
Build-tested: ipq806x/R7800, ath79/generic, bcm27xx/bcm2711
Run-tested: ipq806x/R7800
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
Backport the upstream kernel fix 525b0858ff to get rid of the kernel
messages:
mvebu-gpio xxxxxx.gpio: IRQ index 3 not found
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
The WAN port on Netgear D7800 is unable to connect to an ISP when the
link to the modem is running at less than 1GB.
This patch fixes the issue by removing the phy-handle definition
and replacing it with a fixed-link definition
The WAN port is then able to connect to a modem via a link running at 100Mbs or 10Mbs
Fixes: FS#3086
Signed-off-by: Peter Cardoe <peter@cardoe.co.uk>
The Buffalo Linkstation LS421DE comes with a Ricoh RS5C372A real time
clock. This RTC has the INTRA pin connected to the power management
circuit, allowing to wake up the device from the power off state when an
alarm is scheduled.
Add the "wakeup-source" property in the RTC dts node to allow the use
of the alarm.
Example of use, the device is powered off and it comes to life after 5
minutes:
echo $(expr $(date '+%s') + 60 * 5) > /sys/class/rtc/rtc0/wakealarm
poweroff
This feature isn't available in the stock firmware.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
The rs5c372 RTC driver has alarm support, but it can't be enabled and only
can handle 24 hours in the future spite the chip is 1 week capable. Provide
these two patches:
- Support alarms up to 1 week
- Let the wakealarm to be used as a wakeup source
This patch makes the alarm wakeup feature to be available in the Buffallo
Linkstation LS421DE (mvebu target) and should also work with any other
device if the hardware has the proper capability.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
The Buffalo Linkstation LS421DE isn't able to enable the Level 2 cache
(AKA Aurora cache). As of result of this, the throughput is about half of
the expected, e.g when doing network data transfers.
Fix it by adding the broken-idle property in the coherency fabric node.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
'bootz' expects gziped kernel image anyway, so hard-code it to zImage,
and remove root path from 'load' commands, by default the files are
searched in root directory.
This will make the bootscript static, so the command which modified it
when image was created can now be removed.
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Don't hard-code the PTUUID, use U-Boot commands to determine it, as some
partitioning tools could rewrite PTUUID when modifying partitions.
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
This chunk got mistakenly removed from 30c95c4, since the get_image_dd
evaluates only first agument, so that check is useless.
Fixes: 30c95c4 ("tegra: sysupgrade: use get_image_dd wrapper")
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
CIFS_STATS is a debugging option. It is not really useful for end users
Signed-off-by: Rosen Penev <rosenp@gmail.com>
[fixed missing config-4.19 file]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Commit "initramfs: switch to tmpfs to fix ujail" switched initramfs to
now use tmpfs, it causes $(rootfs_type) to now return tmpfs when
running initramfs image instead of being empty.
This broke initramfs detection which is required so that when installing
on MikroTik devices firmware partition would first get erased fully
before writing.
So, lets test for $(rootfs_type) returning "tmpfs" instead.
Fixes: 7fd3c68 ("initramfs: switch to tmpfs to fix ujail)
Signed-off-by: Robert Marko <robimarko@gmail.com>
The flash capacity is divided in two flash chips and currently only
first is used. Increase available space for OpenWrt by additional 16 MiB
using mtd-concat driver. Because U-Boot might not be able to load kernel
image spanned through two flash chips, the size of kernel is limited
to space available on first first chip.
Cc: Vladimir Georgievsky <vladimir.georgievsky@yahoo.com>
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
AirTight Networks (later renamed to Mojo Networks) C-75 is a dual-band
access point, also sold by WatchGuard under name AP320.
Specification
SoC: Qualcomm Atheros QCA9550
RAM: 128 MiB DDR2
Flash: 2x 16 MiB SPI NOR
WIFI: 2.4 GHz 3T3R integrated
5 GHz 3T3R QCA9890 oversized Mini PCIe card
Ethernet: 2x 10/100/1000 Mbps QCA8334
port labeled LAN1 is PoE capable (802.3at)
USB: 1x 2.0
LEDs: 7x which two are GPIO controlled, four switch controlled, one
controlled by wireless driver
Buttons: 1x GPIO controlled
Serial: RJ-45 port, Cisco pinout
baud: 115200, parity: none, flow control: none
JTAG: Yes, pins marked J1 on PCB
Installation
1. Prepare TFTP server with OpenWrt initramfs-kernel image.
2. Connect to one of LAN ports.
3. Connect to serial port.
4. Power on the device and when prompted to stop autoboot, hit any key.
5. Adjust "ipaddr" and "serverip" addresses in U-Boot environment, use
'setenv' to do that, then run following commands:
tftpboot 0x81000000 <openwrt_initramfs-kernel_image_name>
bootm 0x81000000
6. Wait about 1 minute for OpenWrt to boot.
7. Transfer OpenWrt sysupgrade image to /tmp directory and flash it
with:
sysupgrade -n /tmp/<openwrt_sysupgrade_image_name>
8. After flashing, the access point will reboot to OpenWrt. Wait few
minutes, until the Power LED stops blinking, then it's ready for
configuration.
Known issues
Green power LED does not work.
Additional information
The U-Boot fails to initialise ethernet ports correctly when a UART
adapter is attached to UART pins (marked J3 on PCB).
Cc: Vladimir Georgievsky <vladimir.georgievsky@yahoo.com>
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Adjust spelling of vendor names to what is used in other places.
Signed-off-by: Moritz Warning <moritzwarning@web.de>
[improve commit title/message]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Adjust spelling of vendor name to what is used in other places.
Also move definition in shared section.
Signed-off-by: Moritz Warning <moritzwarning@web.de>
[improve commit title/message]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
These parameters are the same as in vr9.dtsi. This patch removes
redundant parameters.
Signed-off-by: Aleksander Jan Bajkowski <A.Bajkowski@stud.elka.pw.edu.pl>
The PPE only provides a 14 bit hash, however many uses of the skb hash
expect the hash to use the full 32 bit range.
Use jhash to extend the hash to the full size
Signed-off-by: Felix Fietkau <nbd@nbd.name>
phy-mode is already set to rgmii for eth0 and sgmii for eth1 in
qca955x.dtsi, no need to do that again in the device DTS files.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The GL-MT1300 is a high-performance new generation pocket-sized router
that offers a powerful hardware and first-class cybersecurity protocol
with unique and modern design.
Specifications:
- SoC: MT7621A, Dual-Core @880MHz
- RAM: 256 MB DDR3
- Flash: 32 MB
- Ethernet: 3 x 10/100/1000: 2 x LAN + 1 x WAN
- Wireless: 1 x MT7615D Dual-Band 2.4GHz(400Mbps) + 5GHz(867Mbps)
- USB: 1 x USB 3.0 port
- Slot: 1 x MicroSD card slot
- Button: 1 x Reset button
- Switch: 1 x Mode switch
- LED: 1 x Blue LED + 1 x White LED
MAC addresses based on vendor firmware:
WAN : factory 0x4000
LAN : Mac from factory 0x4000 + 1
2.4GHz : factory 0x4
5GHz : Mac form factory 0x4 + 1
Flashing instructions:
1.Connect to one of LAN ports.
2.Set the static IP on the PC to 192.168.1.2.
3.Press the Reset button and power the device (do not release the button).
After waiting for the blue led to flash 5 times, the white led will
come on and release the button.
4.Browse the 192.168.1.1 web page and update firmware according to web
tips.
5.The blue led will flash when the firmware is being upgraded.
6.The blue led stops blinking to indicate that the firmware upgrade is
complete and U-Boot automatically starts the firmware.
For more information on GL-MT1300, see the OFFICIAL GL.iNet website:
https://www.gl-inet.com/products/gl-mt1300/
Signed-off-by: Xinfa Deng <xinfa.deng@gl-inet.com>
[add input-type for switch, wrap long line in 10_fix_wifi_mac]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The sub target does not support network and there are not so many users
out there, just mark it as source only, so we do jot have to build it.
The quality is not worse than before, it just does not make much sense
to build this automatically.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Package architecture aarch64_generic [1] can be used just with three
devices. One is NanoPI R2S and then there are two development boards
from NXP. Let's change armvirt/64 to Cortex A53 (aarch64_cortex-a53)
[2]. It has wider support by multiple devices like NanoPI Neo Plus2/Core2,
ESPRESSObin, Pine64, and Raspberry Pi 2&3.
While looking at ARMvirt/32 it has set CPU_TYPE and CPU_SUBTYPE to be
arm_cortex-a15_neon-vfpv4 [3]. It has support to devices like
Linksys EA8500 v1, Linksys EA7500 v1, Netgear D7800, Netgear R7500 and so on.
Tested with:
qemu-system-aarch64 -m 1024 -smp 2 -cpu cortex-a57 -M virt -nographic \
-kernel openwrt-armvirt-64-Image-initramfs
Successfully compiled and booted.
Here goes the output:
root@OpenWrt:/# uname -a
Linux OpenWrt 5.4.82 #0 SMP Sun Dec 13 12:52:10 2020 aarch64 GNU/Linux
root@OpenWrt:/# cat /etc/openwrt_release
DISTRIB_ID='OpenWrt'
DISTRIB_RELEASE='SNAPSHOT'
DISTRIB_REVISION='r15207-96fca0f807'
DISTRIB_TARGET='armvirt/64'
DISTRIB_ARCH='aarch64_cortex-a53'
DISTRIB_DESCRIPTION='OpenWrt SNAPSHOT r15207-96fca0f807'
DISTRIB_TAINTS='no-all'
Also, change BOARDNAME to be the same as it is in armvirt/32.
[1] https://openwrt.org/docs/techref/instructionset/aarch64_generic
[2] https://openwrt.org/docs/techref/instructionset/aarch64_cortex-a53
[3] https://openwrt.org/docs/techref/instructionset/arm_cortex-a15_neon-vfpv4
Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com>
This device has (almost?) identical hardware to the F9J1108 v2 but uses
a different firmware magic and model number.
Specifications:
SoC: QCA9558
CPU: 720 MHz
Flash: 16 MiB NOR
RAM: 128 MiB
WiFi 2.4 GHz: QCA9558-AT4A 3x3 MIMO 802.11b/g/n
WiFi 5 GHz: QCA9880-2R4E 3x3 MIMO 802.11a/n/ac
Ethernet: 4x LAN and 1x WAN (all 1Gbit/s ports)
USB: 1 x USB 2.0 (lower), 1 x USB 3.0 (upper)
MAC addresses based on OEM firmware:
Interface Address Location
--------- ------- --------
lan *:5A sometimes in 0x6
wan *:5B 0x0
2.4Ghz *:5A 0x1002
5Ghz As per mini PCIe EEPROM
Flashing instructions:
The factory.bin can be flashed via the Belkin web UI or via the uboot
HTTP upgrade page (which is by default listening on 192.168.2.1). Once
the factory.bin has been written, sysupgrade.bin will work as usual.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Belkin F9J1108 v2 and F9K1115 v2 are (seemingly) identical hardware
with different model numbers. Extract all non-device specific code to a
common .dtsi so it can be re-used when adding support for the
F9K1115 v2.
Similar to the .dtsi most of the image building recipe code can be
re-used. Move everything except the device model, edimax header magic
and edimax header model into a shared build recipe.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
[drop duplicate TARGET_DEVICES, add EDIMAX_* to DEVICE_VARS, edit title]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
