According to the vendor tarball, the TD-w8900GB's flash has 64k erase
block size, but CFE spans two blocks. So fixup the image offset
accordingly but keep block size at its default (64k).
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
[jogo: add commit message, add image offset, change nvram offset]
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 43572
Move compatible strings from board structs into separate table. This
allows for several board compatibles to match to the same board in case
e.g. only the flash size / partitions differ.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 43341
Now that we migrated all users to dtb based detection, we can drop the
board fixup code.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42129
Allow appending a dtb blob to the binary and use it for identifying the
board. Fall back to nvram based identification in case of no dtb passed.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 42119
Rework fallback sprom support by providing different sproms for
different chips. Also make it optional to use.
This likely causes sprom fallback support to break on a few boards.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 41942
Use the CFE_EPTSEAL to tell them apart at runtime. Added for now only
for the 3.14 until properly tested.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 41296
Now that 3.13 will be EOL soon, switch to 3.14.
Known issues:
* 74x164 is not available because upstream dropped non-DT support
* jffs2 breaks with SMP
Unknown issues:
* probably plenty
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 40380
