Commit Graph

12 Commits

Author SHA1 Message Date
Daniel Golle
36d0aa9c2d mediatek: filogic: sync pinctrl-mt7988 with MediaTek SDK
Update pinctrl driver for the MT7988 with driver from mtk-openwrt-feeds.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-08-03 15:47:51 +01:00
Daniel Golle
9fac590096 mediatek: use backported Ethernet PHY driver also for 5.15
Backport in-SoC Gigabit Ethernet PHY driver instead of carrying the
driver in files-5.15.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-07-08 17:36:19 +01:00
Daniel Golle
7a0ec001ff mediatek: sync MT7986 device trees with upstream
Sync device tree files for MT7986 boards with what landed in upstream
Linux tree to easy maintainance and also allow for a smooth update to
Linux 6.1.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-06-05 11:36:32 +01:00
Daniel Golle
ef2a831dab mediatek: add driver for built-in 2.5G Ethernet PHY
Add driver for the built-in 2.5G Ethernet PHY found in the MT7988 SoC.
To function the PHY also needs firmware files which have not yet been
published via linux-firmware.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-05-23 15:53:22 +01:00
Daniel Golle
987a0b2b30 mediatek: update pending SoC Ethernet PHY driver
Update driver for MediaTek's built-in Gigabit Ethernet PHYs which can be
found in the MT7981 and MT7988 SoCs.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-05-23 15:53:22 +01:00
Sam Shih
9e6a7e808f mediatek: add mt7988 pinctrl driver support
This adds provisional pinctrl driver support for the MediaTek MT7988 SoC.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-05-23 15:53:22 +01:00
Sam Shih
b33c185876 mediatek: add mt7988 clock drivers support
This adds clock drivers for the MediaTek MT7988 SoC

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-05-23 15:53:22 +01:00
Daniel Golle
f4f8c0e8de mediatek: sync pinctrl-mt7981 and pinctrl-mt7986 drivers
Now that new pinconf features have been backported sync pinctrl-mt7981
and pinctrl-m7986 with bleeding-edge upstream versions.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-04-13 20:01:33 +01:00
Daniel Golle
18a9ae56e9 mediatek: backport pinctrl driver for MT7981 SoC
Backport the pinctrl driver for the MT7981 SoC. The driver has also
been submitted upstream and is part of Linux 6.3.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-03-27 19:07:54 +01:00
Daniel Golle
658c4dd43f mediatek: backport clk driver for MT7981 SoC
Backport driver for common clocks in MT7981 SoC. The driver has also
been submitted upstream and became part of Linux 6.3.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2023-03-27 19:07:54 +01:00
Daniel Golle
c15e7e2910
mediatek: filogic: consolidate adc '32k' clock
Add dependency to '32k' ADC clock so it is always enabled for thermal
and raw access to ADC values. This allows to remove the patch for the
ADC driver and reduce the patch adding thermal support for MT7986 to
only add the new efuse layout and temperature decoding for V3.

Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2022-10-20 20:37:50 +01:00
Sam Shih
dabcaac443 mediatek: add mt7986 soc support to the target
It will be supported by the new filogic subtarget

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2022-08-28 20:33:15 +01:00