Commit Graph

6 Commits

Author SHA1 Message Date
Adrian Schmutzler
635f111148 ath79: drop and consolidate redundant chosen/bootargs
In ath79, for several SoCs the console bootargs are defined to the
very same value in every device's DTS. Consolidate these definitions
in the SoC dtsi files and drop further redundant definitions elsewhere.

The only device without any bootargs set has been OpenMesh OM5P-AC V2.
This will now inherit the setting from qca955x.dtsi

Note that while this tidies up master a lot, it might develop into a
frequent pitfall for backports.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-06-25 23:09:05 +02:00
David Bauer
654eec5a2d ath79: enable SGMII workaround for affected boards
These boards suffer from a sudden inability to establish a link on the
SGMII. Enable the workaround to fix the link when it dies.

Signed-off-by: David Bauer <mail@david-bauer.net>
2020-04-27 12:22:02 +02:00
David Bauer
c0a80b7125 ath79: rename qca9557.dtsi to qca955x.dtsi
There are at least 3 different chips in the Scorpion series of SoCs.
Rename the common DTSI to better reflect it's purpose for the whole
series.

Also rename the compatible bindings from qca,ar9557 and qca,qca9557
to qca,qca9550.

Signed-off-by: David Bauer <mail@david-bauer.net>
2020-04-24 20:02:29 +02:00
Adrian Schmutzler
929becbc2d ath79: fix whitespace issues in DTS files
This is the result of grepping/searching for several common
whitespace issues like double empty lines, leading spaces, etc.

This patch fixes them for the ath79 target.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2019-10-06 21:28:49 +02:00
David Bauer
7b137e9df9 ath79: correct OCEDO Ursus phy-mode property
This fixes the previously incorrect phy-mode for the OCEDO Ursus GMAC0.

See 62abbd587d ("ath79: correct various phy-mode properties")
for more details.

Signed-off-by: David Bauer <mail@david-bauer.net>
2019-08-31 22:11:29 +02:00
Markus Scheck
de2f888024 ath79: add support for OCEDO Ursus
SOC:   Qualcomm Atheros QCA9558
RAM:   128MB
FLASH: 16MB (Macronix MX25L12845EMI-10G)
WLAN1: QCA9558 2.4GHz 802.11bgn 3SS
WLAN2: QCA9880 5GHz 802.11ac 3SS
LED:   Power, LAN1, LAN2, 2.4GHz, 5GHz
Serial:Next to SPI Flash,
       Pinout is 3V3 - GND - TX - RX (Square Pin is 3V3)
       The Serial setting is 115200-8-N-1

INSTALLATION:

1. Serve an OpenWrt ramdisk image named "ursus.bin".
   Set your IP-address to 192.168.100.8/24.
2. Connect to the serial. Power up the device and interrupt
   the boot process.
3. Set the correct bootcmd with
   > setenv bootcmd run bootcmd_1
   > saveenv
4. Run
   > tftpboot 0x81000000 ursus.bin
   > bootm 0x81000000
5. Wait for OpenWrt to boot up.
6. Transfer OpenWrt sysupdate image and flash via sysupgrade.

Signed-off-by: Markus Scheck <markus.scheck1@gmail.com>
Tested-by: David Bauer <mail@david-bauer.net>
[whitespace fix, renamed LED labels and SoC type fix]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
2019-04-08 18:37:04 +02:00