Increase the kernel size from 3 MB to 4 MB for EA8500 and EA7500v1.
* modify the common .dtsi
* modify the kernel size in the image recipes
Define compat-version 2.0 to force factory image usage for sysupgrade.
Add explanation message. Reenable both devices.
As for 4MiB (and not more): Hannu Nyman noted that:
"We have lots of ipq806x devices with 4 MB kernel, so will
need action at that point in future in any case.
(Assuming that the bootloader did not have a 4 MB limit that
has been tested...)"
Signed-off-by: Hannu Nyman <hannu.nyman@iki.fi>
(squashed, added 4MiB notice of support in ipq806x)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Define the kernel crash log storage ramoops/pstore feature
for R7800 and its sister XR500.
Reference to the ramoops admin guide in upstream Linux:
https://www.kernel.org/doc/html/v5.10/admin-guide/ramoops.html
Tested with R7800.
Signed-off-by: Hannu Nyman <hannu.nyman@iki.fi>
The kernel of both images will no longer fit into
the 3072KiB / 3MiB kernel partition:
|Image Name: ARM OpenWrt Linux-5.10.100
|Created: Sat Feb 19 00:11:55 2022
|Image Type: ARM Linux Kernel Image (uncompressed)
|Data Size: 3147140 Bytes = 3073.38 KiB = 3.00 MiB
Disable both targets for now, until a solution is available.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Enabled `CONFIG_ALL_KMODS` and ran `make kernel_menuconfig` against
ipq806x to update defconfig.
The removed symbols are in fact present in
target/linux/generic/config-5.10. CONFIG_MDIO_DEVRES
was likely added due to this:
<https://elixir.bootlin.com/linux/v5.10.100/source/drivers/net/phy/Kconfig#L16>
Signed-off-by: John Audia <graysky@archlinux.us>
This device still had the legacy flash partitioning.
This is a problem, because neither the nvmem-cells
for mac-address and calibration. Nor the denx,uimage
mtd-splitter compatible would be picked up.
The patch also changes the node-names of the flash
and partition nodes to hopefully meet all the
current FDT trends.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Increase the available flash memory size in Netgear R7800
by repurposing the unused "netgear" partition that is
located after the firmware partition.
Available flash space for kernel+rootfs+overlay increases
by 68 MB from 32 MB to 100 MB.
In a typical build, overlay space increases from 15 to 85,
increasing the package installation possibilities greatly.
Reverting to the OEM firmware is still possible, as the OEM
firmware contains logic to initialise the "netgear" partition
if its contents do not match expectations. In OEM firmware,
"netgear" contains 6 UBI sub-partitions that are defined in
/etc/netgear.cfg and initialisation is done by /etc/preinit
This is based on fb8a578aa7
Signed-off-by: Mike Lothian <mike@fireburn.co.uk>
The recent device-tree modification that added pre-cal
nvmem-cells pushed the device's kernel+dtb over the
allotted 3072k KERNEL_SIZE.
> WARNING: Image file tplink_vr2600v-uImage is too big: 3147214 > 3145728
There was a previous kernel partition size upgrade:
commit 0c967d92b3 ("ipq806x: increase kernel partition size for the TP-Link Archer VR2600v")
It has been seemingly upgraded from a 2048k KERNEL_SIZE in the past.
The commit talks about using the MTD_SPLIT_TPLINK_FW. But looking at
the image make recipe, there is no code that adds a TPLINK header.
So instead the board will use "denx,umimage". This requires
MTD_SPLIT_UIMAGE_FW, but this is present thanks to some NEC devices.
(Maybe the MTD_CONFIG_ARGS can be removed as well? But it could be
there because of the padding at the beginning. This needs testing.)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
brings back the ath10k QCA9980 wifi nodes to which
it adds ASROCK's wifi calibration data. These are
now provided by the ath10k_firmware.git's board-2.bin.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
converts extraction entries from 11-ath10k-caldata into
nvmem-cells in the individual board's device-tree file.
The patch also moves previously existing referenced
nvmem-cells data nodes which were placed at the end
back into the partitions node. As well as removing
some duplicated properties from qcom-ipq8065-xr500.dts's
art (the included nighthawk.dtsi defines those already).
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Commit d284e6ef0f ("treewide: convert mtd-mac-address-increment* to
generic implementation") renamed "mtd-mac-address-increment" property
to "mac-address-increment". Convert remaining usages that have been
added after that.
Fixes: f44e933458 ("ipq806x: provide WiFI mac-addresses from dts")
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
This moves bootargs-append support patch from ipq40xx and ipq806x to
generic. This way we can append additional boot arguments from DTS instead
of only being able to overwrite them.
This is a preparation for kirkwood support of ipTIME NAS1.
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
This board has 512MiB of RAM like the R7800, and the VDSL modem is
attached to the second PCIe port.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This commit moves the device profiles within the ipq806x/generic
subtarget into their own includable .mk file, to support eventually
having subtargets other than generic.
Signed-off-by: Alex Lewontin <alex.c.lewontin@gmail.com>
Properly declare that the g10 is booting from NAND and define its
correct (larger than on other devices-) boot_pages_size, to prevent
the kernel from constantly falling over missing OOB error correction
for the bootloader.
This patch prevents a constant slew of (bogus) read errors reported
by the kernel and keeping the CPU busy and fixes:
blk_update_request: I/O error, dev mtdblock0, sector 0 op 0x0:(READ) flags 0x80700 phys_seg 4 prio class 0
blk_update_request: I/O error, dev mtdblock0, sector 8 op 0x0:(READ) flags 0x80700 phys_seg 3 prio class 0
blk_update_request: I/O error, dev mtdblock0, sector 16 op 0x0:(READ) flags 0x80700 phys_seg 2 prio class 0
blk_update_request: I/O error, dev mtdblock0, sector 24 op 0x0:(READ) flags 0x80700 phys_seg 1 prio class 0
blk_update_request: I/O error, dev mtdblock0, sector 0 op 0x0:(READ) flags 0x0 phys_seg 1 prio class 0
Buffer I/O error on dev mtdblock0, logical block 0, async page read
blk_update_request: I/O error, dev mtdblock0, sector 32 op 0x0:(READ) flags 0x80700 phys_seg 8 prio class 0
blk_update_request: I/O error, dev mtdblock0, sector 40 op 0x0:(READ) flags 0x80700 phys_seg 7 prio class 0
blk_update_request: I/O error, dev mtdblock0, sector 48 op 0x0:(READ) flags 0x80700 phys_seg 6 prio class 0
blk_update_request: I/O error, dev mtdblock0, sector 56 op 0x0:(READ) flags 0x80700 phys_seg 5 prio class 0
blk_update_request: I/O error, dev mtdblock0, sector 64 op 0x0:(READ) flags 0x80700 phys_seg 4 prio class 0
Buffer I/O error on dev mtdblock0, logical block 1, async page read
Buffer I/O error on dev mtdblock1, logical block 0, async page read
Buffer I/O error on dev mtdblock1, logical block 1, async page read
Buffer I/O error on dev mtdblock2, logical block 0, async page read
Buffer I/O error on dev mtdblock2, logical block 1, async page read
Buffer I/O error on dev mtdblock3, logical block 0, async page read
Buffer I/O error on dev mtdblock3, logical block 0, async page read
Buffer I/O error on dev mtdblock4, logical block 0, async page read
Buffer I/O error on dev mtdblock4, logical block 1, async page read
Suggested-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
Each of
- CRYPTO_AEAD2
- CRYPTO_AEAD
- CRYPTO_GF128MUL
- CRYPTO_GHASH
- CRYPTO_HASH2
- CRYPTO_HASH
- CRYPTO_MANAGER2
- CRYPTO_MANAGER
- CRYPTO_NULL2
either directly required for mac80211 crypto support, or directly
selected by such options. Support for the mac80211 crypto was enabled in
the generic config since c7182123b9 ("kernel: make cryptoapi support
needed by mac80211 built-in"). So move the above options from the target
configs to the generic config to make it clear why do we need them.
CC: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Both CLANG_VERSION and LLD_VERISON are autogenerated runtime
configuration options, so add them to the kernel configuration filter
and remove from generic and per-target configs to keep configs clean.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Revert the SDC "CLK_SET_RATE_GATE" changes to the SDC clock regulator
structures.
See https://elinux.org/images/b/b8/Elc2013_Clement.pdf
> if ((clk->flags & CLK_SET_RATE_GATE) && clk->prepare_count) {
>
> For this particular clock, setting its rate is possible only if the
> clock is ungated (not yet prepared)
This fixes the MMC failing to initialize on newer ZyXEL NBG6817
hardware revisions with Kingston MMC. Older revisions should
hopefully be unaffected.
Check MMC hardware details with:
cd /sys/block/mmcblk0/device/ && \
tail -v cid date name manfid fwrev hwrev oemid rev
Known problematic MMC names (broken before this commit):
* M62704 (dated 12/2018) via myself
* M62704 (dated 11/2018) via Drake Stefani
Known unaffected MMC names (already working without this commit):
* S10004 (dated 12/2015) via slh
Without enabling dynamic debugging, this error manifests in the kernel
hardware serial console as the following:
[ 2.746605] mmc0: error -110 whilst initialising MMC card
[…trimmed other messages…]
[ 2.877832] Waiting for root device /dev/mmcblk0p5...
Enabling Linux dynamic kernel debugging provides additional messages.
For guidance, see the Linux kernel documentation:
https://www.kernel.org/doc/html/latest/admin-guide/dynamic-debug-howto.html
First, enable dynamic debugging in OpenWRT's configuration:
1. Run "make menuconfig"
2. Select "Global build settings --->"
3. Select "Kernel build options --->"
4. Enable "Compile the kernel with dynamic printk" via spacebar
5. Save and exit (arrow key to "Exit" until prompted to save, save)
Alternatively, set "CONFIG_KERNEL_DYNAMIC_DEBUG=y" in your .config.
Then, turn on dynamic debugging at boot:
Modify bootargs in
target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
to add…
bootargs = "[…existing bootargs…] dyndbg=\"file drivers/mmc/* +p\" dynamic_debug.verbose=1 loglevel=8";
For example:
chosen {
- bootargs = "rootfstype=squashfs,ext4 rootwait noinitrd fstools_ignore_partname=1";
+ bootargs = "rootfstype=squashfs,ext4 rootwait noinitrd fstools_ignore_partname=1 dyndbg=\"file drivers/mmc/* +p\" dynamic_debug.verbose=1 loglevel=8";
append-rootblock = "root=/dev/mmcblk0p";
Then, compile and flash the resulting build. If you are testing
before this commit on newer MMC hardware, be prepared to recover!
NOTE: If you have hardware serial console access, you don't need to
use TFTP recovery to change the active boot partition.
Reboot to working alternative partition via serial console:
1. Connect to hardware serial console
* See https://openwrt.org/toh/zyxel/nbg6817#serial
2. Interrupt boot at "Hit any key to stop autoboot:"
3. Run "ATSE NBG6817"
4. Copy the result (e.g. "001976FE4B04")
* Changes with **every boot** - can't reuse this
5. On your local system, run
"./zyxel-uboot-password-tool.sh <copied value here>"
* Example: "./zyxel-uboot-password-tool.sh 001976FE4B04"
6. Run the command provided by the password tool
* Example: "ATEN 1,910F129B"
* Changes with **every boot** - can't reuse this
7. Run "ATGU"
* You now have full u-boot shell until next boot - unlocking is
not remembered
8. Run either "run boot_mmc" (for booting partition set "FF") or
"run boot_mmc_1" (for booting partition set "01")
* These commands are not affected by dual-boot partition flags
NOTE: This will NOT set the dual-boot partition flag. You'll need to
fix that manually. The "nbg6817-dualboot" script may help:
https://github.com/pkgadd/nbg6817/blob/master/nbg6817-dualboot
zyxel-uboot-password-tool.sh - sourced from
commit 459c8c9ef8:
ror32() {
echo $(( ($1 >> $2) | (($1 << (32 - $2) & (2**32-1)) ) ))
}
v="0x$1"
a="0x${v:2:6}"
b=$(( a + 0x10F0A563))
c=$(( 0x${v:12:14} & 7 ))
p=$(( $(ror32 $b $c) ^ a ))
printf "ATEN 1,%X\n" $p
Kernel serial console log BEFORE commit with dynamic debug enabled:
[…trimmed…]
[ 3.171343] mmci-pl18x 12400000.sdcc: designer ID = 0x51
[ 3.171397] mmci-pl18x 12400000.sdcc: revision = 0x0
[ 3.175811] mmci-pl18x 12400000.sdcc: clocking block at 96000000 Hz
[ 3.181134] mmci-pl18x 12400000.sdcc: No vqmmc regulator found
[ 3.186788] mmci-pl18x 12400000.sdcc: mmc0: PL180 manf 51 rev0 at 0x12400000 irq 41,0 (pio)
[ 3.192902] mmci-pl18x 12400000.sdcc: DMA channels RX dma1chan1, TX dma1chan2
[ 3.215609] mmc0: clock 0Hz busmode 2 powermode 1 cs 0 Vdd 21 width 1 timing 0
[ 3.227532] mmci-pl18x 12400000.sdcc: Initial signal voltage of 3.3v
[ 3.247518] mmc0: clock 52000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 1 timing 0
[…trimmed…]
[ 3.997725] mmc0: req done (CMD2): -110: 00000000 00000000 00000000 00000000
[ 4.003631] mmci-pl18x 12400000.sdcc: irq0 (data+cmd) 00000000
[ 4.003659] mmc0: error -110 whilst initialising MMC card
[ 4.016481] mmc0: clock 0Hz busmode 2 powermode 0 cs 0 Vdd 0 width 1 timing 0
Notice how the initial clock is 52 MHz, which is incorrect - MMC
requires negotiation to enable higher speeds.
Kernel serial console log AFTER commit with dynamic debug enabled:
[…trimmed…]
[ 3.168996] mmci-pl18x 12400000.sdcc: designer ID = 0x51
[ 3.169051] mmci-pl18x 12400000.sdcc: revision = 0x0
[ 3.173492] mmci-pl18x 12400000.sdcc: clocking block at 96000000 Hz
[ 3.178808] mmci-pl18x 12400000.sdcc: No vqmmc regulator found
[ 3.184702] mmci-pl18x 12400000.sdcc: mmc0: PL180 manf 51 rev0 at 0x12400000 irq 41,0 (pio)
[ 3.190573] mmci-pl18x 12400000.sdcc: DMA channels RX dma1chan1, TX dma1chan2
[ 3.217873] mmc0: clock 0Hz busmode 2 powermode 1 cs 0 Vdd 21 width 1 timing 0
[ 3.229250] mmci-pl18x 12400000.sdcc: Initial signal voltage of 3.3v
[ 3.249111] mmc0: clock 400000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 1 timing 0
[…trimmed…]
[ 4.392652] mmci-pl18x 12400000.sdcc: irq0 (data+cmd) 00000000
[ 4.392785] mmc0: clock 52000000Hz busmode 2 powermode 2 cs 0 Vdd 21 width 1 timing 1
[ 4.406554] mmc0: starting CMD6 arg 03b70201 flags 0000049d
[…trimmed…]
Now, the MMC properly initializes and later switches to high speed.
Thanks to:
* Ansuel for maintaining/help with the IPQ806x platform, kernel code
* slh for additional debugging and suggestions
* dwfreed for confirming newer MMC details, clock frequency
* robimarko for device driver debug printing help, clock debugging
* Drake for testing and confirmation with their own newer NBG6817
...and anyone else I missed!
Signed-off-by: Shane Synan <digitalcircuit36939@gmail.com>
Tested-by: Shane Synan <digitalcircuit36939@gmail.com>
The purpose of this code seems to be to avoid issues caused
by partially overwriting an existing UBI partition, where some
of the erase counters would be reset but not the unmodified
ones. This problem has been solved in a more generic way by
the UBI EOF marker. This ensures that any old PEBs after the
marker are properly initialized. It is therefore unnecessary
to erase the whole partition before flashing a new OpenWrt
factory image.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
The MR42 and MR52 are two similar IPQ806x based devices from the Cisco
Meraki "Cryptid" series.
MR42 main features:
- IPQ8068 1.4GHz
- 512MB RAM
- 128MB NAND
- 2x QCA9992 (2.4 & 5GHz)
- 1x QCA9889 (2.4 & 5GHz)
- 1x AR8033 PHY
- PoE/AC power
MR52 main features:
- IPQ8068 1.4GHz
- 512MB RAM
- 128MB NAND
- 2x QCA9994 (2.4 & 5GHz)
- 1x QCA9889 (2.4 & 5GHz)
- 2x AR8033 PHYs
- PoE/AC power
(MR42 Only) Installation via diagnostic mode:
If you can successfully complete step 1 then you can continue to install
via this method without having to open the device. Otherwise please use
the standard UART method. Please note that when booting via TFTP, some
Ethernet devices, in particular those on laptops, will not connect in
time, resulting in TFTP boot not succeeding. In this instance it is
advised to connect via a switch.
1. Hold down reset at power on and keep holding, after around 10 seconds
if the orange LED changes behaviour to begin flashing, proceed to
release reset, then press reset two times. Ensure that the LED has
turned blue. Note that flashing will occur on some devices, but it
will not be possible to change the LED colour using the reset button.
In this case it will still be possible to continue with this install
method.
2. Set your IP to 192.168.1.250. Set up a TFTP server serving
mr42_u-boot.mbn and
openwrt-ipq806x-generic-meraki_mr42-initramfs-fit-uImage.itb, obtained
from [1].
3. Use telnet and connect to 192.168.1.1. Run the following commands to
install u-boot. Note that all these commands are critical, an error
will likely render the device unusable.
Option 3.1:
If you are sure you have set up the TFTP server correctly you can
run this script on the device. This will download and flash the
u-boot image immediately:
`/etc/update_uboot.sh 192.168.1.250 mr42_u-boot.mbn`
Once completed successfully, power off the device.
Option 3.2:
If you are unsure the TFTP server is correctly set up you can
obtain the image and flash manually:
3.2.1. `cd /tmp`
3.2.2. `tftp-hpa 192.168.1.250 -m binary -c get mr42_u-boot.mbn`
3.2.3. Confirm file has downloaded correctly by comparing the
md5sum:
`md5sum mr42_u-boot.mbn`
3.2.4. The following are the required commands to write the image.
`echo 1 > /sys/devices/platform/msm_nand/boot_layout
mtd erase /dev/mtd1
nandwrite -pam /dev/mtd1 mr42_u-boot.mbn
echo 0 > /sys/devices/platform/msm_nand/boot_layout`
Important: You must observe the output of the `nandwrite`
command. Look for the following to verify writing is occurring:
`Writing data to block 0 at offset 0x0
Writing data to block 1 at offset 0x20000
Writing data to block 2 at offset 0x40000`
If you do not see this then do not power off the device. Check
your previous commands and that mr42_u-boot.mbn was downloaded
correctly. Once you are sure the image has been written you
can proceed to power off the device.
4. Hold the reset button and power on the device. This will immediately
begin downloading the appropriate initramfs image and boot into it.
Note: If the device does not download the initramfs, this is likely
due to the interface not being brought up in time. Changing Ethernet
source to a router or switch will likely resolve this. You can also
try manually setting the link speed to 10Mb/s Half-Duplex.
5. Once a solid white LED is displayed on the device, continue to the
UART installation method, step 6.
Standard installation via UART - MR42 & MR52
1. Disassemble the device and connect a UART header. The header pinout
is as follows:
1 - 3.3v
2 - TXD
3 - RXD
4 - GND
Important: You should only connect TXD, RXD and GND. Connecting
3.3v may damage the device.
2. Set your IP to 192.168.1.250. Set up a TFTP server serving
openwrt-ipq806x-generic-meraki_(mr42|mr52)-initramfs-fit-uImage.itb.
Separately obtain the respective sysupgrade image.
3. Run the following commands, preferably from a Linux host. The
mentioned files, including ubootwrite.py and u-boot images, can be
obtained from [1].
`python ubootwrite.py --write=(mr42|mr52)_u-boot.bin`
The default for "--serial" option is /dev/ttyUSB0.
4. Power on the device. The ubootwrite script will upload the image to
the device and launch it. The second stage u-boot will in turn load
the initramfs image by TFTP, provided the TFTP server is running
correctly. This process will take about 13 minutes. Once a solid
white LED is displayed, the image has successfully finished
loading. Note: If the image does not load via TFTP, try again with
the Ethernet link to 10Mb/s Half-Duplex.
5. (MR42 only) Do not connect over the network. Instead connect over
the UART using minicom or similar tool. To replace u-boot with
the network enabled version, please run the following commands.
Note that in the provided initramfs images, the u-boot.mbn file
is located in /root:
If you have not used the provided initramfs, you must ensure you
are using an image with "boot_layout" ECC configuration enabled in
the Kernel. This will be version 5.10 or higher. If you do not do
this correctly the device will be bricked.
`insmod mtd-rw i_want_a_brick=1
mtd erase /dev/mtd8
nandwrite -pam /dev/mtd8 /root/mr42_u-boot.mbn`
After running nandwrite, ensure you observe the following output:
`Writing data to block 0 at offset 0x0
Writing data to block 1 at offset 0x20000
Writing data to block 2 at offset 0x40000`
6. (Optional) If you have no further use for the Meraki OS, you can
remove all other UBI volumes on ubi0 (mtd11), including diagnostic1,
part.old, storage and part.safe. You must not remove the ubi1 ART
partition (mtd12).
`for i in diagnostic1 part.old storage part.safe ; do
ubirmvol /dev/ubi0 -N $i
done`
7. Proceed to flash the sysupgrade image via luci, or else download or
scp the image to /tmp and use the sysupgrade command.
[1] The mentioned images and ubootwrite.py script can be found in this repo:
https://github.com/clayface/openwrt-cryptid
[2] The modified u-boot sources for the MR42 and MR52 are available:
https://github.com/clayface/U-boot-MR52-20200629
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Add backports of the following patches:
"net: stmmac: explicitly deassert GMAC_AHB_RESET" and
"ARM: dts: qcom: add ahb reset to ipq806x-gmac"
Required for Meraki MR42/MR52.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Rather than having separate patches for each GSBI node added, this patch
consolidates the existing GSBI1 patch into
083-ipq8064-dtsi-additions.patch. In addition, GSBI6 and GSBI7 I2C nodes,
required for the MR42 and MR52 respectively, are added.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Currently, we are overriding the bootloader provided MAC-s as the ethernet
aliases are reversed so MAC-s were fixed up in userspace.
There is no need to do that as we can just fix the aliases instead and get
rid of MAC setting via userspace helper.
Fixes: 59f0a0f ("ipq806x: add Edgecore ECW5410 support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
ECW5410 has 2 QCA9984 cards, one per PCI controller.
They are located at PCI adresses 0001:01:00.0 and 0002:01:00.0.
Currently, pre-cal is not provided for 0001:01:00.0 at all,but for
0000:01:00.0 which is incorrect and causes the ath10k driver to not
be able to fetch the BMI ID and use that to fetch the proper BDF but
rather fail with:
[ 12.029708] ath10k 5.10 driver, optimized for CT firmware, probing pci device: 0x46.
[ 12.031816] ath10k_pci 0001:01:00.0: enabling device (0140 -> 0142)
[ 12.037660] ath10k_pci 0001:01:00.0: pci irq msi oper_irq_mode 2 irq_mode 0 reset_mode 0
[ 13.173898] ath10k_pci 0001:01:00.0: qca9984/qca9994 hw1.0 target 0x01000000 chip_id 0x00000000 sub 168c:cafe
[ 13.174015] ath10k_pci 0001:01:00.0: kconfig debug 0 debugfs 1 tracing 0 dfs 1 testmode 0
[ 13.189304] ath10k_pci 0001:01:00.0: firmware ver 10.4b-ct-9984-fW-13-5ae337bb1 api 5 features mfp,peer-flow-ctrl,txstatus-noack,wmi-10.x-CT,ratemask-CT,regdump-CT,txrate-CT,flush-all-CT,pingpong-CT,ch-regs-CT,nop-CT,set-special-CT,tx-rc-CT,cust-stats-CT,txrate2-CT,beacon-cb-CT,wmi-block-ack-CT,wmi-bcn-rc-CT crc35
[ 15.492322] ath10k_pci 0001:01:00.0: failed to fetch board data for bus=pci,vendor=168c,device=0046,subsystem-vendor=168c,subsystem-device=cafe,variant=Edgecore-ECW541 from ath10k/QCA9984/hw1.0/board-2.bin
[ 15.543883] ath10k_pci 0001:01:00.0: failed to fetch board-2.bin or board.bin from ath10k/QCA9984/hw1.0
[ 15.543920] ath10k_pci 0001:01:00.0: failed to fetch board file: -12
[ 15.552281] ath10k_pci 0001:01:00.0: could not probe fw (-12)
So, provide the pre-cal for the actual PCI card and not the non-existent
one.
Fixes: 59f0a0f ("ipq806x: add Edgecore ECW5410 support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
It looks like this is a leftover before there was a proper MDIO driver.
Since both PHY-s are connected to the HW MDIO bus there is no reason for
this to exist anymore, especially since it uses the same pins as the HW
controller and has the pinmux for the set to "MDIO" so this worked by
pure luck as GPIO MDIO would probe first and override the HW driver.
Move the GMAC3 to simply use the same MDIO bus phandle.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
After the ath10k_patch_mac lines have been removed, a lot of blocks
can be consolidated.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The out-of-tree qcom-smem patches traditionally displayed mtd partition names
in upper case, starting with the new mainline qcom-smem support in kernel v5.10,
it switched to normalizing the partition names to lower case.
While both 5.4 and 5.10 were supported in the target, we carried a workaround
to support both of them. Since the target has dropped 5.4 recently, those
can be removed now.
Ref:
2db9dded0a ("ipq806x: nbg6817: case-insensitive qcom-smem partitions")
435dc2e77e ("ipq806x: ecw5410: case-insensitive qcom-smem partitions")
f70e11cd97 ("ipq806x: g10: case-insensitive qcom-smem partitions")
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Use nvmem framework for supported mac-address stored
in nvmem cells and drop mac patch function for hotplug
script for supported devices.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
[rebase, move to correct node for d7800, include xr500]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Deleted (upstreamed):
bcm27xx/patches-5.10/950-0145-xhci-add-quirk-for-host-controllers-that-don-t-updat.patch [1]
Manually rebased:
bcm27xx/patches-5.10/950-0355-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
bcm53xx/patches-5.10/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
Note: although automatically rebaseable, the last patch has been edited to avoid
conflicting bit definitions.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.10.y&id=b6f32897af190d4716412e156ee0abcc16e4f1e5
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
This adds support for the Netgear Nighthawk Pro Gaming XR500.
It is the successor to the Netgear Nighthawk R7800 and shares almost
identical hardware to that device.
The stock firmware is a heavily modified version of OpenWRT.
Specifications:
SoC: Qualcomm Atheros IPQ8065
RAM: 512 MB
Storage: 256 MiB NAND Flash
Wireless: 2x Qualcomm Atheros QCA9984
Ethernet: 2x 1000/100/10 dedicated interfaces
Switch: 5x 1000/100/10 external ports
USB: 2x 3.0 ports
More information:
Manufacturer page: https://www.netgear.com/gaming/xr500/
Almost identical to Netgear R7800
Differences (r7800 > xr500):
Flash: 128MiB > 256MiB
Removed esata
swapped leds:
usb1 (gpio 7 > 8)
usb2 (gpio 8 > 26)
guest/esata (gpio 26 > 7)
MAC addresses:
On the OEM firmware, the mac addresses are:
WAN: *:50 art 0x6
LAN: *:4f art 0x0 (label)
2G: *:4f art 0x0
5G: *:51 art 0xc
Installation:
Install via Web Interface (preferred):
Utilize openwrt-ipq806x-netgear_xr500-squashfs-factory.img
Install via TFTP recovery:
1.Turn off the power, push and hold the reset button (in a hole on
backside) with a pin
2.Turn on the power and wait till power led starts flashing white
(after it first flashes orange for a while)
3.Release the reset button and tftp the factory img in binary mode.
The power led will stop flashing if you succeeded in transferring
the image, and the router reboots rather quickly with the new
firmware.
4.Try to ping the router (ping 192.168.1.1). If does not respond,
then tftp will not work either.
Uploading the firmware image with a TFTP client
$ tftp 192.168.1.1
bin
put openwrt-ipq806x-netgear_xr500-squashfs-factory.img
Note:
The end of the last partition is at 0xee00000. This was chosen
by the initial author, but nobody was able to tell why this
particular arbitrary size was chosen. Since it's not leaving
too much empty space and it's the only issue left, let's just
keep it for now.
Based on work by Adam Hnat <adamhnat@gmail.com>
ref: https://github.com/openwrt/openwrt/pull/3215
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
[squash commits, move common LEDs to DTSI, remove SPDX on old
files, minor whitespace cleanup, commit message facelift,
add MAC address overview, add Notes, fix MAC addresses,
use generic name for partition nodes in DTS]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Move kernel version to 5.10 as has been tested by many users
with positive feedback.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
[Tested on: ipq8064/g10; ipq8065/nbg6817]
Tested-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
The default value for CONFIG_RCU_CPU_STALL_TIMEOUT was changed from 60
seconds to 21 seconds in 2012 in the upstream kernel. Some targets
already use 21 seconds.
This patch changes the default value in the generic configuration to 21
seconds and removes the target specific configuration options.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Rui Salvaterra <rsalvaterra@gmail.com>
The partitions that have compatible property set are skipped by mtd if
they are not contained inside a partitions node and this breaks
fetching MAC address from "default-mac" partition.
Fix this by defining all the partitions inside partitions node with
compatible = "fixed-partitions" as nvmem requires the standard
partitions scheme to work correctly.
Fixes: FS#3945
Fixes: cd36d71655 ("ipq806x/dts: Add Archer C2600 DTS")
Fixes: 0458a8993c ("ipq806x: convert mtd-mac-address to nvmem
implementation")
Signed-off-by: Filip Matijević <filip.matijevic.pz@gmail.com>
Reviewed-by: Ansuel Smith <ansuelsmth@gmail.com>
[adjust commit title/message]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
CONFIG_RCU_{NEED_SEGCBLIST,STALL_COMMON} are set basically everywhere. Move them
to the generic kconfigs. And resort the generic kconfigs while at it.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
The problem has been fixed in f47cb405ca ("ipq806x: fix pci broken
on bootm command"), now the pcie part can be written in the usual way.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Ansuel Smith <ansuelsmth@gmail.com>
The partition name in the device dts is '0:ART'.
Be independent to prevent this part from becoming
incorrect once the kernel v5.4 gone.
Fixes: da8428d277 ("ipq806x: add support for Askey RT4230W REV6")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Rearrange all voltage triplets for "opp_table0" to match the
specifications. "opp-microvolt" and "opp-microvolt-<name>" triplets
are in order of <target min max>, and NOT <min target max>.
Previously, the CPU would *always* spend its time at the "minimum"
voltage, ignoring the actual intended target. This is a regression
from previous behavior.
On an NBG6817 with a Qualcomm CPU of PVS bin #2...
(see &opp_table0 -> opp-1725000000 -> opp-microvolt-speed0-pvs2-v0)
* Before:
/usr/bin/tail -n +1 /sys/kernel/debug/opp/cpu0/opp\:1725000000/supply-0/u_volt_*
==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_max <==
1260000
==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_min <==
1200000
==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_target <==
1140000
* After:
/usr/bin/tail -n +1 /sys/kernel/debug/opp/cpu0/opp\:1725000000/supply-0/u_volt_*
==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_max <==
1260000
==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_min <==
1140000
==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_target <==
1200000
To check voltages and frequencies at run time, use...
/bin/cat /sys/kernel/debug/regulator/regulator_summary &&
/bin/cat /sys/kernel/debug/clk/clk_summary | grep "hfpll"
See
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/Documentation/devicetree/bindings/opp/opp.txt?h=v5.4.142#n91
Fixes: 1e25423be8 ("ipq806x: refresh dtsi patches")
Signed-off-by: Shane Synan <digitalcircuit36939@gmail.com>
Reviewed-by: Ansuel Smith <ansuelsmth@gmail.com>
[commit message style cleanup, another kernel refresh]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Define nvmem-cells and convert mtd-mac-address to nvmem implementation.
The conversion is done with an automated script.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Rework patch 681-NET-add-mtd-mac-address-support to implement
only the function to read the mac-address from mtd.
Generalize mtd-mac-address-increment function so it can be applied
to any source of of_get_mac_address.
Rename any mtd-mac-address-increment to mac-address-increment.
Rename any mtd-mac-address-increment-byte to mac-address-increment-byte.
This should make simplify the conversion of target to nvmem implementation.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
