Commit Graph

8 Commits

Author SHA1 Message Date
John Crispin
b50b0cff2d lantiq: use new property name for eiu irqs
Signed-off-by: John Crispin <john@phrozen.org>
2016-06-13 22:51:41 +02:00
Felix Fietkau
6fd5449198 lantiq: Make the ar9.dtsi sram node match "simple-bus"
All other SoC types are using "lantiq,sram" and "simple-bus" to ensure
that all child nodes are set up correctly during linux kernel
initialization (plat_of_setup(void) in arch/mips/lantiq/prom.c). Without
this some of sram child nodes might not be parsed.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

SVN-Revision: 48548
2016-01-29 00:42:50 +00:00
Felix Fietkau
04ad02d132 lantiq: Switch to the new SPI driver
Compared to the "old" driver:
- Each device must assign a pinctrl setting to the SPI node to allow the
  new SPI driver to configure the SPI pins.
  While here we are also using separate input and output settings so we
  are independent of whether the bootloader configures the pins correctly.
- We use the new "compatible" strings to make the driver choose the
  correct number of chip-selects for each SoC.
- The new driver starts counting the chip-selects at 1 (instead of 0, like
  the old one did). Thus we have to adjust the devices accordingly.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

SVN-Revision: 48293
2016-01-17 19:56:03 +00:00
Felix Fietkau
a5c177943b lantiq: Add the SPI node to ar9.dtsi and vr9.dtsi
This allows devices to use SPI without having to re-define (and thus
duplicating) the whole SPI node.
By default SPI is disabled (as before) because only few devices need it.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

SVN-Revision: 48286
2016-01-17 19:55:17 +00:00
Felix Fietkau
1204a1b1e5 lantiq: Use the new pinctrl compatible strings
These were introduced in upstream commit
be14811c03cf "pinctrl/lantiq: introduce new dedicated devicetree
bindings" and finally allow us to use the individual pins within our dts
(for example spi_clk, etc.).
Please note that this changes the number of GPIOs which are available for
some SoCs. VRX200 SoCs for example only have 50 pins, but previously 56
pins were exposed. This means that all places which are using hardcoded
GPIO numbers (which are not passed via device-tree) need to be adjusted
(because the first GPIO number is now 462, instead of 456).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

SVN-Revision: 48284
2016-01-17 19:55:04 +00:00
John Crispin
4595440215 lantiq: Introduce DWC2 compatible DTS definitions for AR9 USB
Since the AR9 USB is very similar to the VR9 USB it too can be used with
the upstream DWC2 driver.

Here are the DTS definitions which make it compatible with the DWC2
driver.

Signed-off-by: Antti Seppälä <a.seppala@gmail.com>

SVN-Revision: 46914
2015-09-14 20:08:07 +00:00
John Crispin
826b461427 lantiq: add 3.18 support
Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 44348
2015-02-09 12:13:25 +00:00
John Crispin
157c86371f lantiq: move dts files to thir own folder
Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 36443
2013-04-25 19:03:32 +00:00