The Yafut tool now has limited capabilities for working on filesystem
images stored in regular files. This enables preparing Yaffs2 images
for devices with NOR flash using upstream Yaffs2 filesystem code instead
of the custom kernel2minor tool.
Since minimizing the size of the resulting filesystem image size is
important and upstream Yaffs2 code requires two allocator reserve blocks
to be available when writing a file to the filesystem, a trick is
employed while preparing an OpenWRT image: the blank filesystem image
that Yafut operates on initially contains two extra erase blocks that
are chopped off after the kernel file is written. This is safe to do
because Yaffs2 has a true log structure and therefore only ever writes
sequentially (and the size of the kernel file is known beforehand).
While the two extra erase blocks are necessary for writes, Yaffs2 code
seems to be perfectly capable of reading back files from a "truncated"
filesystem that does not contain these extra erase blocks.
In terms of image size, this new approach is only marginally worse than
the current kernel2minor-based one: specifically, upstream Yaffs2 code
needs to write three object headers (each of which takes up an entire
data chunk) when the kernel file is written to the filesystem:
- an object header for the kernel file when it is created,
- an object header for the root directory when the kernel file is
created,
- an updated object header for the kernel file when the latter is
fully written (so that its new size can be recorded).
kernel2minor only writes two of these headers, which is the absolute
minimum required for reading the file back. This means that the
Yafut-based approach causes firmware images to be at most one erase
block (64 kB) larger than those created using kernel2minor, but only in
the very unfortunate scenario where the size of the kernel file is
really close to a multiple of the erase block size.
The rest of the calculations performed when the empty filesystem image
is first prepared stems from the Yaffs2 layout used by MikroTik NOR
devices: each 65,536-byte erase block contains 63 chunks, each of which
consists of 1024 bytes of data followed by 16-byte Yaffs tags without
ECC data; each such group of 63 chunks is then followed by 16 bytes of
padding, which translates to "-C 1040 -B 64k -E" in the Yafut
invocation. Yaffs2 checkpoints and summaries are disabled (using
Yafut's -P and -S switches, respectively) as they are merely performance
optimizations that require extra storage space. The -L and -M switches
are used to force little-endian or big-endian byte order (respectively)
in the resulting filesystem image, no matter what byte order the build
host uses. The tr invocation is used to ensure that the filesystem
image is initialized with 0xFF bytes (which are an indicator of unused
space for Yaffs2 code).
Signed-off-by: Michał Kępień <openwrt@kempniu.pl>
Link: https://github.com/openwrt/openwrt/pull/13453
Signed-off-by: Robert Marko <robimarko@gmail.com>
Dell/SonicWall APL26-0AE (marketed as SonicPoint ACe) is a dual band
wireless access point. End of life as of 2022-07-31.
Specification
SoC: QualcommAtheros QCA9550
RAM: 256 MB DDR2
Flash: 32 MB SPI NOR
WIFI: 2.4 GHz 3T3R integrated
5 GHz 3T3R QCA9890 oversized Mini PCIe card
Ethernet: 2x 10/100/1000 Mbps QCA8334
port labeled lan1 is PoE capable (802.3at)
USB: 1x 2.0
LEDs: LEDs: 6x which 5 are GPIO controlled and two of them are dual color
Buttons: 2x GPIO controlled
Serial: RJ-45 port, SonicWall pinout
baud: 115200, parity: none, flow control: none
Before flashing, be sure to have a copy of factory firmware, in case You
wish to revert to original firmware.
All described procedures were done in following environment:
ROM Version: SonicROM (U-Boot) 8.0.0.0-11o
SafeMode Firmware Version: SonicOS 8.0.0.0-14o
Firmware Version: SonicOS 9.0.1.0
In case of other versions, following installation instructions might be
ineffective.
Installation
1. Prepare TFTP server with OpenWrt sysupgrade image and rename that
image to "sp_fw.bin".
2. Connect to one of LAN ports.
3. Connect to serial port.
4. Hold the reset button (small through hole on side of the unit),
power on the device and when prompted to stop autoboot, hit any key.
The held button can now be released.
5. Alter U-Boot environment with following commands:
setenv bootcmd bootm 0x9F110000
saveenv
6. Adjust "ipaddr" (access point, default is 192.168.1.1) and "serverip"
(TFTP server, default is 192.168.1.10) addresses in U-Boot
environment, then run following commands:
tftp 0x80060000 sp_fw.bin
erase 0x9F110000 +0x1EF0000
cp.b 0x80060000 0x9F110000 $filesize
7. After successful flashing, execute:
boot
8. The access point will boot to OpenWrt. Wait few minutes, until the
wrench LED will stop blinking, then it's ready for configuration.
Known issues
Initramfs image can't be bigger than specified kernel size, otherwise
bootloader will throw LZMA decompressing error. Switching to lzma-loader
should workaround that.
This device has Winbond 25Q256FVFG and doesn't have reliable reset, which
causes hang on reboot, thus broken-flash-reset needs to be added. This
property addition causes dispaly of "scary" warning on each boot, take
this warnig into consideration.
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Hardware:
SoC: Qualcomm Atheros QCA956X ver 1 rev 0
CPU clock: 775.000 MHz
Memory: 128 MB DDR2
Flash: 32 MB SPI NOR mx25l25635e
Switch: Atheros AR8327 rev. 4
Ethernet: 5x 10/100/1000 Mbps (1 WAN + 4 LAN)
Buttons: 1x Reset
Serial: TX, RX, GND, VCC
Baudrate: 115200
Wifi: Qualcomm Atheros qca988x 802.11ac/n - 3x3
Qualcomm Atheros AR9561 802.11b/g/n - 3x3
Not working:
Leds: 1x via a SPI controller
Display: ST7789V or ILI9341V
controlled by stm32f205.
Note:
DSA changes are ready, but we have an issue with
ports not working after 20-30 minutes. So for now
we use swconfig.
Installation: serial connection only
There is a J11 four pin connector. You need to connect TX, RX and GND.
You can find very good information about the device here
https://github.com/alexanderhenne/AFi-R?tab=readme-ov-file#finding-j11
Upgrading via serial port:
1. Download the kernel initramfs image. Copy the image to a TFTP server
2. Connect to console on the AP, and connect the LAN1 port to your PC LAN
3. Stop autoboot to get to U-boot shell
Interrupt the autoboot process by pressing any key when prompted
4. Transfer the kernel image with TFTP
Set your ip address on your TFTP server to 192.168.1.254
# tftpboot 0x81000000 amplifi-router-hd-initramfs-kernel.bin
5. Load the image
# bootm 0x81000000
6. SCP sysupgrade image from your PC to the Amplifi HD
(If you use a newer mac use scp -O)
# scp openwrt-ath79-generic-ubnt_amplifi-router-hd-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/
7. Write sysupgrade to the firmware partition
# mtd write /tmp/openwrt-ath79-generic-ubnt_amplifi-router-hd-squashfs-sysupgrade.bin firmware
8. Reboot your device
# reboot
Credit to alexanderhenne for all the information.
Signed-off-by: Kristian Skramstad <kristian+github@83.no>
Carambola3 is a WiFi module based on Qualcomm/Atheros QCA4531
http://wiki.8devices.com/carambola3
Specification:
- 650/600/216 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 32 MB of FLASH
- 2T2R 2.4 GHz
- 2x 10/100 Mbps Ethernet
- 1x USB 2.0 Host socket
- UART for serial console
- 12x GPIO
Flash instructions:
Upgrading from ar71xx target:
- Upload image into the board:
scp openwrt-ath79-generic-8dev_carambola3-squashfs-sysupgrade.bin \
root@192.168.1.1/tmp/
- Run sysupgrade
sysupgrade -F /tmp/openwrt-ath79-generic-8dev_carambola3-squashfs-sysupgrade.bin
Upgrading from u-boot:
- Set up tftp server with openwrt-ath79-generic-8dev_carambola3-initramfs-kernel.bin
- Go to u-boot (reboot and press ESC when prompted)
- Set TFTP server IP
setenv serverip 192.168.1.254
- Set device ip from the same subnet
setenv ipaddr 192.168.1.1
- Copy new firmware to board
tftpboot 0x82000000 initramfs.bin
- Boot OpenWRT
bootm 0x82000000
- Upload image openwrt-ath79-generic-8dev_carambola3-squashfs-sysupgrade.bin into the board
- Run sysupgrade.
Signed-off-by: Andrey Bondar <a.bondar@8devices.com>
Link: https://github.com/openwrt/openwrt/pull/15514
Signed-off-by: Robert Marko <robimarko@gmail.com>
There is no need to use 'list_for_each_entry_safe' here, as nothing is
removed from the list in the 'for' loop.
Use 'list_for_each_entry' instead, it is slightly less verbose.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://github.com/openwrt/openwrt/pull/15435
Link: https://github.com/openwrt/openwrt/pull/15435
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
FCC ID: A8J-EWS660AP
Engenius ENS1750 is an outdoor wireless access point with
2 gigabit ethernet ports, dual-band wireless,
internal antenna plates, and 802.3at PoE+
Engenius EWS660AP, ENS1750, and ENS1200 are "electrically identical,
different model names are for marketing purpose" according to docs
provided by Engenius to the FCC.
**Specification:**
- QCA9558 SOC 2.4 GHz, 3x3
- QCA9880 WLAN mini PCIe card, 5 GHz, 3x3, 26dBm
- AR8035-A PHY RGMII GbE with PoE+ IN
- AR8033 PHY SGMII GbE with PoE+ OUT
- 40 MHz clock
- 16 MB FLASH MX25L12845EMI-10G
- 2x 64 MB RAM
- UART at J1 populated, RX grounded
- 6 internal antenna plates (5 dbi, omni-directional)
- 5 LEDs, 1 button (power, eth0, eth1, 2G, 5G) (reset)
**MAC addresses:**
Base MAC addressed labeled as "MAC"
Only one Vendor MAC address in flash
eth0 *:d4 MAC art 0x0
eth1 *:d5 --- art 0x0 +1
phy1 *:d6 --- art 0x0 +2
phy0 *:d7 --- art 0x0 +3
**Serial Access:**
the RX line on the board for UART is shorted to ground by resistor R176
therefore it must be removed to use the console
but it is not necessary to remove to view boot log
optionally, R175 can be replaced with a solder bridge short
the resistors R175 and R176 are next to the UART RX pin
**Installation:**
2 ways to flash factory.bin from OEM:
Method 1: Firmware upgrade page:
OEM webpage at 192.168.1.1
username and password "admin"
Navigate to "Firmware Upgrade" page from left pane
Click Browse and select the factory.bin image
Upload and verify checksum
Click Continue to confirm and wait 3 minutes
Method 2: Serial to load Failsafe webpage:
After connecting to serial console and rebooting...
Interrupt uboot with any key pressed rapidly
execute `run failsafe_boot` OR `bootm 0x9fd70000`
wait a minute
connect to ethernet and navigate to
"192.168.1.1/index.htm"
Select the factory.bin image and upload
wait about 3 minutes
**Return to OEM:**
If you have a serial cable, see Serial Failsafe instructions
otherwise, uboot-env can be used to make uboot load the failsafe image
ssh into openwrt and run
`fw_setenv rootfs_checksum 0`
reboot, wait 3 minutes
connect to ethernet and navigate to 192.168.1.1/index.htm
select OEM firmware image from Engenius and click upgrade
**TFTP recovery:**
Requires serial console, reset button does nothing
rename initramfs.bin to '0101A8C0.img'
make available on TFTP server at 192.168.1.101
power board, interrupt boot
execute tftpboot and bootm 0x81000000
**Format of OEM firmware image:**
The OEM software of ENS1750 is a heavily modified version
of Openwrt Kamikaze. One of the many modifications
is to the sysupgrade program. Image verification is performed
simply by the successful ungzip and untar of the supplied file
and name check and header verification of the resulting contents.
To form a factory.bin that is accepted by OEM Openwrt build,
the kernel and rootfs must have specific names...
openwrt-ar71xx-generic-ens1750-uImage-lzma.bin
openwrt-ar71xx-generic-ens1750-root.squashfs
and begin with the respective headers (uImage, squashfs).
Then the files must be tarballed and gzipped.
The resulting binary is actually a tar.gz file in disguise.
This can be verified by using binwalk on the OEM firmware images,
ungzipping then untaring.
Newer EnGenius software requires more checks but their script
includes a way to skip them, otherwise the tar must include
a text file with the version and md5sums in a deprecated format.
The OEM upgrade script is at /etc/fwupgrade.sh.
OKLI kernel loader is required because the OEM software
expects the kernel to be no greater than 1536k
and the factory.bin upgrade procedure would otherwise
overwrite part of the kernel when writing rootfs.
Note on PLL-data cells:
The default PLL register values will not work
because of the external AR8035 switch between
the SOC and the ethernet port.
For QCA955x series, the PLL registers for eth0 and eth1
can be see in the DTSI as 0x28 and 0x48 respectively.
Therefore the PLL registers can be read from uboot
for each link speed after attempting tftpboot
or another network action using that link speed
with `md 0x18050028 1` and `md 0x18050048 1`.
The clock delay required for RGMII can be applied
at the PHY side, using the at803x driver `phy-mode`.
Therefore the PLL registers for GMAC0
do not need the bits for delay on the MAC side.
This is possible due to fixes in at803x driver
since Linux 5.1 and 5.3
Tested-by: Kevin Abraham <kevin@westhousefarm.com>
Signed-off-by: Kevin Abraham <kevin@westhousefarm.com>
All kernel config files are refreshed by
`make kernel_oldconfig CONFIG_TARGET={subtarget_target,subtarget}`
"CONFIG_SQUASHFS_DECOMP_SINGLE=y" is manually selected as all ath79
SoCs are single core processors.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
The upcoming 6.6 kernel will introduce a new upstream generic
"gpio-latch" driver. It will conflict with the downstream MikroTik
GPIO latch driver. Let's rename it to avoid any potential issues.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Backport patches for support of generic spi-nor from SFDP data for
kernel 6.1.
Kernel 5.15 have major rework of the info flags and it's not trustable
to backport this amount of changes and expect correct function of it.
All affected patches automatically refreshed using make
target/linux/refresh.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Specifications:
Qualcomm/Atheros QCA9531
2x 10/100 Mbps Ethernet, with 48v PoE
2T2R 2.4 GHz, 802.11b/g/n
128MB RAM
16MB SPI Flash
4x LED (Always On Power, LAN, WAN, WLAN)
Flashing instructions:
The original firmware is based on OpenWrt, so flashing the sysupgrade image over the factory firmware is sufficient.
The bootloader has a built-in recovery web-ui. This is the method I used to flash OpenWrt. You can get to the recovery web-ui by holding down the reset button for a few seconds (~5s) while pluggin in the router. The LEDs should start blinking fast and the router should be available on 192.168.1.1 for the recovery.
Tested: Reset button, WAN LED, LAN LED, Power LED (always on, not much to test), WLAN LED, MAC addresses (same as factory firmware).
Signed-off-by: Felix Golatofski <git@xdfr.de>
Huawei AP5030DN is a dual-band, dual-radio 802.11ac Wave 1 3x3 MIMO
enterprise access point with two Gigabit Ethernet ports and PoE
support.
Hardware highlights:
- CPU: QCA9550 SoC at 720MHz
- RAM: 256MB DDR2
- Flash: 32MB SPI-NOR
- Wi-Fi 2.4GHz: QCA9550-internal radio
- Wi-Fi 5GHz: QCA9880 PCIe WLAN SoC
- Ethernet 1: 10/100/1000 Mbps Ethernet through Broadcom B50612E PHY
- Ethernet 2: 10/100/1000 Mbps Ethernet through Marvell 88E1510 PHY
- PoE: input through Ethernet 1 port
- Standalone 12V/2A power input
- Serial console externally available through RJ45 port
- External watchdog: SGM706 (1.6s timeout)
Serial console:
9600n8 (9600 baud, no stop bits, no parity, 8 data bits)
MAC addresses:
Each device has 32 consecutive MAC addresses allocated by
the vendor, which don't overlap between devices.
This was confirmed with multiple devices with consecutive
serial numbers.
The MAC address range starts with the address on the label.
To be able to distinguish between the interfaces,
the following MAC address scheme is used:
- eth0 = label MAC
- eth1 = label MAC + 1
- radio0 (Wi-Fi 5GHz) = label MAC + 2
- radio1 (Wi-Fi 2.4GHz) = label MAC + 3
Installation:
0. Connect some sort of RJ45-to-USB adapter to "Console" port of the AP
1. Power up the AP
2. At prompt "Press f or F to stop Auto-Boot in 3 seconds",
do what they say.
Log in with default admin password "admin@huawei.com".
3. Boot the OpenWrt initramfs from TFTP using the hidden script
"run ramboot". Replace IP address as needed:
> setenv serverip 192.168.1.10
> setenv ipaddr 192.168.1.1
> setenv rambootfile
openwrt-ath79-generic-huawei_ap5030dn-initramfs-kernel.bin
> saveenv
> run ramboot
4. Optional but recommended as the factory firmware cannot
be downloaded publicly:
Back up contents of "firmware" partition using the web interface or ssh:
$ ssh root@192.168.1.1 cat /dev/mtd11 > huawei_ap5030dn_fw_backup.bin
5. Run sysupgrade using sysupgrade image. OpenWrt
shall boot from flash afterwards.
Return to factory firmware (using firmware upgrade package downloaded from
non-public Huawei website):
1. Start a TFTP server in the directory where
the firmware upgrade package is located
2. Boot to u-boot as described above
3. Install firmware upgrade package and format the config partitions:
> update system FatAP5X30XN_SOMEVERSION.bin
> format_fs
Return to factory firmware (from previously created backup):
1. Copy over the firmware partition backup to /tmp,
for example using scp
2. Use sysupgrade with force to restore the backup:
sysupgrade -F huawei_ap5030dn_fw_backup.bin
3. Boot AP to U-Boot as described above
Quirks and known issues
-----------------------
- On initial power-up, the Huawei-modified bootloader suspends both
ethernet PHYs (it sets the "Power Down" bit in the MII control
register). Unfortunately, at the time of the initial port, the kernel
driver for the B50612E/BCM54612E PHY behind eth0 doesn't have a resume
callback defined which would clear this bit. This makes the PHY unusable
since it remains suspended forever. This is why the backported kernel
patches in this commit are required which add this callback and for
completeness also a suspend callback.
- The stock firmware has a semi dual boot concept where the primary
kernel uses a squashfs as root partition and the secondary kernel uses
an initramfs. This dual boot concept is circumvented on purpose to gain
more flash space and since the stock firmware's flash layout isn't
compatible with mtdsplit.
- The external watchdog's timeout of 1.6s is very hard to satisfy
during bootup. This is why the GPIO15 pin connected to the watchdog input
is configured directly in the LZMA loader to output the CPU_CLK/4 signal
which keeps the watchdog happy until the wdt-gpio kernel driver takes
over. Because it would also take too long to read the whole kernel image
from flash, the uImage header only includes the loader which then reads
the kernel image from flash after GPIO15 is configured.
Signed-off-by: Marco von Rosenberg <marcovr@selfnet.de>
[fixed 6.6 backport patch naming]
Signed-off-by: David Bauer <mail@david-bauer.net>
This device only has 64 MiB RAM and ath10k wireless driver will
consume a lot of memory. Let's move it to the tiny sub-target to
get extra 7 MiB of free space. In this way, we can extend their
lifetime to receive support for the next OpenWrt LTS version. This
patch also trims the duplicate "recovery.bin" image as it's the
same as the "factory.bin".
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
These devices only have 64 MiB RAM and ath10k wireless driver will
consume a lot of memory. Let's move them to the tiny sub-target to
get extra 7 MiB of free space. In this way, we can extend their
lifetime to receive support for the next OpenWrt LTS version. This
patch also trims the USB package for the non-existent USB port.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
The upcoming D-Link devices to the tiny sub-target require it to
parse the u-env MAC address. The kernel size will increase by
about 1 KiB.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Move seama image recipe to the common Makefile in order for some
tiny sub-target D-Link devices can share it.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Add a hotplug script and add ttyATH1 on ELECOM WAB-I1750-PS to
/etc/inittab while booting for using that console as an OpenWrt console.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Register ttyS0 and ttyATH1 as Linux console on ELECOM WAB-I1750-PS.
ttyS0 provides "SERVICE" port and internal pin header for debugging and
recoverying by maker, ttyATH1 provides "SERIAL" port for configuration
by users.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
The 5.15 kenel config file, patches and version switches will be
removed in this patch. We will introduce kernel 6.6 support soon.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
The COVR-C1200 devices are sold as "Whole Home Mesh Wi-Fi"
sets in packs of two (COVR-C1202) and three (COVR-C1203).
Specifications:
* QCA9563, 16 MiB flash, 128 MiB RAM, 2x3:2 802.11n
* QCA9886 2x2:2 801.11ac Wave 2
* AR8337, 2 Gigabit ports (1: WAN; 2: LAN)
* USB Type-C power connector (5V, 3A)
Installation COVR Point A:
* In factory reset state: OEM Web UI is at 192.168.0.50
no DHCP, skip wizard by directly accessing:
http://192.168.0.50/UpdateFirmware_Simple.html
* After completing setup wizard: Web UI is at 192.168.0.1
DHCP enabled, login with empty password
* Flash factory.bin
* Perform a factory reset to restore OpenWrt UCI defaults
Installation COVR Points B:
* OEM Web UI is at 192.168.0.50, no DHCP, empty password
* Flash factory.bin
* Perform a factory reset to restore OpenWrt UCI defaults
Recovery:
* Keep reset button pressed during power on
* Recovery Web UI is at 192.168.0.50, no DHCP
* Flash factory.bin
used to work best with Chromium-based browsers or curl:
curl -F firmware=@factory.bin \
http://192.168.0.50/upgrade.cgi
since this fails to work on modern Linux systems,
there is also a script dlink_recovery_upload.py
Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
Cleanup uart1-related node on ELECOM WAB-I1750-PS and enable it for
"SERIAL" port on the case.
"SERIAL" port can be used for OpenWrt console by adding the following
line to /etc/inittab and rebooting:
ttyATH1::askfirst:/usr/libexec/login.sh
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Add aliases with "serialN = &uartN;" of uart0/1 on QCA955x SoCs to
qca955x.dtsi, to enable uart1 on Linux Kernel.
without this:
[ 0.342915] ar933x-uart 18500000.uart: unable to get alias id, err=-19
Additionally, remove "serial0 = &uart;" alias from QCA955x device
dts/dtsi files.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Add HighSpeed UART support to QCA955x series SoCs as a secondary UART
(uart1). This UART is compatible with qca,ar9330-uart.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Rename the DT label of the primary UART on Qualcomm Atheros QCA955x
series SoCs to "uart0" from "uart" for the preparation to add HighSpeed
UART (uart1) support.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
ELECOM WAB-I1750-PS is a 2.4/5 GHz band 11ac (Wi-Fi 5) access point,
based on QCA9558.
Specification:
- SoC : Qualcomm Atheros QCA9558
- RAM : DDR2 128 MiB (2x Winbond W9751G6KB251)
- Flash : SPI-NOR 16 MiB (Macronix MX25L12835FMI-10G)
- WLAN : 2.4/5 GHz 3T3R
- 2.4 GHz : Qualcomm Atheros QCA9558 (SoC)
- 5 GHz : Qualcomm Atheros QCA9880
- Ethernet : 2x 10/100/1000 Mbps
- phy ("PD") : Atheros AR8035
- phy ("PSE") : Atheros AR8033
- LEDs/keys (GPIO) : 3x/3x
- UART : 2x RJ-45 port
- "SERVICE" : TTL (3.3V)
- port : ttyS0
- assignment : 1:3.3V, 2:GND, 3:TX, 4:RX
- settings : 115200n8
- note : no compatibility with "Cisco console cable"
- "SERIAL" : RS232C (+-12V)
- port : ?
- assignment : 1:NC , 2:NC , 3:TXD, 4:GND,
5:GND, 6:RXD, 7:NC , 8:NC
- settings : 115200n8
- note : compatible with "Cisco console cable"
- Buzzer : 1x GPIO-controlled
- USB : 1x USB 2.0 Type-A
- Power : DC jack or PoE
- DC jack : 12 VDC, 1.04 A (device only, rating)
- PoE : 802.3af/at, 48 VDC, 0.26 A (device only, rating)
- note : supports 802.3af supply on PSE (downstream) port
when powered by DC adapter or 802.3at PoE
Flash instruction using factory.bin image:
1. Boot WAB-I1750-PS without no upstream connection (or PoE connection
without DHCP)
2. Access to the WebUI ("http://192.168.3.1") on the device and open
firmware update page
("ツールボックス" -> "ファームウェア更新")
3. Select the OpenWrt factory.bin image and click update
("アップデート") button
4. Wait ~120 seconds to complete flashing
Revert to OEM firmware:
1. Download the latest OEM firmware
2. Remove 128 bytes(0x80) header from firmware image
3. Decode by xor with a pattern "8844a2d168b45a2d" (hex val)
4. Upload the decoded firmware to the device
5. Flash to "firmware" partition by mtd command
6. Reboot
Notes:
- To use the "SERVICE" port, the connection of 3.3V line is also
required to enable console output.
The uart line of "SERVICE" is branched out from the internal pin
header with 74HC126D and 3.3V line is connected to OE pin on it.
- "SERIAL" port is provided by HS UART on QCA9558 SoC that has
compatibility with qca,ar9330-uart, but QCA955x SoC's is not supported
on Linux Kernel and OpenWrt.
- To supply 802.3af PoE on "PSE" port when powered by DC adapter, 12 VDC
3.5 A adapter is recommended. (official: WAB-EX-ADP1)
MAC addresses:
Ethernet (PD, PSE): 00:90:FE:xx:xx:0A (Config, ethaddr (text))
2.4GHz : 00:90:FE:xx:xx:0A (Config, ethaddr (text))
5GHz : 00:90:FE:xx:xx:0B
[original work]
Signed-off-by: Yanase Yuki <dev@zpc.st>
[update for NVMEM and others]
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
ELECOM WAB-S1167-PS is a 2.4/5 GHz band 11ac (Wi-Fi 5) access point,
based on QCA9557.
Specification:
- SoC : Qualcomm Atheros QCA9557
- RAM : DDR2 128 MiB (2x Winbond W9751G6KB251)
- Flash : SPI-NOR 16 MiB (Macronix MX25L12835FMI-10G)
- WLAN : 2.4/5 GHz 2T2R
- 2.4 GHz : Qualcomm Atheros QCA9557 (SoC)
- 5 GHz : Qualcomm Atheros QCA9882
- Ethernet : 2x 10/100/1000 Mbps
- phy ("PD") : Atheros AR8035
- phy ("PSE") : Atheros AR8033
- LEDs/keys (GPIO) : 3x/3x
- UART : 1x RJ-45 port
- "SERVICE" : TTL (3.3V)
- port : ttyS0
- assignment : 1:3.3V, 2:GND, 3:TX, 4:RX
- settings : 115200n8
- note : no compatibility with "Cisco console cable"
- Buzzer : 1x GPIO-controlled
- USB : 1x USB 2.0 Type-A
- Power : DC jack or PoE
- DC jack : 12 VDC, 1 A (device only, rating)
- PoE : 802.3af/at, 48 VDC, 0.25 A (device only, rating)
- note : supports 802.3af supply on PSE (downstream) port
when powered by DC adapter or 802.3at PoE
Flash instruction using factory.bin image:
1. Boot WAB-S1167-PS without no upstream connection (or PoE connection
without DHCP)
2. Access to the WebUI ("http://192.168.3.1") on the device and open
firmware update page
("ツールボックス" -> "ファームウェア更新")
3. Select the OpenWrt factory.bin image and click update
("アップデート") button
4. Wait ~120 seconds to complete flashing
Revert to OEM firmware:
1. Download the latest OEM firmware
2. Remove 128 bytes(0x80) header from firmware image
3. Decode by xor with a pattern "8844a2d168b45a2d" (hex val)
4. Upload the decoded firmware to the device
5. Flash to "firmware" partition by mtd command
6. Reboot
Notes:
- To use the "SERVICE" port, the connection of 3.3V line is also
required to enable console output.
The uart line of "SERVICE" is branched out from the internal pin
header with 74HC126D and 3.3V line is connected to OE pin on it.
- The same PCB is used with WAB-S600-PS.
- To supply 802.3af PoE on "PSE" port when powered by DC adapter, 12 VDC
3.5 A adapter is recommended. (official: WAB-EX-ADP1)
MAC addresses:
Ethernet (PD, PSE): 00:90:FE:xx:xx:04 (Config, ethaddr (text))
2.4GHz : 00:90:FE:xx:xx:04 (Config, ethaddr (text))
5GHz : 00:90:FE:xx:xx:05
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
ELECOM WAB-S600-PS is a 2.4/5 GHz band 11n (Wi-Fi 4) access point, based
on QCA9557.
This device also supports 11ac (Wi-Fi 5) with the another official
firmware.
Specification:
- SoC : Qualcomm Atheros QCA9557
- RAM : DDR2 128 MiB (2x Winbond W9751G6KB251)
- Flash : SPI-NOR 16 MiB (Macronix MX25L12835FMI-10G)
- WLAN : 2.4/5 GHz 2T2R
- 2.4 GHz : Qualcomm Atheros QCA9557 (SoC)
- 5 GHz : Qualcomm Atheros QCA9882
- Ethernet : 2x 10/100/1000 Mbps
- phy ("PD") : Atheros AR8035
- phy ("PSE") : Atheros AR8033
- LEDs/keys (GPIO) : 3x/3x
- UART : 1x RJ-45 port
- "SERVICE" : TTL (3.3V)
- port : ttyS0
- assignment : 1:3.3V, 2:GND, 3:TX, 4:RX
- settings : 115200n8
- note : no compatibility with "Cisco console cable"
- Buzzer : 1x GPIO-controlled
- USB : 1x USB 2.0 Type-A
- Power : DC jack or PoE
- DC jack : 12 VDC, 1 A (device only, rating)
- PoE : 802.3af/at, 48 VDC, 0.25 A (device only, rating)
- note : supports 802.3af supply on PSE (downstream) port
when powered by DC adapter or 802.3at PoE
Flash instruction using factory.bin image:
1. Boot WAB-S600-PS without no upstream connection (or PoE connection
without DHCP)
2. Access to the WebUI ("http://192.168.3.1") on the device and open
firmware update page
("ツールボックス" -> "ファームウェア更新")
3. Select the OpenWrt factory.bin image and click update
("アップデート") button
4. Wait ~120 seconds to complete flashing
Revert to OEM firmware:
1. Download the latest OEM firmware
2. Remove 128 bytes(0x80) header from firmware image
3. Decode by xor with a pattern "8844a2d168b45a2d" (hex val)
4. Upload the decoded firmware to the device
5. Flash to "firmware" partition by mtd command
6. Reboot
Notes:
- To use the "SERVICE" port, the connection of 3.3V line is also
required to enable console output.
The uart line of "SERVICE" is branched out from the internal pin
header with 74HC126D and 3.3V line is connected to OE pin on it.
- The same PCB is used with WAB-S1167-PS.
- To supply 802.3af PoE on "PSE" port when powered by DC adapter, 12 VDC
3.5 A adapter is recommended. (official: WAB-EX-ADP1)
MAC addresses:
Ethernet (PD, PSE): BC:5C:4C:xx:xx:7C (Config, ethaddr (text))
2.4GHz : BC:5C:4C:xx:xx:7C (Config, ethaddr (text))
5GHz : BC:5C:4C:xx:xx:7D
[original work of common dtsi part for WAB-I1750-PS]
Signed-off-by: Yanase Yuki <dev@zpc.st>
[adding support for WAB-S600-PS]
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Ubiquiti WA devices with newer hw version (sold 2023)
require UBNT_VERSION to be at least 8.7.4, otherwise
the image is rejected.
For consistency, also increase version number for XC devices.
Signed-off-by: Martin Garbe <monomartin@opennet-initiative.de>
This commit fixes the alphabetical order in 02_network.
The 2 deco devices in ath79_setup_interfaces() were in the wrong place.
Signed-off-by: Foica David <superh552@gmail.com>
