With commit b53202a8c3 ("realtek: switch to use generic MDIO accessor functions")
the phy access logic was enhanced. A quite big kernel patch was introduced that
allowed to make use of hardware-assisted page access like we have in the realtek
target. Basically it works the following way
- The enhanced bus intercepts page write accesses
- Currently selected pages are stored in internal vars.
- Finally only all-in-one-consistent bus/register accesses are issued
- It intercepted page changes and ensured that only a complete bus call
For the details see https://github.com/openwrt/openwrt/pull/16172
Switching over to newer kernels this patch is really hard to maintain. Its heavy
modifcations exist only in the realtek target. So it does not matter if we keep
it as an kernel modification or directly include it in our driver. To make it the
future brighter we drop this patch and take over its logic. Thus the kernel will
stay totally modification-free. What do we do?
1. Up to now the bus->priv structure directly pointed to ethernet->priv. Create an
explicit private structure rtl838x_bus_priv that not only holds the ethernet->priv
pointer but also space for some bus status tracking vars as well.
2. Wherever we use a reference to ethernet->priv directly replace that by an
additional indirection over the new rtl838x_bus_priv structure.
3. Up to now the phy flag PHY_HAS_REALTEK_PAGES identified that we can use the
alternative paged access from the patch. As this will be no longer available
remove it and provide read_page/write_page functions for each possible PHY.
These functions will be pretty standard as for other Realtek PHYs.
4. The existing mdio bus read/write function rely on the classic MII_ADDR_C45
flag - one interface for two access types. This mixup will be removed on the way
to kernel 6.6. In the future there will be two pairs of access functions. One for
classic access one for c45 style access. Rewrite our functions into 3 parts:
- a classic read/write function: ready for kernel 6.6
- a new c45 read/write function: ready for kernel 6.6
- a legacy read/write wrapper: for current 5.15 for the time being
When we switch to 6.6 we only need to remove the legacy wrappers and link the
new functions. Life can be so easy.
5. The classic read/write functions will incorporate the interception logic that
was originally in the patch.
6. The package convenience functions that were embedded in the patch get lost as
well. Rewrite them inside our phy driver.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
[Minor checkpatch.pl cleanups]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
We should setup the registers for trapping LLDP packets to the CPU.
Currently, these packets are forwarded to all ports which is not desired
behaviour.
Signed-off-by: Kevin Jilissen <info@kevinjilissen.nl>
These registers control the handling of Link Layer Discovery Protocol
(LLDP) packets. This seems to be a typo in the naming.
Signed-off-by: Kevin Jilissen <info@kevinjilissen.nl>
According to the Realtek SDK code, the RTL8214FC, RTL8218B and RTL8218FB
all have the same chip ID 0x6276. Let's add a constant for it, as we're
using it in more than one location.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Respect the phy-is-integrated property on ethernet-phy nodes.
There are RTL8393M switches where the PHYs at address 48 and 49 are
provided by an external RTL8214FC. Hardcoding them to use the internal
SerDes makes it impossible to use the ports connected to such an
external PHY. Respect the phy-is-integrated property on ethernet-phy
nodes as a first step to support such ports.
The potential impact for this should be limited to RTL8393 based
switches, and looking at the commit messages and device tree files of
the supported switches based on this SoC, the SFP and/or combo ports are
either not working (D-Link DGS-1210-52, Netgear GS750E, TP-Link
SG2452P/T1600G-52PS), use PHYs at a different address (Panasonic
SwitchM48EG PN28480K), or already have the phy-is-integrated property
set on the PHYs at address 48 and 49.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Acked-by: Daniel Golle <daniel@makrotopia.org>
This patch adds support for 1000Base-X and 10GBase-CR directly on the
SerDes lanes of rtl93xx SoCs.
This fixes SFP/SFP+ support on devices like the XSG1250-12.
Signed-off-by: Tobias Schramm <tobias@t-sys.eu>
The register constants were duplicated in net/dsa/rtl83xx/debugfs.c and asm
mach-rtl838x/mach-rtl83xx.h. This commit removes this duplication.
Signed-off-by: Peter Körner <git@mazdermind.de>
According to https://svanheule.net/realtek/maple/register/led_sw_ctrl and also
drivers/net/dsa/rtl83xx/debugfs.c LED_SW_CTRL on the RTL838X should be 0xa00c
not 0x0128. Please note, that is is 0x0128 on the RTL8390/cypress SOC family.
Signed-off-by: Peter Körner <git@mazdermind.de>
the given code-format did not correctly express the condition and made the code
harder to read then necessary.
Signed-off-by: Peter Körner <git@mazdermind.de>
Before, PVID is reset for all ports and goes out of bounds. Also, PVID
is later changed by dsa configuration by `ip link` and `bridge vlan`
commands, this does not change the CPU port PVID and CPU PVID stays 0.
It does not allow sending packets from OpenWrt to any connected devices
unless default configuration is changed
This change iterates up to and including cpu_port and sets default PVID
to 1. For lan* ports PVID can be configured with `ip link` and `bridge
vlan` commands
Acked-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Fix incorrect register value being set for VLAN_PORT_FWD
Before, the 0b1111 would be set for the register which means outgoing
packets would receive an extra tag, corresponding to the PVID of the
port.
On untagged ports, this meant outgoing packets with a single tag.
On tagged ports, this meant outgoing QinQ packets, where the inner tag
was either the PVID of the untagged ingress port, or the already
assigned original (single) tag.
Acked-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Without this, luci shows 10M full duplex when there is no link. So
explicitly set half duplex and unknown speed.
Acked-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Use led_setX to determine number of LEDs per port. Introduce macros to
calculate register value and shift for particular LED in a particular
set.
Problem with previous implementation is that it uses is10G status to
determine leds per port. However with usxgmii, driver sets 10g, 5g and
2.5g so even though there are only 2 leds per port it selects 4 leds per
port
This implementation relies on configured led_set node.
Acked-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Before driver code
- enabled egress filter for cpu and non-cpu ports
- enabled ingress filter for non-cpu ports
This patch explicitly enables ingress and egress filtering for non-cpu
ports and disables ingress and egress filtering for cpu port.
Acked-by: Simon Wunderlich <sw@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
The upper 16 bits of the 32 bit value encode the SoC model in BCD
notation (for example 0x83806800 on a Netgear GS108Tv3 with an
RTL8380M), so it makes more sense to output the value in hex notation
than in decimal notation.
Signed-off-by: Pascal Ernster <git@hardfalcon.net>
The MAC embedded in rtl93xx switch SoCs needs different mac mode bits set
to support 10BaseT and 100BaseT link modes. Set them accordingly.
This change has been tested on a ZyXEL XGS1250-12.
Signed-off-by: Tobias Schramm <tobias@t-sys.eu>
Fix Spanning Tree Protocol (STP) by changing COPY2CPU which currently
makes switch to ignore Bridge Protocol Data Units (BPDUs).
Tested on Zyxel GS1900-8, 24 and 48.
Signed-off-by: Rudolf Vesely <i@rudolfvesely.com>
[ improve commit description and add new line in different sections ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The USXGMII implementation of Realtek switches can not only support
10GbE but also 2.5Gb and 5Gb on top of the usual data rates.
Mark those as supported to allow them to be negotiated.
This change has been tested on a ZyXEL XGS1250-12 with the following link
partners:
- NWA50AX Pro (2.5Gb)
- RTL8152 USB NIC (2.5Gb)
- AQC111 USB NIC (2.5Gb & 5Gb)
Gbit and 10GbE has also been tested to still work fine with a variety of
devices.
Signed-off-by: Tobias Schramm <tobias@t-sys.eu>
This condition was introduced in commit 51c8f76612 ("realtek: Improve
MAC config handling for all SoCs") to correctly report the speed of the
internal serdes ports as 10G, but instead makes all ports read 10G
because the or-operator should have been an and-operator.
Fixes: #9953
Fixes: 51c8f76612 ("realtek: Improve MAC config handling for all SoCs")
Signed-off-by: Peter Körner <git@mazdermind.de>
[ wrap comment to 72 column and improve commit ref ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
To improve code readability in drivers/net/phy/rtl83xx-phy.c, replace
constants MMD_AN and MMD_VEND2 from drivers/net/phy/rtl83xx-phy.h with
MDIO_MMD_AN and MDIO_MMD_VEND2 from <linux/mdio.h>.
Also, replace
BIT(0) with MDIO_EEE_2_5GT,
BIT(1) with MDIO_EEE_100TX,
BIT(2) with MDIO_EEE_1000T,
BIT(9) with MDIO_AN_CTRL1_RESTART,
BIT(12) with MDIO_AN_CTRL1_ENABLE,
32 with MDIO_AN_10GBT_CTRL,
60 with MDIO_AN_EEE_ADV, and
62 with MDIO_AN_EEE_ADV2
from <linux/mdio.h>.
Suggested-by: DENG Qingfang <dqfext@gmail.com>
Signed-off-by: Pascal Ernster <git@hardfalcon.net>
Replace BIT(x) and numerical values in drivers/net/phy/rtl83xx-phy.c
with constants from <linux/mii.h> to improve code readability.
To make reviewing easier, this commit only addresses ADVERTISE_* and
MII_PHYSID* constants.
Signed-off-by: Pascal Ernster <git@hardfalcon.net>
Replace numerical values, BIT(x) and (1 << x) in
drivers/net/phy/rtl83xx-phy.c with constants from <linux/mii.h> to
improve code readability.
To make reviewing easier, this commit only addresses MII_BMCR and BMCR_*
constants.
Suggested-by: DENG Qingfang <dqfext@gmail.com>
Signed-off-by: Pascal Ernster <git@hardfalcon.net>
One is never to write to dev->addr directly. In 6.1 it will be a const and
with the newly enabled WERROR, we get a failing grade.
Lets fix this ahead of time.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
We are missing a bunch of headers, which trigger errors on 6.1, probably
due to changed header-in-header dependencies. Best add them now.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Replace fallthrough comment with fallthrough macro for rtl838x ethernet
driver.
Fix compilarion warning:
drivers/net/ethernet/rtl838x_eth.c: In function 'rtl930x_mdio_reset':
drivers/net/ethernet/rtl838x_eth.c:1959:43: error: this statement may fall through [-Werror=implicit-fallthrough=]
1959 | private_poll_mask |= BIT(i);
drivers/net/ethernet/rtl838x_eth.c:1961:17: note: here
1961 | case PHY_INTERFACE_MODE_USXGMII:
| ^~~~
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Fix uninizialized variable in rtl83xx qos driver
Fix compilation error:
drivers/net/dsa/rtl83xx/qos.c: In function 'rtl838x_setup_prio2queue_matrix':
drivers/net/dsa/rtl83xx/qos.c:298:19: error: 'v' is used uninitialized [-Werror=uninitialized]
298 | v |= i << (min_queues[i] * 3);
| ~~^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/net/dsa/rtl83xx/qos.c:294:13: note: 'v' was declared here
294 | u32 v;
| ^
drivers/net/dsa/rtl83xx/qos.c: In function 'rtl83xx_setup_prio2queue_cpu_matrix':
drivers/net/dsa/rtl83xx/qos.c:320:19: error: 'v' is used uninitialized [-Werror=uninitialized]
320 | v |= max_queues[i] << (i * 3);
| ~~^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/net/dsa/rtl83xx/qos.c:316:13: note: 'v' was declared here
316 | u32 v;
| ^
cc1: all warnings being treated as errors
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Comment unused part of realtek phy driver.
Fix compilation warning:
drivers/net/phy/rtl83xx-phy.c: In function 'rtl8380_configure_int_rtl8218b':
drivers/net/phy/rtl83xx-phy.c:747:21: error: unused variable 'ipd_flag' [-Werror=unused-variable]
747 | int ipd_flag = 1;
| ^~~~~~~~
drivers/net/phy/rtl83xx-phy.c: At top level:
drivers/net/phy/rtl83xx-phy.c:3333:13: error: 'rtl931x_sds_disable' defined but not used [-Werror=unused-function]
3333 | static void rtl931x_sds_disable(u32 sds)
| ^~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
Comment unused part of realtek dsa driver.
Fix compilation warning:
drivers/net/dsa/rtl83xx/common.c: In function 'rtl83xx_fib_event':
drivers/net/dsa/rtl83xx/common.c:1430:58: error: unused variable 'fen6_info' [-Werror=unused-variable]
1430 | struct fib6_entry_notifier_info *fen6_info = ptr;
| ^~~~~~~~~
drivers/net/dsa/rtl83xx/common.c: At top level:
drivers/net/dsa/rtl83xx/common.c:531:12: error: 'rtl83xx_octet_cntr_alloc' defined but not used [-Werror=unused-function]
531 | static int rtl83xx_octet_cntr_alloc(struct rtl838x_switch_priv *priv)
| ^~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
Drop unused priv in realtek dsa driver.
Fix compilation warning:
drivers/net/dsa/rtl83xx/dsa.c: In function 'rtl83xx_port_lag_change':
drivers/net/dsa/rtl83xx/dsa.c:2016:37: error: unused variable 'priv' [-Werror=unused-variable]
2016 | struct rtl838x_switch_priv *priv = ds->priv;
| ^~~~
cc1: all warnings being treated as errors
Comment rtl838x_pie_rule_dump in realtek dsa driver for rtl83xx
Fix compilation warning:
drivers/net/dsa/rtl83xx/rtl838x.c:1294:13: error: 'rtl838x_pie_rule_dump' defined but not used [-Werror=unused-function]
1294 | static void rtl838x_pie_rule_dump(struct pie_rule *pr)
| ^~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
Comment multiple function in realtek dsa driver for rtl930x
Fix compilation warning:
drivers/net/dsa/rtl83xx/rtl930x.c:1463:12: error: 'rtl930x_l3_intf_add' defined but not used [-Werror=unused-function]
1463 | static int rtl930x_l3_intf_add(struct rtl838x_switch_priv *priv, struct rtl838x_l3_intf *intf)
| ^~~~~~~~~~~~~~~~~~~
drivers/net/dsa/rtl83xx/rtl930x.c:1414:12: error: 'rtl930x_l3_mtu_del' defined but not used [-Werror=unused-function]
1414 | static int rtl930x_l3_mtu_del(struct rtl838x_switch_priv *priv, int mtu)
| ^~~~~~~~~~~~~~~~~~
drivers/net/dsa/rtl83xx/rtl930x.c:995:12: error: 'rtl930x_l3_hash6' defined but not used [-Werror=unused-function]
995 | static u32 rtl930x_l3_hash6(struct in6_addr *ip6, int algorithm, bool move_dip)
| ^~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
drivers/net/dsa/rtl83xx/rtl930x.c:1690:13: error: 'rtl930x_read_pie_fixed_fields' defined but not used [-Werror=unused-function]
1690 | static void rtl930x_read_pie_fixed_fields(u32 r[], struct pie_rule *pr)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/net/dsa/rtl83xx/rtl930x.c:1432:12: error: 'rtl930x_l3_mtu_add' defined but not used [-Werror=unused-function]
1432 | static int rtl930x_l3_mtu_add(struct rtl838x_switch_priv *priv, int mtu)
| ^~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
Comment rtl931x_read_pie_fixed_fields in realtek dsa driver for rtl931x
Fix compilation warning:
drivers/net/dsa/rtl83xx/rtl931x.c:1116:13: error: 'rtl931x_read_pie_fixed_fields' defined but not used [-Werror=unused-function]
1116 | static void rtl931x_read_pie_fixed_fields(u32 r[], struct pie_rule *pr)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
Comment rtl93xx_header_vlan_set in realtek ethernet driver for rtl838x
Fix compilation warning:
drivers/net/ethernet/rtl838x_eth.c: At top level:
drivers/net/ethernet/rtl838x_eth.c:164:13: error: 'rtl93xx_header_vlan_set' defined but not used [-Werror=unused-function]
164 | static void rtl93xx_header_vlan_set(struct p_hdr *h, int vlan)
| ^~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
All callers of the rtl83xx_mc_group_* functions already do the same
check, so these aren't needed.
For rtl83xx_mc_group_alloc, this branch also incorrectly returned 0
instead of a negative value. If the branch wasn't effectively dead code
anyway, this could potentially have caused bugs, as 0 is a valid
multicast group entry index.
Fixes: cde31976e3 ("realtek: Add support for Layer 2 Multicast")
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
The current implementation only works when store and load are called for
the same port without any other calls in between. This is because the
store function only saves a single port number instead of a portmask for
each group. It also doesn't take into account that the allocation of
multicast group entries might change between store/load calls.
As a result, the multicast port mask table gets corrupted. This also
includes the reserved entry for unknown multicast, which gets corrupted
even when no other mdb entries have been added.
Remove the code for storing/loading multicast groups entirely, as the
original commit message doesn't offer a convincing reason why this would
be necessary in the first place.
Fixes: 724e4af530 ("realtek: Store and Restore MC memberships for port enable/disable")
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
There shouldn't be any reason to forward all multicast to the CPU. The
original commit message also doesn't provide a reason for this seemingly
unrelated change.
The current implementation of the delete method is also broken, as it
entirely removes any entry when the portmask contains only the CPU port,
even if it was explicitly created.
Fixes: 724e4af530 ("realtek: Store and Restore MC memberships for port enable/disable")
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
There doesn't appear to be a reason to do this, as only the last entry
is actually reserved for unknown multicast.
This also fixes two issues:
- As the increment happened after the bounds check, the value of the
actually reserved last entry could be overwritten.
- On deletion of entries, a corresponding decrement was missing,
causing the wrong entry to be marked as free.
Fixes: cde31976e3 ("realtek: Add support for Layer 2 Multicast")
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Actually use the index returned by rtl83xx_find_l2_cam_entry.
Fixes: cde31976e3 ("realtek: Add support for Layer 2 Multicast")
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
The port_vlan_add method may be called while a port is already a member
of that VLAN, so it needs to be able to handle changed flags. Fix it to
properly handle when the PVID or UNTAGGED flag was previously set, but
now no longer is.
To reduce duplication, move PVID configuration to a separate function.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
The registers L2_PORT_STATIC_MV_ACT seem to specify the action to take
when the source address of a packet exists as a static fdb entry on
another port. By default the configured action is to drop such packets.
For standalone ports, this behaviour is undesired, as all traffic should
be forwarded to the CPU. So change the action to forward on standalone
ports.
A situation where this issue can occur is when a non-offloaded bond
interface is part of a bridge. In that case, the CPU port will have fdb
entries for devices connected to the bond interface, which are managed
by the assisted learning feature.
For now, this is only implemented for RTL838x/RTL839x, as the available
set of registers differs for the other devices.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
All ports are disabled by default, so configure the port isolation masks
and the pm field accordingly in the setup function. When port_enable is
called for a port, the isolation masks will be set up so that traffic
can flow between the port and the CPU.
While at it, change the code to also use the traffic_set method in
rtl83xx_setup, instead of writing to the RTL838x_PORT_ISO_CTRL(i)
registers directly.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Correctly update the isolation mask of the port being configured. The
port_bitmap variable should contain all other bridge members and needs
to be actually removed from the isolation mask instead of added to it.
Also actually remove the port being configured from the pm field of the
other ports, so that any other ports that are currently disabled will be
configured correctly when they are enabled.
Fixes: df8e6be59a ("rtl838x: add new architecture")
[fixed updating pm field of other ports]
Fixes: 2b88563ee5 ("realtek: update the tree to the latest refactored version")
[reintroduced incorrect pm field update]
Fixes: 27029277f9 ("realtek: add switch driver support for the RTL93XX based switches")
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
The net_event_work struct is allocated, but only freed in a single case.
Move the allocation to the branch where it is actually needed, and free
it after the work has been done.
Fixes: 03e1d93e07 ("realtek: add driver support for routing offload")
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Use generic earlycon on Linux Kernel instead of initialization in platform
setup.
And also, drop bootargs with console= parameter from I-O DATA BSH-G24MB. It
uses 115200bps as baud-rate, the same as default in rtl838x.dtsi.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Before calling sched_clock_register(), the timer used to drive the
scheduling clock should already be enabled. Otherwise the kernel log
will show strange time jumps during, and the watchdog might not be
pinged in a timely fashion, resulting in reboots.
[ 0.160281] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[ 78.104319] clocksource: Switched to clocksource realtek_otto_timer
Fixes: 3cc8011171 ("realtek: resurrect timer driver")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Because this comment is followed by another comment, nothing luckily
breaks, so only a cosmetic change.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
