Commit Graph

6 Commits

Author SHA1 Message Date
Daniel Golle
27be0f8565 mediatek: filogic: openwrt_one: let U-Boot set LAN MAC address
Instead of reading it from flash directly, let U-Boot assign the LAN
MAC address. Set label-mac-device while at it and sort aliases in DT
alphabetically.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2024-09-19 20:33:53 +01:00
John Crispin
ee798653f3 mediatek: fix OpenWrt One NAND size
The final version of the PCB has 256MB NAND instead of 128MB.

Signed-off-by: John Crispin <john@phrozen.org>
2024-09-10 17:23:04 +02:00
John Crispin
f5c42670d2 mediatek: fix OpenWrt One MACs
* Ignore the MACs passed by the bootloader.
* fix nvmem-cell-cells warning
* fix the node names
* add dbdc wifi MACs

Signed-off-by: John Crispin <john@phrozen.org>
2024-09-10 17:23:04 +02:00
John Crispin
dd58ad968a mediatek/filogic: add OpenWrt One support
Specification:
 - MT7981 CPU using 2.4GHz and 5GHz WiFi (both AX)
 - 1GB RAM
 - 16MB NOR
 - 128MB NAND
 - 3 LEDs (red, green, blue, white)
 - 2 buttons (reset, user defined)
 - 1 2.5Gbit WAN port (Airoha EN8811h)
 - 1 1Gbit LAN ports
 - 1 single lane M.2 SSD slot
 - 1 mikroBus socket
 - externel HW WDT (25s refresh time)
 - i2c RTC (with battery backup)

Serial Interface
 - UBS-C CDC-ACM
 - 3 Pins GND, RX, TX
 - Settings: 115200, 8N1

MAC addresses are not populated on the early samples.

Signed-off-by: John Crispin <john@phrozen.org>
2024-05-21 11:35:38 +02:00
John Crispin
47d308a46c Revert "mediatek/filogic: add OpenWrt One support"
This reverts commit 797904b3cb.

There is a stray line in the commit description

Signed-off-by: John Crispin <john@phrozen.org>
2024-05-21 11:35:28 +02:00
John Crispin
797904b3cb mediatek/filogic: add OpenWrt One support
filogic: Add support for D-Link AQUILA PRO AI M30

Specification:
 - MT7981 CPU using 2.4GHz and 5GHz WiFi (both AX)
 - 1GB RAM
 - 16MB NOR
 - 128MB NAND
 - 3 LEDs (red, green, blue, white)
 - 2 buttons (reset, user defined)
 - 1 2.5Gbit WAN port (Airoha EN8811h)
 - 1 1Gbit LAN ports
 - 1 single lane M.2 SSD slot
 - 1 mikroBus socket
 - externel HW WDT (25s refresh time)
 - i2c RTC (with battery backup)

Serial Interface
 - UBS-C CDC-ACM
 - 3 Pins GND, RX, TX
 - Settings: 115200, 8N1

MAC addresses are not populated on the early samples.

Signed-off-by: John Crispin <john@phrozen.org>
2024-05-21 10:40:20 +02:00