Do not parse /tmp/sysinfo/board_name, /proc/cpuinfo or the device tree
compatible string directly. Always use the board_name function to get
the board name.
The admswconfig package still reads /proc/cpuinfo directly. The code
looks somehow broken and the whole adm5120 which uses this package
looks unmaintained. Leave it as it is for now.
Signed-off-by: Mathias Kresin <dev@kresin.me>
It's needed for macaddr_add.
Fixes: 50efd403e6 ("bcm53xx: set WAN MAC address to don't share one with LAN interface")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
After analyzing numerous NVRAMs and vendor firmwares it seems the base
MAC address is used for LAN interface. WAN interface has different one
which sometimes is set directly in NVRAM and sometines needs to be
calculated.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
We override default Ethernet interface with eth0 which often uses random
MAC due to missing proper NVRAM entry. Fix this by manually assigning
MAC in the config.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Replace former uci-defaults.sh implementation with the uci-defaults-new.sh one
and update all users accordingly.
Signed-off-by: Jo-Philipp Wich <jow@openwrt.org>
SVN-Revision: 47867
This removes calls to ucidef_set_interfaces_lan_wan() and
ucidef_set_interfaces_lan() on boards where all relevant info can be
inferred from the switch definition.
Signed-off-by: Jo-Philipp Wich <jow@openwrt.org>
SVN-Revision: 47722
This changes uci-defaults-new.sh, config_generate and all relevant board.d
files in order combine ucidef_add_switch() and ucidef_add_switch_ports() into
a single function.
Also removes now superfluous enable and reset arguments.
Signed-off-by: Jo-Philipp Wich <jow@openwrt.org>
SVN-Revision: 47721
According to the info from NVRAM we should use port 8 for the CPU (and
interface eth2). Unfortunately it doesn't work right now, so lets switch
to the port 5.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Forwardport of r46586 from 15.05
SVN-Revision: 47281
This device seems to have switch port 7 connected to the CPU:
vlan1ports=1 2 3 5 7*
vlan2ports=0 7u
it should be handled by eth1 and NVRAM seems to confirm that (no
et0macaddr entry, existing et1macaddr & et1phyaddr entries).
One of the remaining ports (4/8?) may be connected to the Quantenna SoC.
Original firmware boot log contains following messages:
(0x00,0x5d)Port 5 States Override: 0xfb
(0x00,0x5f)Port 7 States Override: 0xfb
(0x00,0x0e)Port 8 States Override: 0x0a
(why does it force port 5 state?!)
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 45692
It has 3 Ethernet interfaces, each of them connected to separated switch
port. Default NVRAM uses switch port 8 as CPU which is connected to the
3rd interface (eth2).
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 45681
