mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-24 07:46:48 +00:00
lantiq: Backport upstream pinctrl-xway patches from 4.5
Upstream commit be14811c03cf2 "pinctrl/lantiq: introduce new dedicated devicetree bindings" allows us to use each pin in the pinmux. This is useful for example in the "spi" group which contains some pins which are inputs, and some which are outputs. These can only be used once the new compatible strings for the pinctrl node are used. Additionally 0150-lantiq-pinctrl-xway.patch and the "GPIO PORT3 fix" (which was part of 0012-pinctrl-lantiq-fix-up-pinmux.patch) were replaced with their upstream variants which are also in 4.5. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48283
This commit is contained in:
parent
95699dd312
commit
ee03fc430d
@ -39,18 +39,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
static const struct ltq_cfg_param xway_cfg_params[] = {
|
||||
{"lantiq,pull", LTQ_PINCONF_PARAM_PULL},
|
||||
{"lantiq,open-drain", LTQ_PINCONF_PARAM_OPEN_DRAIN},
|
||||
@@ -676,6 +683,10 @@ static int xway_gpio_dir_out(struct gpio
|
||||
{
|
||||
struct ltq_pinmux_info *info = dev_get_drvdata(chip->dev);
|
||||
|
||||
+ if (PORT(pin) == PORT3)
|
||||
+ gpio_setbit(info->membase[0], GPIO3_OD, PORT_PIN(pin));
|
||||
+ else
|
||||
+ gpio_setbit(info->membase[0], GPIO_OD(pin), PORT_PIN(pin));
|
||||
gpio_setbit(info->membase[0], GPIO_DIR(pin), PORT_PIN(pin));
|
||||
xway_gpio_set(chip, pin, val);
|
||||
|
||||
@@ -696,6 +707,18 @@ static void xway_gpio_free(struct gpio_c
|
||||
@@ -696,6 +703,18 @@ static void xway_gpio_free(struct gpio_c
|
||||
pinctrl_free_gpio(gpio);
|
||||
}
|
||||
|
||||
@ -69,7 +58,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
static struct gpio_chip xway_chip = {
|
||||
.label = "gpio-xway",
|
||||
.direction_input = xway_gpio_dir_in,
|
||||
@@ -704,6 +727,7 @@ static struct gpio_chip xway_chip = {
|
||||
@@ -704,6 +723,7 @@ static struct gpio_chip xway_chip = {
|
||||
.set = xway_gpio_set,
|
||||
.request = xway_gpio_req,
|
||||
.free = xway_gpio_free,
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,28 @@
|
||||
From 57b588c950b7e04e0f22393ad439299ba4fda9c3 Mon Sep 17 00:00:00 2001
|
||||
From: John Crispin <blogic@openwrt.org>
|
||||
Date: Thu, 26 Nov 2015 11:00:09 +0100
|
||||
Subject: [PATCH] pinctrl/lantiq: Fix GPIO Setup of GPIO Port3
|
||||
|
||||
Some special handling of GPIO Port 3 is needed because of
|
||||
some hardware thingofabob.
|
||||
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
Signed-off-by: Martin Schiller <mschiller@tdt.de>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
---
|
||||
drivers/pinctrl/pinctrl-xway.c | 4 ++++
|
||||
1 file changed, 4 insertions(+)
|
||||
|
||||
--- a/drivers/pinctrl/pinctrl-xway.c
|
||||
+++ b/drivers/pinctrl/pinctrl-xway.c
|
||||
@@ -1570,6 +1570,10 @@ static int xway_gpio_dir_out(struct gpio
|
||||
{
|
||||
struct ltq_pinmux_info *info = dev_get_drvdata(chip->dev);
|
||||
|
||||
+ if (PORT(pin) == PORT3)
|
||||
+ gpio_setbit(info->membase[0], GPIO3_OD, PORT_PIN(pin));
|
||||
+ else
|
||||
+ gpio_setbit(info->membase[0], GPIO_OD(pin), PORT_PIN(pin));
|
||||
gpio_setbit(info->membase[0], GPIO_DIR(pin), PORT_PIN(pin));
|
||||
xway_gpio_set(chip, pin, val);
|
||||
|
@ -0,0 +1,28 @@
|
||||
From c9f294ff6584782d20b4a766901a9cff7398bb20 Mon Sep 17 00:00:00 2001
|
||||
From: John Crispin <blogic@openwrt.org>
|
||||
Date: Mon, 4 Jan 2016 22:27:57 +0100
|
||||
Subject: [PATCH] pinctrl: lantiq: 2 pins have the wrong mux list
|
||||
|
||||
The latest vendor SDK contained this patch.
|
||||
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
---
|
||||
drivers/pinctrl/pinctrl-xway.c | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/drivers/pinctrl/pinctrl-xway.c
|
||||
+++ b/drivers/pinctrl/pinctrl-xway.c
|
||||
@@ -160,10 +160,10 @@ static const struct ltq_mfp_pin xway_mfp
|
||||
MFP_XWAY(GPIO41, GPIO, NONE, NONE, NONE),
|
||||
MFP_XWAY(GPIO42, GPIO, MDIO, NONE, NONE),
|
||||
MFP_XWAY(GPIO43, GPIO, MDIO, NONE, NONE),
|
||||
- MFP_XWAY(GPIO44, GPIO, NONE, SIN, GPHY),
|
||||
+ MFP_XWAY(GPIO44, GPIO, MII, SIN, GPHY),
|
||||
MFP_XWAY(GPIO45, GPIO, NONE, GPHY, SIN),
|
||||
MFP_XWAY(GPIO46, GPIO, NONE, NONE, EXIN),
|
||||
- MFP_XWAY(GPIO47, GPIO, NONE, GPHY, SIN),
|
||||
+ MFP_XWAY(GPIO47, GPIO, MII, GPHY, SIN),
|
||||
MFP_XWAY(GPIO48, GPIO, EBU, NONE, NONE),
|
||||
MFP_XWAY(GPIO49, GPIO, EBU, NONE, NONE),
|
||||
MFP_XWAY(GPIO50, GPIO, NONE, NONE, NONE),
|
@ -1,15 +0,0 @@
|
||||
--- a/drivers/pinctrl/pinctrl-xway.c
|
||||
+++ b/drivers/pinctrl/pinctrl-xway.c
|
||||
@@ -152,10 +152,10 @@ static const struct ltq_mfp_pin xway_mfp
|
||||
MFP_XWAY(GPIO41, GPIO, NONE, NONE, NONE),
|
||||
MFP_XWAY(GPIO42, GPIO, MDIO, NONE, NONE),
|
||||
MFP_XWAY(GPIO43, GPIO, MDIO, NONE, NONE),
|
||||
- MFP_XWAY(GPIO44, GPIO, NONE, GPHY, SIN),
|
||||
+ MFP_XWAY(GPIO44, GPIO, MII, SIN, GPHY),
|
||||
MFP_XWAY(GPIO45, GPIO, NONE, GPHY, SIN),
|
||||
MFP_XWAY(GPIO46, GPIO, NONE, NONE, EXIN),
|
||||
- MFP_XWAY(GPIO47, GPIO, NONE, GPHY, SIN),
|
||||
+ MFP_XWAY(GPIO47, GPIO, MII, GPHY, SIN),
|
||||
MFP_XWAY(GPIO48, GPIO, EBU, NONE, NONE),
|
||||
MFP_XWAY(GPIO49, GPIO, EBU, NONE, NONE),
|
||||
MFP_XWAY(GPIO50, GPIO, NONE, NONE, NONE),
|
Loading…
Reference in New Issue
Block a user