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danube to ifxmips transition

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SVN-Revision: 9825
This commit is contained in:
John Crispin 2007-12-22 13:55:14 +00:00
parent 4da7f2dbed
commit ede7545200
26 changed files with 546 additions and 552 deletions
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16
target/linux/ifxmips/files/arch/mips/danube/Kconfig
View File

@ -1,35 +1,35 @@
# copyright 2007 john crispin <blogic@openwrt.org> # copyright 2007 john crispin <blogic@openwrt.org>
menu "Danube built-in" menu "IFXMips built-in"
config IFXMIPS_ASC_UART config IFXMIPS_ASC_UART
bool "Danube asc uart" bool "IFXMips asc uart"
select SERIAL_CORE select SERIAL_CORE
select SERIAL_CORE_CONSOLE select SERIAL_CORE_CONSOLE
default y default y
config MTD_IFXMIPS config MTD_IFXMIPS
bool "Danube flash map" bool "IFXMips flash map"
default y default y
config IFXMIPS_WDT config IFXMIPS_WDT
bool "Danube watchdog" bool "IFXMips watchdog"
default y default y
config IFXMIPS_LED config IFXMIPS_LED
bool "Danube led" bool "IFXMips led"
default y default y
config IFXMIPS_GPIO config IFXMIPS_GPIO
bool "Danube gpio" bool "IFXMips gpio"
default y default y
config IFXMIPS_SSC config IFXMIPS_SSC
bool "Danube ssc" bool "IFXMips ssc"
default y default y
config IFXMIPS_EEPROM config IFXMIPS_EEPROM
bool "Danube eeprom" bool "IFXMips eeprom"
default y default y
endmenu endmenu

6
target/linux/ifxmips/files/arch/mips/danube/Makefile
View File

@ -1,9 +1,3 @@
#
# Copyright 2007 openwrt.org
# John Crispin <blogic@openwrt.org>
#
# Makefile for Infineon Danube
#
obj-y := reset.o prom.o setup.o interrupt.o dma-core.o pmu.o obj-y := reset.o prom.o setup.o interrupt.o dma-core.o pmu.o
obj-$(CONFIG_PCI) += pci.o obj-$(CONFIG_PCI) += pci.o

60
target/linux/ifxmips/files/arch/mips/danube/dma-core.c
View File

@ -19,10 +19,10 @@
#include <linux/errno.h> #include <linux/errno.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
#include <asm/danube/danube_irq.h> #include <asm/ifxmips/ifxmips_irq.h>
#include <asm/danube/danube_dma.h> #include <asm/ifxmips/ifxmips_dma.h>
#include <asm/danube/danube_pmu.h> #include <asm/ifxmips/ifxmips_pmu.h>
/*25 descriptors for each dma channel,4096/8/20=25.xx*/ /*25 descriptors for each dma channel,4096/8/20=25.xx*/
#define IFXMIPS_DMA_DESCRIPTOR_OFFSET 25 #define IFXMIPS_DMA_DESCRIPTOR_OFFSET 25
@ -32,9 +32,9 @@
#define DMA_INT_BUDGET 100 /*budget for interrupt handling */ #define DMA_INT_BUDGET 100 /*budget for interrupt handling */
#define DMA_POLL_COUNTER 4 /*fix me, set the correct counter value here! */ #define DMA_POLL_COUNTER 4 /*fix me, set the correct counter value here! */
extern void mask_and_ack_danube_irq (unsigned int irq_nr); extern void mask_and_ack_ifxmips_irq (unsigned int irq_nr);
extern void enable_danube_irq (unsigned int irq_nr); extern void enable_ifxmips_irq (unsigned int irq_nr);
extern void disable_danube_irq (unsigned int irq_nr); extern void disable_ifxmips_irq (unsigned int irq_nr);
u64 *g_desc_list; u64 *g_desc_list;
_dma_device_info dma_devs[MAX_DMA_DEVICE_NUM]; _dma_device_info dma_devs[MAX_DMA_DEVICE_NUM];
@ -67,8 +67,8 @@ _dma_chan_map default_dma_map[MAX_DMA_CHANNEL_NUM] = {
}; };
_dma_chan_map *chan_map = default_dma_map; _dma_chan_map *chan_map = default_dma_map;
volatile u32 g_danube_dma_int_status = 0; volatile u32 g_ifxmips_dma_int_status = 0;
volatile int g_danube_dma_in_process = 0;/*0=not in process,1=in process*/ volatile int g_ifxmips_dma_in_process = 0;/*0=not in process,1=in process*/
void do_dma_tasklet (unsigned long); void do_dma_tasklet (unsigned long);
DECLARE_TASKLET (dma_tasklet, do_dma_tasklet, 0); DECLARE_TASKLET (dma_tasklet, do_dma_tasklet, 0);
@ -101,7 +101,7 @@ enable_ch_irq (_dma_channel_info *pCh)
writel(0x4a, IFXMIPS_DMA_CIE); writel(0x4a, IFXMIPS_DMA_CIE);
writel(readl(IFXMIPS_DMA_IRNEN) | (1 << chan_no), IFXMIPS_DMA_IRNEN); writel(readl(IFXMIPS_DMA_IRNEN) | (1 << chan_no), IFXMIPS_DMA_IRNEN);
local_irq_restore(flag); local_irq_restore(flag);
enable_danube_irq(pCh->irq); enable_ifxmips_irq(pCh->irq);
} }
void void
@ -111,12 +111,12 @@ disable_ch_irq (_dma_channel_info *pCh)
int chan_no = (int) (pCh - dma_chan); int chan_no = (int) (pCh - dma_chan);
local_irq_save(flag); local_irq_save(flag);
g_danube_dma_int_status &= ~(1 << chan_no); g_ifxmips_dma_int_status &= ~(1 << chan_no);
writel(chan_no, IFXMIPS_DMA_CS); writel(chan_no, IFXMIPS_DMA_CS);
writel(0, IFXMIPS_DMA_CIE); writel(0, IFXMIPS_DMA_CIE);
writel(readl(IFXMIPS_DMA_IRNEN) & ~(1 << chan_no), IFXMIPS_DMA_IRNEN); writel(readl(IFXMIPS_DMA_IRNEN) & ~(1 << chan_no), IFXMIPS_DMA_IRNEN);
local_irq_restore(flag); local_irq_restore(flag);
mask_and_ack_danube_irq(pCh->irq); mask_and_ack_ifxmips_irq(pCh->irq);
} }
void void
@ -180,9 +180,9 @@ rx_chan_intr_handler (int chan_no)
writel(chan_no, IFXMIPS_DMA_CS); writel(chan_no, IFXMIPS_DMA_CS);
writel(readl(IFXMIPS_DMA_CIS) | 0x7e, IFXMIPS_DMA_CIS); writel(readl(IFXMIPS_DMA_CIS) | 0x7e, IFXMIPS_DMA_CIS);
writel(tmp, IFXMIPS_DMA_CS); writel(tmp, IFXMIPS_DMA_CS);
g_danube_dma_int_status &= ~(1 << chan_no); g_ifxmips_dma_int_status &= ~(1 << chan_no);
local_irq_restore(flag); local_irq_restore(flag);
enable_danube_irq(dma_chan[chan_no].irq); enable_ifxmips_irq(dma_chan[chan_no].irq);
} }
} }
@ -199,7 +199,7 @@ tx_chan_intr_handler (int chan_no)
writel(chan_no, IFXMIPS_DMA_CS); writel(chan_no, IFXMIPS_DMA_CS);
writel(readl(IFXMIPS_DMA_CIS) | 0x7e, IFXMIPS_DMA_CIS); writel(readl(IFXMIPS_DMA_CIS) | 0x7e, IFXMIPS_DMA_CIS);
writel(tmp, IFXMIPS_DMA_CS); writel(tmp, IFXMIPS_DMA_CS);
g_danube_dma_int_status &= ~(1 << chan_no); g_ifxmips_dma_int_status &= ~(1 << chan_no);
local_irq_restore(flag); local_irq_restore(flag);
pDev->current_tx_chan = pCh->rel_chan_no; pDev->current_tx_chan = pCh->rel_chan_no;
if (pDev->intr_handler) if (pDev->intr_handler)
@ -215,7 +215,7 @@ do_dma_tasklet (unsigned long unused)
int weight = 0; int weight = 0;
int flag; int flag;
while (g_danube_dma_int_status) while (g_ifxmips_dma_int_status)
{ {
if (budget-- < 0) if (budget-- < 0)
{ {
@ -226,7 +226,7 @@ do_dma_tasklet (unsigned long unused)
weight = 0; weight = 0;
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++) for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++)
{ {
if ((g_danube_dma_int_status & (1 << i)) && dma_chan[i].weight > 0) if ((g_ifxmips_dma_int_status & (1 << i)) && dma_chan[i].weight > 0)
{ {
if (dma_chan[i].weight > weight) if (dma_chan[i].weight > weight)
{ {
@ -251,10 +251,10 @@ do_dma_tasklet (unsigned long unused)
} }
local_irq_save(flag); local_irq_save(flag);
g_danube_dma_in_process = 0; g_ifxmips_dma_in_process = 0;
if (g_danube_dma_int_status) if (g_ifxmips_dma_int_status)
{ {
g_danube_dma_in_process = 1; g_ifxmips_dma_in_process = 1;
tasklet_schedule(&dma_tasklet); tasklet_schedule(&dma_tasklet);
} }
local_irq_restore(flag); local_irq_restore(flag);
@ -274,13 +274,13 @@ dma_interrupt (int irq, void *dev_id)
tmp = readl(IFXMIPS_DMA_IRNEN); tmp = readl(IFXMIPS_DMA_IRNEN);
writel(0, IFXMIPS_DMA_IRNEN); writel(0, IFXMIPS_DMA_IRNEN);
g_danube_dma_int_status |= 1 << chan_no; g_ifxmips_dma_int_status |= 1 << chan_no;
writel(tmp, IFXMIPS_DMA_IRNEN); writel(tmp, IFXMIPS_DMA_IRNEN);
mask_and_ack_danube_irq(irq); mask_and_ack_ifxmips_irq(irq);
if (!g_danube_dma_in_process) if (!g_ifxmips_dma_in_process)
{ {
g_danube_dma_in_process = 1; g_ifxmips_dma_in_process = 1;
tasklet_schedule(&dma_tasklet); tasklet_schedule(&dma_tasklet);
} }
@ -387,7 +387,7 @@ dma_device_register(_dma_device_info *dev)
writel(readl(IFXMIPS_DMA_IRNEN) | (1 << chan_no), IFXMIPS_DMA_IRNEN); writel(readl(IFXMIPS_DMA_IRNEN) | (1 << chan_no), IFXMIPS_DMA_IRNEN);
writel(0x30000, IFXMIPS_DMA_CCTRL); writel(0x30000, IFXMIPS_DMA_CCTRL);
local_irq_restore(flag); local_irq_restore(flag);
enable_danube_irq(dma_chan[chan_no].irq); enable_ifxmips_irq(dma_chan[chan_no].irq);
} }
} }
} }
@ -438,10 +438,10 @@ dma_device_unregister (_dma_device_info *dev)
{ {
pCh = dev->rx_chan[i]; pCh = dev->rx_chan[i];
chan_no = (int)(dev->rx_chan[i] - dma_chan); chan_no = (int)(dev->rx_chan[i] - dma_chan);
disable_danube_irq(pCh->irq); disable_ifxmips_irq(pCh->irq);
local_irq_save(flag); local_irq_save(flag);
g_danube_dma_int_status &= ~(1 << chan_no); g_ifxmips_dma_int_status &= ~(1 << chan_no);
pCh->curr_desc = 0; pCh->curr_desc = 0;
pCh->prev_desc = 0; pCh->prev_desc = 0;
pCh->control = IFXMIPS_DMA_CH_OFF; pCh->control = IFXMIPS_DMA_CH_OFF;
@ -685,7 +685,7 @@ dma_chip_init(void)
int i; int i;
// enable DMA from PMU // enable DMA from PMU
danube_pmu_enable(IFXMIPS_PMU_PWDCR_DMA); ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
// reset DMA // reset DMA
writel(readl(IFXMIPS_DMA_CTRL) | 1, IFXMIPS_DMA_CTRL); writel(readl(IFXMIPS_DMA_CTRL) | 1, IFXMIPS_DMA_CTRL);
@ -704,7 +704,7 @@ dma_chip_init(void)
} }
int int
danube_dma_init (void) ifxmips_dma_init (void)
{ {
int i; int i;
@ -736,7 +736,7 @@ danube_dma_init (void)
return 0; return 0;
} }
arch_initcall(danube_dma_init); arch_initcall(ifxmips_dma_init);
void void
dma_cleanup(void) dma_cleanup(void)

76
target/linux/ifxmips/files/arch/mips/danube/interrupt.c
View File

@ -1,5 +1,5 @@
/* /*
* arch/mips/danube/interrupt.c * arch/mips/ifxmips/interrupt.c
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -17,7 +17,7 @@
* *
* Copyright (C) 2005 Wu Qi Ming infineon * Copyright (C) 2005 Wu Qi Ming infineon
* *
* Rewrite of Infineon Danube code, thanks to infineon for the support, * Rewrite of Infineon IFXMips code, thanks to infineon for the support,
* software and hardware * software and hardware
* *
* Copyright (C) 2007 John Crispin <blogic@openwrt.org> * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
@ -33,97 +33,97 @@
#include <asm/bootinfo.h> #include <asm/bootinfo.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
#include <asm/danube/danube_irq.h> #include <asm/ifxmips/ifxmips_irq.h>
#include <asm/irq_cpu.h> #include <asm/irq_cpu.h>
void void
disable_danube_irq (unsigned int irq_nr) disable_ifxmips_irq (unsigned int irq_nr)
{ {
int i; int i;
u32 *danube_ier = IFXMIPS_ICU_IM0_IER; u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER;
irq_nr -= INT_NUM_IRQ0; irq_nr -= INT_NUM_IRQ0;
for (i = 0; i <= 4; i++) for (i = 0; i <= 4; i++)
{ {
if (irq_nr < INT_NUM_IM_OFFSET){ if (irq_nr < INT_NUM_IM_OFFSET){
writel(readl(danube_ier) & ~(1 << irq_nr ), danube_ier); writel(readl(ifxmips_ier) & ~(1 << irq_nr ), ifxmips_ier);
return; return;
} }
danube_ier += IFXMIPS_ICU_OFFSET; ifxmips_ier += IFXMIPS_ICU_OFFSET;
irq_nr -= INT_NUM_IM_OFFSET; irq_nr -= INT_NUM_IM_OFFSET;
} }
} }
EXPORT_SYMBOL (disable_danube_irq); EXPORT_SYMBOL (disable_ifxmips_irq);
void void
mask_and_ack_danube_irq (unsigned int irq_nr) mask_and_ack_ifxmips_irq (unsigned int irq_nr)
{ {
int i; int i;
u32 *danube_ier = IFXMIPS_ICU_IM0_IER; u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER;
u32 *danube_isr = IFXMIPS_ICU_IM0_ISR; u32 *ifxmips_isr = IFXMIPS_ICU_IM0_ISR;
irq_nr -= INT_NUM_IRQ0; irq_nr -= INT_NUM_IRQ0;
for (i = 0; i <= 4; i++) for (i = 0; i <= 4; i++)
{ {
if (irq_nr < INT_NUM_IM_OFFSET) if (irq_nr < INT_NUM_IM_OFFSET)
{ {
writel(readl(danube_ier) & ~(1 << irq_nr ), danube_ier); writel(readl(ifxmips_ier) & ~(1 << irq_nr ), ifxmips_ier);
writel((1 << irq_nr ), danube_isr); writel((1 << irq_nr ), ifxmips_isr);
return; return;
} }
danube_ier += IFXMIPS_ICU_OFFSET; ifxmips_ier += IFXMIPS_ICU_OFFSET;
danube_isr += IFXMIPS_ICU_OFFSET; ifxmips_isr += IFXMIPS_ICU_OFFSET;
irq_nr -= INT_NUM_IM_OFFSET; irq_nr -= INT_NUM_IM_OFFSET;
} }
} }
EXPORT_SYMBOL (mask_and_ack_danube_irq); EXPORT_SYMBOL (mask_and_ack_ifxmips_irq);
void void
enable_danube_irq (unsigned int irq_nr) enable_ifxmips_irq (unsigned int irq_nr)
{ {
int i; int i;
u32 *danube_ier = IFXMIPS_ICU_IM0_IER; u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER;
irq_nr -= INT_NUM_IRQ0; irq_nr -= INT_NUM_IRQ0;
for (i = 0; i <= 4; i++) for (i = 0; i <= 4; i++)
{ {
if (irq_nr < INT_NUM_IM_OFFSET) if (irq_nr < INT_NUM_IM_OFFSET)
{ {
writel(readl(danube_ier) | (1 << irq_nr ), danube_ier); writel(readl(ifxmips_ier) | (1 << irq_nr ), ifxmips_ier);
return; return;
} }
danube_ier += IFXMIPS_ICU_OFFSET; ifxmips_ier += IFXMIPS_ICU_OFFSET;
irq_nr -= INT_NUM_IM_OFFSET; irq_nr -= INT_NUM_IM_OFFSET;
} }
} }
EXPORT_SYMBOL (enable_danube_irq); EXPORT_SYMBOL (enable_ifxmips_irq);
static unsigned int static unsigned int
startup_danube_irq (unsigned int irq) startup_ifxmips_irq (unsigned int irq)
{ {
enable_danube_irq (irq); enable_ifxmips_irq (irq);
return 0; return 0;
} }
static void static void
end_danube_irq (unsigned int irq) end_ifxmips_irq (unsigned int irq)
{ {
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
enable_danube_irq (irq); enable_ifxmips_irq (irq);
} }
static struct hw_interrupt_type danube_irq_type = { static struct hw_interrupt_type ifxmips_irq_type = {
"IFXMIPS", "IFXMIPS",
.startup = startup_danube_irq, .startup = startup_ifxmips_irq,
.enable = enable_danube_irq, .enable = enable_ifxmips_irq,
.disable = disable_danube_irq, .disable = disable_ifxmips_irq,
.unmask = enable_danube_irq, .unmask = enable_ifxmips_irq,
.ack = end_danube_irq, .ack = end_ifxmips_irq,
.mask = disable_danube_irq, .mask = disable_ifxmips_irq,
.mask_ack = mask_and_ack_danube_irq, .mask_ack = mask_and_ack_ifxmips_irq,
.end = end_danube_irq, .end = end_ifxmips_irq,
}; };
static inline int static inline int
@ -141,7 +141,7 @@ ls1bit32(unsigned long x)
} }
void void
danube_hw_irqdispatch (int module) ifxmips_hw_irqdispatch (int module)
{ {
u32 irq; u32 irq;
@ -171,7 +171,7 @@ plat_irq_dispatch (void)
{ {
if (pending & (CAUSEF_IP2 << i)) if (pending & (CAUSEF_IP2 << i))
{ {
danube_hw_irqdispatch(i); ifxmips_hw_irqdispatch(i);
goto out; goto out;
} }
} }
@ -212,7 +212,7 @@ arch_init_irq(void)
irq_desc[i].action = NULL; irq_desc[i].action = NULL;
irq_desc[i].depth = 1; irq_desc[i].depth = 1;
#endif #endif
set_irq_chip_and_handler(i, &danube_irq_type, handle_level_irq); set_irq_chip_and_handler(i, &ifxmips_irq_type, handle_level_irq);
} }
set_c0_status (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5); set_c0_status (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);

58
target/linux/ifxmips/files/arch/mips/danube/pci.c
View File

@ -4,8 +4,8 @@
#include <linux/init.h> #include <linux/init.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/mm.h> #include <linux/mm.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
#include <asm/danube/danube_irq.h> #include <asm/ifxmips/ifxmips_irq.h>
#include <asm/addrspace.h> #include <asm/addrspace.h>
#include <linux/vmalloc.h> #include <linux/vmalloc.h>
@ -21,12 +21,12 @@
#define PCI_ACCESS_READ 0 #define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1 #define PCI_ACCESS_WRITE 1
static int danube_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); static int ifxmips_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
static int danube_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); static int ifxmips_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
struct pci_ops danube_pci_ops = { struct pci_ops ifxmips_pci_ops = {
.read = danube_pci_read_config_dword, .read = ifxmips_pci_read_config_dword,
.write = danube_pci_write_config_dword .write = ifxmips_pci_write_config_dword
}; };
static struct resource pci_io_resource = { static struct resource pci_io_resource = {
@ -43,18 +43,18 @@ static struct resource pci_mem_resource = {
.flags = IORESOURCE_MEM .flags = IORESOURCE_MEM
}; };
static struct pci_controller danube_pci_controller = { static struct pci_controller ifxmips_pci_controller = {
.pci_ops = &danube_pci_ops, .pci_ops = &ifxmips_pci_ops,
.mem_resource = &pci_mem_resource, .mem_resource = &pci_mem_resource,
.mem_offset = 0x00000000UL, .mem_offset = 0x00000000UL,
.io_resource = &pci_io_resource, .io_resource = &pci_io_resource,
.io_offset = 0x00000000UL, .io_offset = 0x00000000UL,
}; };
static u32 danube_pci_mapped_cfg; static u32 ifxmips_pci_mapped_cfg;
static int static int
danube_pci_config_access(unsigned char access_type, ifxmips_pci_config_access(unsigned char access_type,
struct pci_bus *bus, unsigned int devfn, unsigned int where, u32 *data) struct pci_bus *bus, unsigned int devfn, unsigned int where, u32 *data)
{ {
unsigned long cfg_base; unsigned long cfg_base;
@ -62,15 +62,15 @@ danube_pci_config_access(unsigned char access_type,
u32 temp; u32 temp;
/* Danube support slot from 0 to 15 */ /* IFXMips support slot from 0 to 15 */
/* dev_fn 0&0x68 (AD29) is danube itself */ /* dev_fn 0&0x68 (AD29) is ifxmips itself */
if ((bus->number != 0) || ((devfn & 0xf8) > 0x78) if ((bus->number != 0) || ((devfn & 0xf8) > 0x78)
|| ((devfn & 0xf8) == 0) || ((devfn & 0xf8) == 0x68)) || ((devfn & 0xf8) == 0) || ((devfn & 0xf8) == 0x68))
return 1; return 1;
local_irq_save(flags); local_irq_save(flags);
cfg_base = danube_pci_mapped_cfg; cfg_base = ifxmips_pci_mapped_cfg;
cfg_base |= (bus->number << IFXMIPS_PCI_CFG_BUSNUM_SHF) | (devfn << cfg_base |= (bus->number << IFXMIPS_PCI_CFG_BUSNUM_SHF) | (devfn <<
IFXMIPS_PCI_CFG_FUNNUM_SHF) | (where & ~0x3); IFXMIPS_PCI_CFG_FUNNUM_SHF) | (where & ~0x3);
@ -91,12 +91,12 @@ danube_pci_config_access(unsigned char access_type,
wmb(); wmb();
/* clean possible Master abort */ /* clean possible Master abort */
cfg_base = (danube_pci_mapped_cfg | (0x0 << IFXMIPS_PCI_CFG_FUNNUM_SHF)) + 4; cfg_base = (ifxmips_pci_mapped_cfg | (0x0 << IFXMIPS_PCI_CFG_FUNNUM_SHF)) + 4;
temp = readl(((u32*)(cfg_base))); temp = readl(((u32*)(cfg_base)));
#ifdef CONFIG_IFXMIPS_PCI_HW_SWAP #ifdef CONFIG_IFXMIPS_PCI_HW_SWAP
temp = swab32 (temp); temp = swab32 (temp);
#endif #endif
cfg_base = (danube_pci_mapped_cfg | (0x68 << IFXMIPS_PCI_CFG_FUNNUM_SHF)) + 4; cfg_base = (ifxmips_pci_mapped_cfg | (0x68 << IFXMIPS_PCI_CFG_FUNNUM_SHF)) + 4;
writel(temp, ((u32*)cfg_base)); writel(temp, ((u32*)cfg_base));
local_irq_restore(flags); local_irq_restore(flags);
@ -107,12 +107,12 @@ danube_pci_config_access(unsigned char access_type,
return 0; return 0;
} }
static int danube_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, static int ifxmips_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val) int where, int size, u32 * val)
{ {
u32 data = 0; u32 data = 0;
if (danube_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) if (ifxmips_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
if (size == 1) if (size == 1)
@ -125,7 +125,7 @@ static int danube_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn,
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
} }
static int danube_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, static int ifxmips_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val) int where, int size, u32 val)
{ {
u32 data = 0; u32 data = 0;
@ -134,7 +134,7 @@ static int danube_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn
{ {
data = val; data = val;
} else { } else {
if (danube_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) if (ifxmips_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
if (size == 1) if (size == 1)
@ -145,7 +145,7 @@ static int danube_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn
(val << ((where & 3) << 3)); (val << ((where & 3) << 3));
} }
if (danube_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) if (ifxmips_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
return PCIBIOS_DEVICE_NOT_FOUND; return PCIBIOS_DEVICE_NOT_FOUND;
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
@ -178,8 +178,8 @@ int pcibios_plat_dev_init(struct pci_dev *dev){
return 0; return 0;
} }
static void __init danube_pci_startup (void){ static void __init ifxmips_pci_startup (void){
/*initialize the first PCI device--danube itself */ /*initialize the first PCI device--ifxmips itself */
u32 temp_buffer; u32 temp_buffer;
/*TODO: trigger reset */ /*TODO: trigger reset */
writel(readl(IFXMIPS_CGU_IFCCR) & ~0xf00000, IFXMIPS_CGU_IFCCR); writel(readl(IFXMIPS_CGU_IFCCR) & ~0xf00000, IFXMIPS_CGU_IFCCR);
@ -301,17 +301,17 @@ int pcibios_init(void){
pci_probe_only = 0; pci_probe_only = 0;
printk ("PCI: Probing PCI hardware on host bus 0.\n"); printk ("PCI: Probing PCI hardware on host bus 0.\n");
danube_pci_startup (); ifxmips_pci_startup ();
// IFXMIPS_PCI_REG32(PCI_CR_CLK_CTRL_REG) &= (~8); // IFXMIPS_PCI_REG32(PCI_CR_CLK_CTRL_REG) &= (~8);
danube_pci_mapped_cfg = ioremap_nocache(0x17000000, 0x800 * 16); ifxmips_pci_mapped_cfg = ioremap_nocache(0x17000000, 0x800 * 16);
printk("Danube PCI mapped to 0x%08X\n", (unsigned long)danube_pci_mapped_cfg); printk("IFXMips PCI mapped to 0x%08X\n", (unsigned long)ifxmips_pci_mapped_cfg);
danube_pci_controller.io_map_base = (unsigned long)ioremap(IFXMIPS_PCI_IO_BASE, IFXMIPS_PCI_IO_SIZE - 1); ifxmips_pci_controller.io_map_base = (unsigned long)ioremap(IFXMIPS_PCI_IO_BASE, IFXMIPS_PCI_IO_SIZE - 1);
printk("Danube PCI I/O mapped to 0x%08X\n", (unsigned long)danube_pci_controller.io_map_base); printk("IFXMips PCI I/O mapped to 0x%08X\n", (unsigned long)ifxmips_pci_controller.io_map_base);
register_pci_controller(&danube_pci_controller); register_pci_controller(&ifxmips_pci_controller);
return 0; return 0;
} }

12
target/linux/ifxmips/files/arch/mips/danube/pmu.c
View File

@ -1,5 +1,5 @@
/* /*
* arch/mips/danube/pmu.c * arch/mips/ifxmips/pmu.c
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -22,10 +22,10 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/version.h> #include <linux/version.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
void void
danube_pmu_enable (unsigned int module) ifxmips_pmu_enable (unsigned int module)
{ {
int err = 1000000; int err = 1000000;
@ -35,11 +35,11 @@ danube_pmu_enable (unsigned int module)
if (!err) if (!err)
panic("activating PMU module failed!"); panic("activating PMU module failed!");
} }
EXPORT_SYMBOL(danube_pmu_enable); EXPORT_SYMBOL(ifxmips_pmu_enable);
void void
danube_pmu_disable (unsigned int module) ifxmips_pmu_disable (unsigned int module)
{ {
writel(readl(IFXMIPS_PMU_PWDCR) | module, IFXMIPS_PMU_PWDCR); writel(readl(IFXMIPS_PMU_PWDCR) | module, IFXMIPS_PMU_PWDCR);
} }
EXPORT_SYMBOL(danube_pmu_disable); EXPORT_SYMBOL(ifxmips_pmu_disable);

6
target/linux/ifxmips/files/arch/mips/danube/prom.c
View File

@ -1,5 +1,5 @@
/* /*
* arch/mips/danube/prom.c * arch/mips/ifxmips/prom.c
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -17,7 +17,7 @@
* *
* Copyright (C) 2005 Wu Qi Ming infineon * Copyright (C) 2005 Wu Qi Ming infineon
* *
* Rewrite of Infineon Danube code, thanks to infineon for the support, * Rewrite of Infineon IFXMips code, thanks to infineon for the support,
* software and hardware * software and hardware
* *
* Copyright (C) 2007 John Crispin <blogic@openwrt.org> * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
@ -27,7 +27,7 @@
#include <linux/init.h> #include <linux/init.h>
#include <linux/bootmem.h> #include <linux/bootmem.h>
#include <asm/bootinfo.h> #include <asm/bootinfo.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
static char buf[1024]; static char buf[1024];

20
target/linux/ifxmips/files/arch/mips/danube/reset.c
View File

@ -1,5 +1,5 @@
/* /*
* arch/mips/danube/prom.c * arch/mips/ifxmips/prom.c
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -17,7 +17,7 @@
* *
* Copyright (C) 2005 infineon * Copyright (C) 2005 infineon
* *
* Rewrite of Infineon Danube code, thanks to infineon for the support, * Rewrite of Infineon IFXMips code, thanks to infineon for the support,
* software and hardware * software and hardware
* *
* Copyright (C) 2007 John Crispin <blogic@openwrt.org> * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
@ -29,10 +29,10 @@
#include <asm/reboot.h> #include <asm/reboot.h>
#include <asm/system.h> #include <asm/system.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
static void static void
danube_machine_restart (char *command) ifxmips_machine_restart (char *command)
{ {
printk (KERN_NOTICE "System restart\n"); printk (KERN_NOTICE "System restart\n");
local_irq_disable (); local_irq_disable ();
@ -42,7 +42,7 @@ danube_machine_restart (char *command)
} }
static void static void
danube_machine_halt (void) ifxmips_machine_halt (void)
{ {
printk (KERN_NOTICE "System halted.\n"); printk (KERN_NOTICE "System halted.\n");
local_irq_disable (); local_irq_disable ();
@ -50,7 +50,7 @@ danube_machine_halt (void)
} }
static void static void
danube_machine_power_off (void) ifxmips_machine_power_off (void)
{ {
printk (KERN_NOTICE "Please turn off the power now.\n"); printk (KERN_NOTICE "Please turn off the power now.\n");
local_irq_disable (); local_irq_disable ();
@ -58,9 +58,9 @@ danube_machine_power_off (void)
} }
void void
danube_reboot_setup (void) ifxmips_reboot_setup (void)
{ {
_machine_restart = danube_machine_restart; _machine_restart = ifxmips_machine_restart;
_machine_halt = danube_machine_halt; _machine_halt = ifxmips_machine_halt;
pm_power_off = danube_machine_power_off; pm_power_off = ifxmips_machine_power_off;
} }

52
target/linux/ifxmips/files/arch/mips/danube/setup.c
View File

@ -1,5 +1,5 @@
/* /*
* arch/mips/danube/setup.c * arch/mips/ifxmips/setup.c
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -17,7 +17,7 @@
* *
* Copyright (C) 2004 peng.liu@infineon.com * Copyright (C) 2004 peng.liu@infineon.com
* *
* Rewrite of Infineon Danube code, thanks to infineon for the support, * Rewrite of Infineon IFXMips code, thanks to infineon for the support,
* software and hardware * software and hardware
* *
* Copyright (C) 2007 John Crispin <blogic@openwrt.org> * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
@ -30,14 +30,14 @@
#include <asm/traps.h> #include <asm/traps.h>
#include <asm/cpu.h> #include <asm/cpu.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
#include <asm/danube/danube_irq.h> #include <asm/ifxmips/ifxmips_irq.h>
#include <asm/danube/danube_pmu.h> #include <asm/ifxmips/ifxmips_pmu.h>
static unsigned int r4k_offset; /* Amount to increment compare reg each time */ static unsigned int r4k_offset; /* Amount to increment compare reg each time */
static unsigned int r4k_cur; /* What counter should be at next timer irq */ static unsigned int r4k_cur; /* What counter should be at next timer irq */
extern void danube_reboot_setup (void); extern void ifxmips_reboot_setup (void);
void prom_printf (const char * fmt, ...); void prom_printf (const char * fmt, ...);
void void
@ -47,7 +47,7 @@ __init bus_error_init (void)
} }
unsigned int unsigned int
danube_get_ddr_hz (void) ifxmips_get_ddr_hz (void)
{ {
switch (readl(IFXMIPS_CGU_SYS) & 0x3) switch (readl(IFXMIPS_CGU_SYS) & 0x3)
{ {
@ -60,12 +60,12 @@ danube_get_ddr_hz (void)
} }
return CLOCK_83M; return CLOCK_83M;
} }
EXPORT_SYMBOL(danube_get_ddr_hz); EXPORT_SYMBOL(ifxmips_get_ddr_hz);
unsigned int unsigned int
danube_get_cpu_hz (void) ifxmips_get_cpu_hz (void)
{ {
unsigned int ddr_clock = danube_get_ddr_hz(); unsigned int ddr_clock = ifxmips_get_ddr_hz();
switch (readl(IFXMIPS_CGU_SYS) & 0xc) switch (readl(IFXMIPS_CGU_SYS) & 0xc)
{ {
case 0: case 0:
@ -75,38 +75,38 @@ danube_get_cpu_hz (void)
} }
return ddr_clock << 1; return ddr_clock << 1;
} }
EXPORT_SYMBOL(danube_get_cpu_hz); EXPORT_SYMBOL(ifxmips_get_cpu_hz);
unsigned int unsigned int
danube_get_fpi_hz (void) ifxmips_get_fpi_hz (void)
{ {
unsigned int ddr_clock = danube_get_ddr_hz(); unsigned int ddr_clock = ifxmips_get_ddr_hz();
if (readl(IFXMIPS_CGU_SYS) & 0x40) if (readl(IFXMIPS_CGU_SYS) & 0x40)
{ {
return ddr_clock >> 1; return ddr_clock >> 1;
} }
return ddr_clock; return ddr_clock;
} }
EXPORT_SYMBOL(danube_get_fpi_hz); EXPORT_SYMBOL(ifxmips_get_fpi_hz);
unsigned int unsigned int
danube_get_cpu_ver (void) ifxmips_get_cpu_ver (void)
{ {
return readl(IFXMIPS_MCD_CHIPID) & 0xFFFFF000; return readl(IFXMIPS_MCD_CHIPID) & 0xFFFFF000;
} }
EXPORT_SYMBOL(danube_get_cpu_ver); EXPORT_SYMBOL(ifxmips_get_cpu_ver);
void void
danube_time_init (void) ifxmips_time_init (void)
{ {
mips_hpt_frequency = danube_get_cpu_hz() / 2; mips_hpt_frequency = ifxmips_get_cpu_hz() / 2;
r4k_offset = mips_hpt_frequency / HZ; r4k_offset = mips_hpt_frequency / HZ;
printk("mips_hpt_frequency:%d\n", mips_hpt_frequency); printk("mips_hpt_frequency:%d\n", mips_hpt_frequency);
printk("r4k_offset: %08x(%d)\n", r4k_offset, r4k_offset); printk("r4k_offset: %08x(%d)\n", r4k_offset, r4k_offset);
} }
int int
danube_be_handler(struct pt_regs *regs, int is_fixup) ifxmips_be_handler(struct pt_regs *regs, int is_fixup)
{ {
/*TODO*/ /*TODO*/
printk(KERN_ERR "TODO: BUS error\n"); printk(KERN_ERR "TODO: BUS error\n");
@ -116,7 +116,7 @@ danube_be_handler(struct pt_regs *regs, int is_fixup)
/* ISR GPTU Timer 6 for high resolution timer */ /* ISR GPTU Timer 6 for high resolution timer */
static irqreturn_t static irqreturn_t
danube_timer6_interrupt(int irq, void *dev_id) ifxmips_timer6_interrupt(int irq, void *dev_id)
{ {
timer_interrupt(IFXMIPS_TIMER6_INT, NULL); timer_interrupt(IFXMIPS_TIMER6_INT, NULL);
@ -124,7 +124,7 @@ danube_timer6_interrupt(int irq, void *dev_id)
} }
static struct irqaction hrt_irqaction = { static struct irqaction hrt_irqaction = {
.handler = danube_timer6_interrupt, .handler = ifxmips_timer6_interrupt,
.flags = IRQF_DISABLED, .flags = IRQF_DISABLED,
.name = "hrt", .name = "hrt",
}; };
@ -139,7 +139,7 @@ plat_timer_setup (struct irqaction *irq)
r4k_cur = (read_c0_count() + r4k_offset); r4k_cur = (read_c0_count() + r4k_offset);
write_c0_compare(r4k_cur); write_c0_compare(r4k_cur);
danube_pmu_enable(IFXMIPS_PMU_PWDCR_GPT | IFXMIPS_PMU_PWDCR_FPI); ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_GPT | IFXMIPS_PMU_PWDCR_FPI);
writel(0x100, IFXMIPS_GPTU_GPT_CLC); writel(0x100, IFXMIPS_GPTU_GPT_CLC);
@ -158,7 +158,7 @@ void __init
plat_mem_setup (void) plat_mem_setup (void)
{ {
u32 status; u32 status;
prom_printf("This %s has a cpu rev of 0x%X\n", BOARD_SYSTEM_TYPE, danube_get_cpu_ver()); prom_printf("This %s has a cpu rev of 0x%X\n", BOARD_SYSTEM_TYPE, ifxmips_get_cpu_ver());
//TODO WHY ??? //TODO WHY ???
/* clear RE bit*/ /* clear RE bit*/
@ -166,9 +166,9 @@ plat_mem_setup (void)
status &= (~(1<<25)); status &= (~(1<<25));
write_c0_status(status); write_c0_status(status);
danube_reboot_setup(); ifxmips_reboot_setup();
board_time_init = danube_time_init; board_time_init = ifxmips_time_init;
board_be_handler = &danube_be_handler; board_be_handler = &ifxmips_be_handler;
ioport_resource.start = IOPORT_RESOURCE_START; ioport_resource.start = IOPORT_RESOURCE_START;
ioport_resource.end = IOPORT_RESOURCE_END; ioport_resource.end = IOPORT_RESOURCE_END;

74
target/linux/ifxmips/files/drivers/char/danube_eeprom.c
View File

@ -53,13 +53,13 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/version.h> #include <linux/version.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
#include <asm/danube/danube_irq.h> #include <asm/ifxmips/ifxmips_irq.h>
#include <asm/danube/ifx_ssc_defines.h> #include <asm/ifxmips/ifx_ssc_defines.h>
#include <asm/danube/ifx_ssc.h> #include <asm/ifxmips/ifx_ssc.h>
/* allow the user to set the major device number */ /* allow the user to set the major device number */
static int danube_eeprom_maj = 0; static int ifxmips_eeprom_maj = 0;
extern int ifx_ssc_init (void); extern int ifx_ssc_init (void);
extern int ifx_ssc_open (struct inode *inode, struct file *filp); extern int ifx_ssc_open (struct inode *inode, struct file *filp);
@ -299,26 +299,26 @@ out:
} }
int int
danube_eeprom_open (struct inode *inode, struct file *filp) ifxmips_eeprom_open (struct inode *inode, struct file *filp)
{ {
filp->f_pos = 0; filp->f_pos = 0;
return 0; return 0;
} }
int int
danube_eeprom_close (struct inode *inode, struct file *filp) ifxmips_eeprom_close (struct inode *inode, struct file *filp)
{ {
return 0; return 0;
} }
int int
danube_eeprom_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data) ifxmips_eeprom_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data)
{ {
return 0; return 0;
} }
ssize_t ssize_t
danube_eeprom_read (char *buf, size_t len, unsigned int addr) ifxmips_eeprom_read (char *buf, size_t len, unsigned int addr)
{ {
int ret = 0; int ret = 0;
unsigned int data; unsigned int data;
@ -335,7 +335,7 @@ danube_eeprom_read (char *buf, size_t len, unsigned int addr)
if ((ret = ifx_ssc_open((struct inode *) 0, NULL))) if ((ret = ifx_ssc_open((struct inode *) 0, NULL)))
{ {
printk("danube_eeprom_open fails\n"); printk("ifxmips_eeprom_open fails\n");
goto out; goto out;
} }
@ -361,14 +361,14 @@ danube_eeprom_read (char *buf, size_t len, unsigned int addr)
out: out:
if (ifx_ssc_close((struct inode *) 0, NULL)) if (ifx_ssc_close((struct inode *) 0, NULL))
printk("danube_eeprom_close fails\n"); printk("ifxmips_eeprom_close fails\n");
return len; return len;
} }
EXPORT_SYMBOL(danube_eeprom_read); EXPORT_SYMBOL(ifxmips_eeprom_read);
static ssize_t static ssize_t
danube_eeprom_fops_read (struct file *filp, char *ubuf, size_t len, loff_t * off) ifxmips_eeprom_fops_read (struct file *filp, char *ubuf, size_t len, loff_t * off)
{ {
int ret = 0; int ret = 0;
unsigned char ssc_rx_buf[EEPROM_SIZE]; unsigned char ssc_rx_buf[EEPROM_SIZE];
@ -385,7 +385,7 @@ danube_eeprom_fops_read (struct file *filp, char *ubuf, size_t len, loff_t * off
local_irq_save(flag); local_irq_save(flag);
if ((ret = danube_eeprom_read(ssc_rx_buf, len, *off)) < 0) if ((ret = ifxmips_eeprom_read(ssc_rx_buf, len, *off)) < 0)
{ {
printk("read fails, err=%x\n", ret); printk("read fails, err=%x\n", ret);
local_irq_restore(flag); local_irq_restore(flag);
@ -405,14 +405,14 @@ danube_eeprom_fops_read (struct file *filp, char *ubuf, size_t len, loff_t * off
} }
ssize_t ssize_t
danube_eeprom_write (char *buf, size_t len, unsigned int addr) ifxmips_eeprom_write (char *buf, size_t len, unsigned int addr)
{ {
int ret = 0; int ret = 0;
unsigned int data; unsigned int data;
if ((ret = ifx_ssc_open ((struct inode *) 0, NULL))) if ((ret = ifx_ssc_open ((struct inode *) 0, NULL)))
{ {
printk ("danube_eeprom_open fails\n"); printk ("ifxmips_eeprom_open fails\n");
goto out; goto out;
} }
@ -436,14 +436,14 @@ danube_eeprom_write (char *buf, size_t len, unsigned int addr)
out: out:
if (ifx_ssc_close ((struct inode *) 0, NULL)) if (ifx_ssc_close ((struct inode *) 0, NULL))
printk ("danube_eeprom_close fails\n"); printk ("ifxmips_eeprom_close fails\n");
return ret; return ret;
} }
EXPORT_SYMBOL(danube_eeprom_write); EXPORT_SYMBOL(ifxmips_eeprom_write);
static ssize_t static ssize_t
danube_eeprom_fops_write (struct file *filp, const char *ubuf, size_t len, loff_t * off) ifxmips_eeprom_fops_write (struct file *filp, const char *ubuf, size_t len, loff_t * off)
{ {
int ret = 0; int ret = 0;
unsigned char ssc_tx_buf[EEPROM_SIZE]; unsigned char ssc_tx_buf[EEPROM_SIZE];
@ -457,7 +457,7 @@ danube_eeprom_fops_write (struct file *filp, const char *ubuf, size_t len, loff_
if ((ret = copy_from_user (ssc_tx_buf, ubuf, len))) if ((ret = copy_from_user (ssc_tx_buf, ubuf, len)))
return EFAULT; return EFAULT;
ret = danube_eeprom_write (ssc_tx_buf, len, *off); ret = ifxmips_eeprom_write (ssc_tx_buf, len, *off);
if (ret > 0) if (ret > 0)
*off = ret; *off = ret;
@ -466,7 +466,7 @@ danube_eeprom_fops_write (struct file *filp, const char *ubuf, size_t len, loff_
} }
loff_t loff_t
danube_eeprom_llseek (struct file * filp, loff_t off, int whence) ifxmips_eeprom_llseek (struct file * filp, loff_t off, int whence)
{ {
loff_t newpos; loff_t newpos;
switch (whence) { switch (whence) {
@ -490,24 +490,24 @@ danube_eeprom_llseek (struct file * filp, loff_t off, int whence)
return newpos; return newpos;
} }
static struct file_operations danube_eeprom_fops = { static struct file_operations ifxmips_eeprom_fops = {
owner:THIS_MODULE, owner:THIS_MODULE,
llseek:danube_eeprom_llseek, llseek:ifxmips_eeprom_llseek,
read:danube_eeprom_fops_read, read:ifxmips_eeprom_fops_read,
write:danube_eeprom_fops_write, write:ifxmips_eeprom_fops_write,
ioctl:danube_eeprom_ioctl, ioctl:ifxmips_eeprom_ioctl,
open:danube_eeprom_open, open:ifxmips_eeprom_open,
release:danube_eeprom_close, release:ifxmips_eeprom_close,
}; };
int __init int __init
danube_eeprom_init (void) ifxmips_eeprom_init (void)
{ {
int ret = 0; int ret = 0;
danube_eeprom_maj = register_chrdev(0, "eeprom", &danube_eeprom_fops); ifxmips_eeprom_maj = register_chrdev(0, "eeprom", &ifxmips_eeprom_fops);
if (danube_eeprom_maj < 0) if (ifxmips_eeprom_maj < 0)
{ {
printk("failed to register eeprom device\n"); printk("failed to register eeprom device\n");
ret = -EINVAL; ret = -EINVAL;
@ -515,27 +515,27 @@ danube_eeprom_init (void)
goto out; goto out;
} }
printk("danube_eeprom : /dev/eeprom mayor %d\n", danube_eeprom_maj); printk("ifxmips_eeprom : /dev/eeprom mayor %d\n", ifxmips_eeprom_maj);
out: out:
return ret; return ret;
} }
void __exit void __exit
danube_eeprom_cleanup_module (void) ifxmips_eeprom_cleanup_module (void)
{ {
/*if (unregister_chrdev (danube_eeprom_maj, "eeprom")) { /*if (unregister_chrdev (ifxmips_eeprom_maj, "eeprom")) {
printk ("Unable to unregister major %d for the EEPROM\n", printk ("Unable to unregister major %d for the EEPROM\n",
maj); maj);
}*/ }*/
} }
module_exit (danube_eeprom_cleanup_module); module_exit (ifxmips_eeprom_cleanup_module);
module_init (danube_eeprom_init); module_init (ifxmips_eeprom_init);
MODULE_LICENSE ("GPL"); MODULE_LICENSE ("GPL");
MODULE_AUTHOR ("Peng Liu"); MODULE_AUTHOR ("Peng Liu");
MODULE_DESCRIPTION ("IFAP EEPROM driver"); MODULE_DESCRIPTION ("IFAP EEPROM driver");
MODULE_SUPPORTED_DEVICE ("danube_eeprom"); MODULE_SUPPORTED_DEVICE ("ifxmips_eeprom");

204
target/linux/ifxmips/files/drivers/char/danube_gpio.c
View File

@ -26,13 +26,13 @@
#include <linux/ioctl.h> #include <linux/ioctl.h>
#include <asm/semaphore.h> #include <asm/semaphore.h>
#include <asm/uaccess.h> #include <asm/uaccess.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
#include <asm/danube/danube_ioctl.h> #include <asm/ifxmips/ifxmips_ioctl.h>
#define MAX_PORTS 2 #define MAX_PORTS 2
#define PINS_PER_PORT 16 #define PINS_PER_PORT 16
static unsigned int danube_gpio_major = 0; static unsigned int ifxmips_gpio_major = 0;
/* TODO do we need this ? */ /* TODO do we need this ? */
static struct semaphore port_sem; static struct semaphore port_sem;
@ -41,147 +41,147 @@ static struct semaphore port_sem;
#define IFXMIPS_GPIO_SANITY {if (port > MAX_PORTS || pin > PINS_PER_PORT) return -EINVAL; } #define IFXMIPS_GPIO_SANITY {if (port > MAX_PORTS || pin > PINS_PER_PORT) return -EINVAL; }
int int
danube_port_reserve_pin (unsigned int port, unsigned int pin) ifxmips_port_reserve_pin (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
printk("%s : call to obseleted function\n", __func__); printk("%s : call to obseleted function\n", __func__);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_reserve_pin); EXPORT_SYMBOL(ifxmips_port_reserve_pin);
int int
danube_port_free_pin (unsigned int port, unsigned int pin) ifxmips_port_free_pin (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
printk("%s : call to obseleted function\n", __func__); printk("%s : call to obseleted function\n", __func__);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_free_pin); EXPORT_SYMBOL(ifxmips_port_free_pin);
int int
danube_port_set_open_drain (unsigned int port, unsigned int pin) ifxmips_port_set_open_drain (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_OD + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_OD); writel(readl(IFXMIPS_GPIO_P0_OD + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_OD);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_set_open_drain); EXPORT_SYMBOL(ifxmips_port_set_open_drain);
int int
danube_port_clear_open_drain (unsigned int port, unsigned int pin) ifxmips_port_clear_open_drain (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_OD + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_OD); writel(readl(IFXMIPS_GPIO_P0_OD + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_OD);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_clear_open_drain); EXPORT_SYMBOL(ifxmips_port_clear_open_drain);
int int
danube_port_set_pudsel (unsigned int port, unsigned int pin) ifxmips_port_set_pudsel (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_PUDSEL + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_PUDSEL); writel(readl(IFXMIPS_GPIO_P0_PUDSEL + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_PUDSEL);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_set_pudsel); EXPORT_SYMBOL(ifxmips_port_set_pudsel);
int int
danube_port_clear_pudsel (unsigned int port, unsigned int pin) ifxmips_port_clear_pudsel (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_PUDSEL + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_PUDSEL); writel(readl(IFXMIPS_GPIO_P0_PUDSEL + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_PUDSEL);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_clear_pudsel); EXPORT_SYMBOL(ifxmips_port_clear_pudsel);
int int
danube_port_set_puden (unsigned int port, unsigned int pin) ifxmips_port_set_puden (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_PUDEN + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_PUDEN); writel(readl(IFXMIPS_GPIO_P0_PUDEN + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_PUDEN);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_set_puden); EXPORT_SYMBOL(ifxmips_port_set_puden);
int int
danube_port_clear_puden (unsigned int port, unsigned int pin) ifxmips_port_clear_puden (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_PUDEN + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_PUDEN); writel(readl(IFXMIPS_GPIO_P0_PUDEN + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_PUDEN);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_clear_puden); EXPORT_SYMBOL(ifxmips_port_clear_puden);
int int
danube_port_set_stoff (unsigned int port, unsigned int pin) ifxmips_port_set_stoff (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_STOFF + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_STOFF); writel(readl(IFXMIPS_GPIO_P0_STOFF + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_STOFF);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_set_stoff); EXPORT_SYMBOL(ifxmips_port_set_stoff);
int int
danube_port_clear_stoff (unsigned int port, unsigned int pin) ifxmips_port_clear_stoff (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_STOFF + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_STOFF); writel(readl(IFXMIPS_GPIO_P0_STOFF + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_STOFF);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_clear_stoff); EXPORT_SYMBOL(ifxmips_port_clear_stoff);
int int
danube_port_set_dir_out (unsigned int port, unsigned int pin) ifxmips_port_set_dir_out (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_DIR + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_DIR); writel(readl(IFXMIPS_GPIO_P0_DIR + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_DIR);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_set_dir_out); EXPORT_SYMBOL(ifxmips_port_set_dir_out);
int int
danube_port_set_dir_in (unsigned int port, unsigned int pin) ifxmips_port_set_dir_in (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_DIR + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_DIR); writel(readl(IFXMIPS_GPIO_P0_DIR + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_DIR);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_set_dir_in); EXPORT_SYMBOL(ifxmips_port_set_dir_in);
int int
danube_port_set_output (unsigned int port, unsigned int pin) ifxmips_port_set_output (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_OUT + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_OUT); writel(readl(IFXMIPS_GPIO_P0_OUT + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_OUT);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_set_output); EXPORT_SYMBOL(ifxmips_port_set_output);
int int
danube_port_clear_output (unsigned int port, unsigned int pin) ifxmips_port_clear_output (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_OUT + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_OUT); writel(readl(IFXMIPS_GPIO_P0_OUT + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_OUT);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_clear_output); EXPORT_SYMBOL(ifxmips_port_clear_output);
int int
danube_port_get_input (unsigned int port, unsigned int pin) ifxmips_port_get_input (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
@ -190,49 +190,49 @@ danube_port_get_input (unsigned int port, unsigned int pin)
else else
return 1; return 1;
} }
EXPORT_SYMBOL(danube_port_get_input); EXPORT_SYMBOL(ifxmips_port_get_input);
int int
danube_port_set_altsel0 (unsigned int port, unsigned int pin) ifxmips_port_set_altsel0 (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_ALTSEL0 + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_ALTSEL0); writel(readl(IFXMIPS_GPIO_P0_ALTSEL0 + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_ALTSEL0);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_set_altsel0); EXPORT_SYMBOL(ifxmips_port_set_altsel0);
int int
danube_port_clear_altsel0 (unsigned int port, unsigned int pin) ifxmips_port_clear_altsel0 (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_ALTSEL0 + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_ALTSEL0); writel(readl(IFXMIPS_GPIO_P0_ALTSEL0 + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_ALTSEL0);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_clear_altsel0); EXPORT_SYMBOL(ifxmips_port_clear_altsel0);
int int
danube_port_set_altsel1 (unsigned int port, unsigned int pin) ifxmips_port_set_altsel1 (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_ALTSEL1 + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_ALTSEL1); writel(readl(IFXMIPS_GPIO_P0_ALTSEL1 + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_ALTSEL1);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_set_altsel1); EXPORT_SYMBOL(ifxmips_port_set_altsel1);
int int
danube_port_clear_altsel1 (unsigned int port, unsigned int pin) ifxmips_port_clear_altsel1 (unsigned int port, unsigned int pin)
{ {
IFXMIPS_GPIO_SANITY; IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_ALTSEL1 + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_ALTSEL1); writel(readl(IFXMIPS_GPIO_P0_ALTSEL1 + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_ALTSEL1);
return 0; return 0;
} }
EXPORT_SYMBOL(danube_port_clear_altsel1); EXPORT_SYMBOL(ifxmips_port_clear_altsel1);
long danube_port_read_procmem_helper(char* tag, u32* in_reg, char *buf) long ifxmips_port_read_procmem_helper(char* tag, u32* in_reg, char *buf)
{ {
u32 reg, bit = 0; u32 reg, bit = 0;
unsigned int len, t; unsigned int len, t;
@ -252,10 +252,10 @@ long danube_port_read_procmem_helper(char* tag, u32* in_reg, char *buf)
} }
int int
danube_port_read_procmem (char *buf, char **start, off_t offset, int count, ifxmips_port_read_procmem (char *buf, char **start, off_t offset, int count,
int *eof, void *data) int *eof, void *data)
{ {
long len = sprintf (buf, "\nDanube Port Settings\n"); long len = sprintf (buf, "\nIFXMips Port Settings\n");
len += sprintf (buf + len, len += sprintf (buf + len,
" 3 2 1 0\n"); " 3 2 1 0\n");
@ -264,24 +264,24 @@ danube_port_read_procmem (char *buf, char **start, off_t offset, int count,
len += sprintf (buf + len, len += sprintf (buf + len,
"----------------------------------------\n"); "----------------------------------------\n");
len += danube_port_read_procmem_helper("P0-OUT", IFXMIPS_GPIO_P0_OUT, &buf[len]); len += ifxmips_port_read_procmem_helper("P0-OUT", IFXMIPS_GPIO_P0_OUT, &buf[len]);
len += danube_port_read_procmem_helper("P1-OUT", IFXMIPS_GPIO_P1_OUT, &buf[len]); len += ifxmips_port_read_procmem_helper("P1-OUT", IFXMIPS_GPIO_P1_OUT, &buf[len]);
len += danube_port_read_procmem_helper("P0-IN ", IFXMIPS_GPIO_P0_IN, &buf[len]); len += ifxmips_port_read_procmem_helper("P0-IN ", IFXMIPS_GPIO_P0_IN, &buf[len]);
len += danube_port_read_procmem_helper("P1-IN ", IFXMIPS_GPIO_P1_IN, &buf[len]); len += ifxmips_port_read_procmem_helper("P1-IN ", IFXMIPS_GPIO_P1_IN, &buf[len]);
len += danube_port_read_procmem_helper("P0-DIR", IFXMIPS_GPIO_P0_DIR, &buf[len]); len += ifxmips_port_read_procmem_helper("P0-DIR", IFXMIPS_GPIO_P0_DIR, &buf[len]);
len += danube_port_read_procmem_helper("P1-DIR", IFXMIPS_GPIO_P1_DIR, &buf[len]); len += ifxmips_port_read_procmem_helper("P1-DIR", IFXMIPS_GPIO_P1_DIR, &buf[len]);
len += danube_port_read_procmem_helper("P0-STO ", IFXMIPS_GPIO_P0_STOFF, &buf[len]); len += ifxmips_port_read_procmem_helper("P0-STO ", IFXMIPS_GPIO_P0_STOFF, &buf[len]);
len += danube_port_read_procmem_helper("P1-STO ", IFXMIPS_GPIO_P1_STOFF, &buf[len]); len += ifxmips_port_read_procmem_helper("P1-STO ", IFXMIPS_GPIO_P1_STOFF, &buf[len]);
len += danube_port_read_procmem_helper("P0-PUDE", IFXMIPS_GPIO_P0_PUDEN, &buf[len]); len += ifxmips_port_read_procmem_helper("P0-PUDE", IFXMIPS_GPIO_P0_PUDEN, &buf[len]);
len += danube_port_read_procmem_helper("P1-PUDE", IFXMIPS_GPIO_P1_PUDEN, &buf[len]); len += ifxmips_port_read_procmem_helper("P1-PUDE", IFXMIPS_GPIO_P1_PUDEN, &buf[len]);
len += danube_port_read_procmem_helper("P0-OD ", IFXMIPS_GPIO_P0_OD, &buf[len]); len += ifxmips_port_read_procmem_helper("P0-OD ", IFXMIPS_GPIO_P0_OD, &buf[len]);
len += danube_port_read_procmem_helper("P1-OD ", IFXMIPS_GPIO_P1_OD, &buf[len]); len += ifxmips_port_read_procmem_helper("P1-OD ", IFXMIPS_GPIO_P1_OD, &buf[len]);
len += danube_port_read_procmem_helper("P0-PUDS", IFXMIPS_GPIO_P0_PUDSEL, &buf[len]); len += ifxmips_port_read_procmem_helper("P0-PUDS", IFXMIPS_GPIO_P0_PUDSEL, &buf[len]);
len += danube_port_read_procmem_helper("P1-PUDS", IFXMIPS_GPIO_P1_PUDSEL, &buf[len]); len += ifxmips_port_read_procmem_helper("P1-PUDS", IFXMIPS_GPIO_P1_PUDSEL, &buf[len]);
len += danube_port_read_procmem_helper("P0-ALT0", IFXMIPS_GPIO_P0_ALTSEL0, &buf[len]); len += ifxmips_port_read_procmem_helper("P0-ALT0", IFXMIPS_GPIO_P0_ALTSEL0, &buf[len]);
len += danube_port_read_procmem_helper("P1-ALT0", IFXMIPS_GPIO_P1_ALTSEL0, &buf[len]); len += ifxmips_port_read_procmem_helper("P1-ALT0", IFXMIPS_GPIO_P1_ALTSEL0, &buf[len]);
len += danube_port_read_procmem_helper("P0-ALT1", IFXMIPS_GPIO_P0_ALTSEL1, &buf[len]); len += ifxmips_port_read_procmem_helper("P0-ALT1", IFXMIPS_GPIO_P0_ALTSEL1, &buf[len]);
len += danube_port_read_procmem_helper("P1-ALT1", IFXMIPS_GPIO_P1_ALTSEL1, &buf[len]); len += ifxmips_port_read_procmem_helper("P1-ALT1", IFXMIPS_GPIO_P1_ALTSEL1, &buf[len]);
len = len + sprintf (buf + len, "\n\n"); len = len + sprintf (buf + len, "\n\n");
*eof = 1; *eof = 1;
@ -290,23 +290,23 @@ danube_port_read_procmem (char *buf, char **start, off_t offset, int count,
} }
static int static int
danube_port_open (struct inode *inode, struct file *filep) ifxmips_port_open (struct inode *inode, struct file *filep)
{ {
return 0; return 0;
} }
static int static int
danube_port_release (struct inode *inode, struct file *filelp) ifxmips_port_release (struct inode *inode, struct file *filelp)
{ {
return 0; return 0;
} }
static int static int
danube_port_ioctl (struct inode *inode, struct file *filp, ifxmips_port_ioctl (struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg) unsigned int cmd, unsigned long arg)
{ {
int ret = 0; int ret = 0;
volatile struct danube_port_ioctl_parm parm; volatile struct ifxmips_port_ioctl_parm parm;
if (_IOC_TYPE (cmd) != IFXMIPS_PORT_IOC_MAGIC) if (_IOC_TYPE (cmd) != IFXMIPS_PORT_IOC_MAGIC)
return -EINVAL; return -EINVAL;
@ -314,15 +314,15 @@ danube_port_ioctl (struct inode *inode, struct file *filp,
if (_IOC_DIR (cmd) & _IOC_WRITE) { if (_IOC_DIR (cmd) & _IOC_WRITE) {
if (!access_ok if (!access_ok
(VERIFY_READ, arg, (VERIFY_READ, arg,
sizeof (struct danube_port_ioctl_parm))) sizeof (struct ifxmips_port_ioctl_parm)))
return -EFAULT; return -EFAULT;
ret = copy_from_user ((void *) &parm, (void *) arg, ret = copy_from_user ((void *) &parm, (void *) arg,
sizeof (struct danube_port_ioctl_parm)); sizeof (struct ifxmips_port_ioctl_parm));
} }
if (_IOC_DIR (cmd) & _IOC_READ) { if (_IOC_DIR (cmd) & _IOC_READ) {
if (!access_ok if (!access_ok
(VERIFY_WRITE, arg, (VERIFY_WRITE, arg,
sizeof (struct danube_port_ioctl_parm))) sizeof (struct ifxmips_port_ioctl_parm)))
return -EFAULT; return -EFAULT;
} }
@ -332,64 +332,64 @@ danube_port_ioctl (struct inode *inode, struct file *filp,
switch (cmd) { switch (cmd) {
case IFXMIPS_PORT_IOCOD: case IFXMIPS_PORT_IOCOD:
if (parm.value == 0x00) if (parm.value == 0x00)
danube_port_clear_open_drain(parm.port, parm.pin); ifxmips_port_clear_open_drain(parm.port, parm.pin);
else else
danube_port_set_open_drain(parm.port, parm.pin); ifxmips_port_set_open_drain(parm.port, parm.pin);
break; break;
case IFXMIPS_PORT_IOCPUDSEL: case IFXMIPS_PORT_IOCPUDSEL:
if (parm.value == 0x00) if (parm.value == 0x00)
danube_port_clear_pudsel(parm.port, parm.pin); ifxmips_port_clear_pudsel(parm.port, parm.pin);
else else
danube_port_set_pudsel(parm.port, parm.pin); ifxmips_port_set_pudsel(parm.port, parm.pin);
break; break;
case IFXMIPS_PORT_IOCPUDEN: case IFXMIPS_PORT_IOCPUDEN:
if (parm.value == 0x00) if (parm.value == 0x00)
danube_port_clear_puden(parm.port, parm.pin); ifxmips_port_clear_puden(parm.port, parm.pin);
else else
danube_port_set_puden(parm.port, parm.pin); ifxmips_port_set_puden(parm.port, parm.pin);
break; break;
case IFXMIPS_PORT_IOCSTOFF: case IFXMIPS_PORT_IOCSTOFF:
if (parm.value == 0x00) if (parm.value == 0x00)
danube_port_clear_stoff(parm.port, parm.pin); ifxmips_port_clear_stoff(parm.port, parm.pin);
else else
danube_port_set_stoff(parm.port, parm.pin); ifxmips_port_set_stoff(parm.port, parm.pin);
break; break;
case IFXMIPS_PORT_IOCDIR: case IFXMIPS_PORT_IOCDIR:
if (parm.value == 0x00) if (parm.value == 0x00)
danube_port_set_dir_in(parm.port, parm.pin); ifxmips_port_set_dir_in(parm.port, parm.pin);
else else
danube_port_set_dir_out(parm.port, parm.pin); ifxmips_port_set_dir_out(parm.port, parm.pin);
break; break;
case IFXMIPS_PORT_IOCOUTPUT: case IFXMIPS_PORT_IOCOUTPUT:
if (parm.value == 0x00) if (parm.value == 0x00)
danube_port_clear_output(parm.port, parm.pin); ifxmips_port_clear_output(parm.port, parm.pin);
else else
danube_port_set_output(parm.port, parm.pin); ifxmips_port_set_output(parm.port, parm.pin);
break; break;
case IFXMIPS_PORT_IOCALTSEL0: case IFXMIPS_PORT_IOCALTSEL0:
if (parm.value == 0x00) if (parm.value == 0x00)
danube_port_clear_altsel0(parm.port, parm.pin); ifxmips_port_clear_altsel0(parm.port, parm.pin);
else else
danube_port_set_altsel0(parm.port, parm.pin); ifxmips_port_set_altsel0(parm.port, parm.pin);
break; break;
case IFXMIPS_PORT_IOCALTSEL1: case IFXMIPS_PORT_IOCALTSEL1:
if (parm.value == 0x00) if (parm.value == 0x00)
danube_port_clear_altsel1(parm.port, parm.pin); ifxmips_port_clear_altsel1(parm.port, parm.pin);
else else
danube_port_set_altsel1(parm.port, parm.pin); ifxmips_port_set_altsel1(parm.port, parm.pin);
break; break;
case IFXMIPS_PORT_IOCINPUT: case IFXMIPS_PORT_IOCINPUT:
parm.value = danube_port_get_input(parm.port, parm.pin); parm.value = ifxmips_port_get_input(parm.port, parm.pin);
copy_to_user((void*)arg, (void*)&parm, copy_to_user((void*)arg, (void*)&parm,
sizeof(struct danube_port_ioctl_parm)); sizeof(struct ifxmips_port_ioctl_parm));
break; break;
default: default:
@ -402,41 +402,41 @@ danube_port_ioctl (struct inode *inode, struct file *filp,
} }
static struct file_operations port_fops = { static struct file_operations port_fops = {
.open = danube_port_open, .open = ifxmips_port_open,
.release = danube_port_release, .release = ifxmips_port_release,
.ioctl = danube_port_ioctl .ioctl = ifxmips_port_ioctl
}; };
int __init int __init
danube_gpio_init (void) ifxmips_gpio_init (void)
{ {
int retval = 0; int retval = 0;
sema_init (&port_sem, 1); sema_init (&port_sem, 1);
danube_gpio_major = register_chrdev(0, "danube_gpio", &port_fops); ifxmips_gpio_major = register_chrdev(0, "ifxmips_gpio", &port_fops);
if (!danube_gpio_major) if (!ifxmips_gpio_major)
{ {
printk("danube-port: Error! Could not register port device. #%d\n", danube_gpio_major); printk("ifxmips-port: Error! Could not register port device. #%d\n", ifxmips_gpio_major);
retval = -EINVAL; retval = -EINVAL;
goto out; goto out;
} }
create_proc_read_entry("danube_gpio", 0, NULL, create_proc_read_entry("ifxmips_gpio", 0, NULL,
danube_port_read_procmem, NULL); ifxmips_port_read_procmem, NULL);
printk("registered danube gpio driver\n"); printk("registered ifxmips gpio driver\n");
out: out:
return retval; return retval;
} }
void __exit void __exit
danube_gpio_exit (void) ifxmips_gpio_exit (void)
{ {
unregister_chrdev(danube_gpio_major, "danube_gpio"); unregister_chrdev(ifxmips_gpio_major, "ifxmips_gpio");
remove_proc_entry("danube_gpio", NULL); remove_proc_entry("ifxmips_gpio", NULL);
} }
module_init(danube_gpio_init); module_init(ifxmips_gpio_init);
module_exit(danube_gpio_exit); module_exit(ifxmips_gpio_exit);

58
target/linux/ifxmips/files/drivers/char/danube_led.c
View File

@ -27,9 +27,9 @@
#include <asm/uaccess.h> #include <asm/uaccess.h>
#include <asm/unistd.h> #include <asm/unistd.h>
#include <linux/errno.h> #include <linux/errno.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
#include <asm/danube/danube_gpio.h> #include <asm/ifxmips/ifxmips_gpio.h>
#include <asm/danube/danube_pmu.h> #include <asm/ifxmips/ifxmips_pmu.h>
#define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_FALLING #define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_FALLING
//#define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_RISING //#define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_RISING
@ -38,52 +38,52 @@
#define IFXMIPS_LED_GPIO_PORT 0 #define IFXMIPS_LED_GPIO_PORT 0
static int danube_led_major; static int ifxmips_led_major;
void void
danube_led_set (unsigned int led) ifxmips_led_set (unsigned int led)
{ {
led &= 0xffffff; led &= 0xffffff;
writel(readl(IFXMIPS_LED_CPU0) | led, IFXMIPS_LED_CPU0); writel(readl(IFXMIPS_LED_CPU0) | led, IFXMIPS_LED_CPU0);
} }
EXPORT_SYMBOL(danube_led_set); EXPORT_SYMBOL(ifxmips_led_set);
void void
danube_led_clear (unsigned int led) ifxmips_led_clear (unsigned int led)
{ {
led = ~(led & 0xffffff); led = ~(led & 0xffffff);
writel(readl(IFXMIPS_LED_CPU0) & led, IFXMIPS_LED_CPU0); writel(readl(IFXMIPS_LED_CPU0) & led, IFXMIPS_LED_CPU0);
} }
EXPORT_SYMBOL(danube_led_clear); EXPORT_SYMBOL(ifxmips_led_clear);
void void
danube_led_blink_set (unsigned int led) ifxmips_led_blink_set (unsigned int led)
{ {
led &= 0xffffff; led &= 0xffffff;
writel(readl(IFXMIPS_LED_CON0) | led, IFXMIPS_LED_CON0); writel(readl(IFXMIPS_LED_CON0) | led, IFXMIPS_LED_CON0);
} }
EXPORT_SYMBOL(danube_led_blink_set); EXPORT_SYMBOL(ifxmips_led_blink_set);
void void
danube_led_blink_clear (unsigned int led) ifxmips_led_blink_clear (unsigned int led)
{ {
led = ~(led & 0xffffff); led = ~(led & 0xffffff);
writel(readl(IFXMIPS_LED_CON0) & led, IFXMIPS_LED_CON0); writel(readl(IFXMIPS_LED_CON0) & led, IFXMIPS_LED_CON0);
} }
EXPORT_SYMBOL(danube_led_blink_clear); EXPORT_SYMBOL(ifxmips_led_blink_clear);
void void
danube_led_setup_gpio (void) ifxmips_led_setup_gpio (void)
{ {
int i = 0; int i = 0;
/* we need to setup pins SH,D,ST (4,5,6) */ /* we need to setup pins SH,D,ST (4,5,6) */
for (i = 4; i < 7; i++) for (i = 4; i < 7; i++)
{ {
danube_port_set_altsel0(IFXMIPS_LED_GPIO_PORT, i); ifxmips_port_set_altsel0(IFXMIPS_LED_GPIO_PORT, i);
danube_port_clear_altsel1(IFXMIPS_LED_GPIO_PORT, i); ifxmips_port_clear_altsel1(IFXMIPS_LED_GPIO_PORT, i);
danube_port_set_dir_out(IFXMIPS_LED_GPIO_PORT, i); ifxmips_port_set_dir_out(IFXMIPS_LED_GPIO_PORT, i);
danube_port_set_open_drain(IFXMIPS_LED_GPIO_PORT, i); ifxmips_port_set_open_drain(IFXMIPS_LED_GPIO_PORT, i);
} }
} }
@ -111,7 +111,7 @@ led_release (struct inode *inode, struct file *file)
return 0; return 0;
} }
static struct file_operations danube_led_fops = { static struct file_operations ifxmips_led_fops = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.ioctl = led_ioctl, .ioctl = led_ioctl,
.open = led_open, .open = led_open,
@ -138,11 +138,11 @@ Map for hardware relay on reference board
int __init int __init
danube_led_init (void) ifxmips_led_init (void)
{ {
int ret = 0; int ret = 0;
danube_led_setup_gpio(); ifxmips_led_setup_gpio();
writel(0, IFXMIPS_LED_AR); writel(0, IFXMIPS_LED_AR);
writel(0, IFXMIPS_LED_CPU0); writel(0, IFXMIPS_LED_CPU0);
@ -169,29 +169,29 @@ danube_led_init (void)
writel(readl(IFXMIPS_LED_CON0) | IFXMIPS_LED_ADSL_SRC, IFXMIPS_LED_CON0); writel(readl(IFXMIPS_LED_CON0) | IFXMIPS_LED_ADSL_SRC, IFXMIPS_LED_CON0);
/* per default, the leds are turned on */ /* per default, the leds are turned on */
danube_pmu_enable(IFXMIPS_PMU_PWDCR_LED); ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_LED);
danube_led_major = register_chrdev(0, "danube_led", &danube_led_fops); ifxmips_led_major = register_chrdev(0, "ifxmips_led", &ifxmips_led_fops);
if (!danube_led_major) if (!ifxmips_led_major)
{ {
printk("danube_led: Error! Could not register device. %d\n", danube_led_major); printk("ifxmips_led: Error! Could not register device. %d\n", ifxmips_led_major);
ret = -EINVAL; ret = -EINVAL;
goto out; goto out;
} }
printk(KERN_INFO "danube_led : device registered on major %d\n", danube_led_major); printk(KERN_INFO "ifxmips_led : device registered on major %d\n", ifxmips_led_major);
out: out:
return ret; return ret;
} }
void __exit void __exit
danube_led_exit (void) ifxmips_led_exit (void)
{ {
unregister_chrdev(danube_led_major, "danube_led"); unregister_chrdev(ifxmips_led_major, "ifxmips_led");
} }
module_init(danube_led_init); module_init(ifxmips_led_init);
module_exit(danube_led_exit); module_exit(ifxmips_led_exit);

28
target/linux/ifxmips/files/drivers/char/danube_ssc.c
View File

@ -54,10 +54,10 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/version.h> #include <linux/version.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
#include <asm/danube/danube_irq.h> #include <asm/ifxmips/ifxmips_irq.h>
#include <asm/danube/ifx_ssc_defines.h> #include <asm/ifxmips/ifx_ssc_defines.h>
#include <asm/danube/ifx_ssc.h> #include <asm/ifxmips/ifx_ssc.h>
#ifdef SSC_FRAME_INT_ENABLE #ifdef SSC_FRAME_INT_ENABLE
#undef SSC_FRAME_INT_ENABLE #undef SSC_FRAME_INT_ENABLE
@ -93,8 +93,8 @@ static unsigned int ifx_ssc_get_kernel_clk (struct ifx_ssc_port *info);
static void tx_int (struct ifx_ssc_port *); static void tx_int (struct ifx_ssc_port *);
static int ifx_ssc1_read_proc (char *, char **, off_t, int, int *, void *); static int ifx_ssc1_read_proc (char *, char **, off_t, int, int *, void *);
extern unsigned int danube_get_fpi_hz (void); extern unsigned int ifxmips_get_fpi_hz (void);
extern void mask_and_ack_danube_irq (unsigned int irq_nr); extern void mask_and_ack_ifxmips_irq (unsigned int irq_nr);
static struct file_operations ifx_ssc_fops = { static struct file_operations ifx_ssc_fops = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
@ -116,7 +116,7 @@ ifx_ssc_get_kernel_clk (struct ifx_ssc_port *info)
printk ("ifx_ssc_get_kernel_clk rmc==0 \n"); printk ("ifx_ssc_get_kernel_clk rmc==0 \n");
return 0; return 0;
} }
return danube_get_fpi_hz () / rmc; return ifxmips_get_fpi_hz () / rmc;
} }
#ifndef not_yet #ifndef not_yet
@ -382,9 +382,9 @@ ifx_ssc_abort (struct ifx_ssc_port *info)
wake_up_interruptible (&info->rwait); wake_up_interruptible (&info->rwait);
// clear pending int's // clear pending int's
mask_and_ack_danube_irq(info->rxirq); mask_and_ack_ifxmips_irq(info->rxirq);
mask_and_ack_danube_irq(info->txirq); mask_and_ack_ifxmips_irq(info->txirq);
mask_and_ack_danube_irq(info->errirq); mask_and_ack_ifxmips_irq(info->errirq);
// clear error flags // clear error flags
WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ALL_ERROR, info->mapbase + IFX_SSC_WHBSTATE); WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ALL_ERROR, info->mapbase + IFX_SSC_WHBSTATE);
@ -440,9 +440,9 @@ ifx_ssc_open (struct inode *inode, struct file *filp)
WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ALL_ERROR, info->mapbase + IFX_SSC_WHBSTATE); WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ALL_ERROR, info->mapbase + IFX_SSC_WHBSTATE);
// clear pending interrupts // clear pending interrupts
mask_and_ack_danube_irq(info->rxirq); mask_and_ack_ifxmips_irq(info->rxirq);
mask_and_ack_danube_irq(info->txirq); mask_and_ack_ifxmips_irq(info->txirq);
mask_and_ack_danube_irq(info->errirq); mask_and_ack_ifxmips_irq(info->errirq);
WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_SET_ENABLE, info->mapbase + IFX_SSC_WHBSTATE); WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_SET_ENABLE, info->mapbase + IFX_SSC_WHBSTATE);
@ -1529,5 +1529,5 @@ EXPORT_SYMBOL(ifx_ssc_rx);
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>"); MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
MODULE_DESCRIPTION("danube ssc driver"); MODULE_DESCRIPTION("ifxmips ssc driver");

74
target/linux/ifxmips/files/drivers/char/watchdog/danube_wdt.c
View File

@ -23,19 +23,19 @@
#include <linux/proc_fs.h> #include <linux/proc_fs.h>
#include <linux/ioctl.h> #include <linux/ioctl.h>
#include <linux/module.h> #include <linux/module.h>
#include <asm-mips/danube/danube_wdt.h> #include <asm-mips/ifxmips/ifxmips_wdt.h>
#include <asm-mips/danube/danube.h> #include <asm-mips/ifxmips/ifxmips.h>
// TODO remove magic numbers and weirdo macros // TODO remove magic numbers and weirdo macros
extern unsigned int danube_get_fpi_hz (void); extern unsigned int ifxmips_get_fpi_hz (void);
static int danube_wdt_inuse = 0; static int ifxmips_wdt_inuse = 0;
static int danube_wdt_major = 0; static int ifxmips_wdt_major = 0;
int int
danube_wdt_enable (unsigned int timeout) ifxmips_wdt_enable (unsigned int timeout)
{ {
unsigned int wdt_cr = 0; unsigned int wdt_cr = 0;
unsigned int wdt_reload = 0; unsigned int wdt_reload = 0;
@ -88,7 +88,7 @@ out:
} }
void void
danube_wdt_disable (void) ifxmips_wdt_disable (void)
{ {
writel(IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW1), IFXMIPS_BIU_WDT_CR); writel(IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW1), IFXMIPS_BIU_WDT_CR);
writel(IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW2), IFXMIPS_BIU_WDT_CR); writel(IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW2), IFXMIPS_BIU_WDT_CR);
@ -98,7 +98,7 @@ danube_wdt_disable (void)
/* passed LPEN or DSEN */ /* passed LPEN or DSEN */
void void
danube_wdt_enable_feature (int en, int type) ifxmips_wdt_enable_feature (int en, int type)
{ {
unsigned int wdt_cr = 0; unsigned int wdt_cr = 0;
@ -119,7 +119,7 @@ danube_wdt_enable_feature (int en, int type)
} }
void void
danube_wdt_prewarning_limit (int pwl) ifxmips_wdt_prewarning_limit (int pwl)
{ {
unsigned int wdt_cr = 0; unsigned int wdt_cr = 0;
@ -134,7 +134,7 @@ danube_wdt_prewarning_limit (int pwl)
} }
void void
danube_wdt_set_clkdiv (int clkdiv) ifxmips_wdt_set_clkdiv (int clkdiv)
{ {
unsigned int wdt_cr = 0; unsigned int wdt_cr = 0;
@ -149,7 +149,7 @@ danube_wdt_set_clkdiv (int clkdiv)
} }
static int static int
danube_wdt_ioctl (struct inode *inode, struct file *file, unsigned int cmd, ifxmips_wdt_ioctl (struct inode *inode, struct file *file, unsigned int cmd,
unsigned long arg) unsigned long arg)
{ {
int result = 0; int result = 0;
@ -167,7 +167,7 @@ danube_wdt_ioctl (struct inode *inode, struct file *file, unsigned int cmd,
switch (cmd) switch (cmd)
{ {
case IFXMIPS_WDT_IOC_START: case IFXMIPS_WDT_IOC_START:
if ((result = danube_wdt_enable(user_arg)) < 0) if ((result = ifxmips_wdt_enable(user_arg)) < 0)
timeout = -1; timeout = -1;
else else
timeout = user_arg; timeout = user_arg;
@ -175,14 +175,14 @@ danube_wdt_ioctl (struct inode *inode, struct file *file, unsigned int cmd,
case IFXMIPS_WDT_IOC_STOP: case IFXMIPS_WDT_IOC_STOP:
printk("disable watch dog timer\n"); printk("disable watch dog timer\n");
danube_wdt_disable(); ifxmips_wdt_disable();
break; break;
case IFXMIPS_WDT_IOC_PING: case IFXMIPS_WDT_IOC_PING:
if (timeout < 0) if (timeout < 0)
result = -EIO; result = -EIO;
else else
result = danube_wdt_enable(timeout); result = ifxmips_wdt_enable(timeout);
break; break;
case IFXMIPS_WDT_IOC_GET_STATUS: case IFXMIPS_WDT_IOC_GET_STATUS:
@ -191,19 +191,19 @@ danube_wdt_ioctl (struct inode *inode, struct file *file, unsigned int cmd,
break; break;
case IFXMIPS_WDT_IOC_SET_PWL: case IFXMIPS_WDT_IOC_SET_PWL:
danube_wdt_prewarning_limit(user_arg); ifxmips_wdt_prewarning_limit(user_arg);
break; break;
case IFXMIPS_WDT_IOC_SET_DSEN: case IFXMIPS_WDT_IOC_SET_DSEN:
danube_wdt_enable_feature(user_arg, IFXMIPS_BIU_WDT_CR_DSEN); ifxmips_wdt_enable_feature(user_arg, IFXMIPS_BIU_WDT_CR_DSEN);
break; break;
case IFXMIPS_WDT_IOC_SET_LPEN: case IFXMIPS_WDT_IOC_SET_LPEN:
danube_wdt_enable_feature(user_arg, IFXMIPS_BIU_WDT_CR_LPEN); ifxmips_wdt_enable_feature(user_arg, IFXMIPS_BIU_WDT_CR_LPEN);
break; break;
case IFXMIPS_WDT_IOC_SET_CLKDIV: case IFXMIPS_WDT_IOC_SET_CLKDIV:
danube_wdt_set_clkdiv(user_arg); ifxmips_wdt_set_clkdiv(user_arg);
break; break;
default: default:
@ -215,26 +215,26 @@ out:
} }
static int static int
danube_wdt_open (struct inode *inode, struct file *file) ifxmips_wdt_open (struct inode *inode, struct file *file)
{ {
if (danube_wdt_inuse) if (ifxmips_wdt_inuse)
return -EBUSY; return -EBUSY;
danube_wdt_inuse = 1; ifxmips_wdt_inuse = 1;
return 0; return 0;
} }
static int static int
danube_wdt_release (struct inode *inode, struct file *file) ifxmips_wdt_release (struct inode *inode, struct file *file)
{ {
danube_wdt_inuse = 0; ifxmips_wdt_inuse = 0;
return 0; return 0;
} }
int int
danube_wdt_register_proc_read (char *buf, char **start, off_t offset, int count, ifxmips_wdt_register_proc_read (char *buf, char **start, off_t offset, int count,
int *eof, void *data) int *eof, void *data)
{ {
int len = 0; int len = 0;
@ -252,36 +252,36 @@ danube_wdt_register_proc_read (char *buf, char **start, off_t offset, int count,
static struct file_operations wdt_fops = { static struct file_operations wdt_fops = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.ioctl = danube_wdt_ioctl, .ioctl = ifxmips_wdt_ioctl,
.open = danube_wdt_open, .open = ifxmips_wdt_open,
.release = danube_wdt_release, .release = ifxmips_wdt_release,
}; };
int __init int __init
danube_wdt_init_module (void) ifxmips_wdt_init_module (void)
{ {
danube_wdt_major = register_chrdev(0, "wdt", &wdt_fops); ifxmips_wdt_major = register_chrdev(0, "wdt", &wdt_fops);
if (danube_wdt_major < 0) if (ifxmips_wdt_major < 0)
{ {
printk("cannot register watchdog device\n"); printk("cannot register watchdog device\n");
return -EINVAL; return -EINVAL;
} }
create_proc_read_entry("danube_wdt", 0, NULL, danube_wdt_register_proc_read, NULL); create_proc_read_entry("ifxmips_wdt", 0, NULL, ifxmips_wdt_register_proc_read, NULL);
printk("danube watchdog loaded\n"); printk("ifxmips watchdog loaded\n");
return 0; return 0;
} }
void void
danube_wdt_cleanup_module (void) ifxmips_wdt_cleanup_module (void)
{ {
unregister_chrdev(danube_wdt_major, "wdt"); unregister_chrdev(ifxmips_wdt_major, "wdt");
remove_proc_entry("danube_wdt", NULL); remove_proc_entry("ifxmips_wdt", NULL);
} }
module_init(danube_wdt_init_module); module_init(ifxmips_wdt_init_module);
module_exit(danube_wdt_cleanup_module); module_exit(ifxmips_wdt_cleanup_module);

68
target/linux/ifxmips/files/drivers/net/danube_mii0.c
View File

@ -1,5 +1,5 @@
/* /*
* drivers/net/danube_mii0.c * drivers/net/ifxmips_mii0.c
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -17,7 +17,7 @@
* *
* Copyright (C) 2005 Infineon * Copyright (C) 2005 Infineon
* *
* Rewrite of Infineon Danube code, thanks to infineon for the support, * Rewrite of Infineon IFXMips code, thanks to infineon for the support,
* software and hardware * software and hardware
* *
* Copyright (C) 2007 John Crispin <blogic@openwrt.org> * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
@ -41,16 +41,16 @@
#include <asm/checksum.h> #include <asm/checksum.h>
#include <linux/init.h> #include <linux/init.h>
#include <asm/delay.h> #include <asm/delay.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
#include <asm/danube/danube_mii0.h> #include <asm/ifxmips/ifxmips_mii0.h>
#include <asm/danube/danube_dma.h> #include <asm/ifxmips/ifxmips_dma.h>
#include <asm/danube/danube_pmu.h> #include <asm/ifxmips/ifxmips_pmu.h>
static struct net_device danube_mii0_dev; static struct net_device ifxmips_mii0_dev;
static unsigned char u_boot_ethaddr[MAX_ADDR_LEN]; static unsigned char u_boot_ethaddr[MAX_ADDR_LEN];
void void
danube_write_mdio (u32 phy_addr, u32 phy_reg, u16 phy_data) ifxmips_write_mdio (u32 phy_addr, u32 phy_reg, u16 phy_data)
{ {
u32 val = MDIO_ACC_REQUEST | u32 val = MDIO_ACC_REQUEST |
((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) | ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
@ -62,7 +62,7 @@ danube_write_mdio (u32 phy_addr, u32 phy_reg, u16 phy_data)
} }
unsigned short unsigned short
danube_read_mdio (u32 phy_addr, u32 phy_reg) ifxmips_read_mdio (u32 phy_addr, u32 phy_reg)
{ {
u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ | u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ |
((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) | ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
@ -76,7 +76,7 @@ danube_read_mdio (u32 phy_addr, u32 phy_reg)
} }
int int
danube_switch_open (struct net_device *dev) ifxmips_switch_open (struct net_device *dev)
{ {
struct switch_priv* priv = (struct switch_priv*)dev->priv; struct switch_priv* priv = (struct switch_priv*)dev->priv;
struct dma_device_info* dma_dev = priv->dma_device; struct dma_device_info* dma_dev = priv->dma_device;
@ -230,12 +230,12 @@ dma_intr_handler (struct dma_device_info* dma_dev, int status)
switch (status) switch (status)
{ {
case RCV_INT: case RCV_INT:
switch_hw_receive(&danube_mii0_dev, dma_dev); switch_hw_receive(&ifxmips_mii0_dev, dma_dev);
break; break;
case TX_BUF_FULL_INT: case TX_BUF_FULL_INT:
printk("tx buffer full\n"); printk("tx buffer full\n");
netif_stop_queue(&danube_mii0_dev); netif_stop_queue(&ifxmips_mii0_dev);
for (i = 0; i < dma_dev->max_tx_chan_num; i++) for (i = 0; i < dma_dev->max_tx_chan_num; i++)
{ {
if ((dma_dev->tx_chan[i])->control==IFXMIPS_DMA_CH_ON) if ((dma_dev->tx_chan[i])->control==IFXMIPS_DMA_CH_ON)
@ -247,7 +247,7 @@ dma_intr_handler (struct dma_device_info* dma_dev, int status)
for (i = 0; i < dma_dev->max_tx_chan_num; i++) for (i = 0; i < dma_dev->max_tx_chan_num; i++)
dma_dev->tx_chan[i]->disable_irq(dma_dev->tx_chan[i]); dma_dev->tx_chan[i]->disable_irq(dma_dev->tx_chan[i]);
netif_wake_queue(&danube_mii0_dev); netif_wake_queue(&ifxmips_mii0_dev);
break; break;
} }
@ -255,7 +255,7 @@ dma_intr_handler (struct dma_device_info* dma_dev, int status)
} }
unsigned char* unsigned char*
danube_etop_dma_buffer_alloc (int len, int *byte_offset, void **opt) ifxmips_etop_dma_buffer_alloc (int len, int *byte_offset, void **opt)
{ {
unsigned char *buffer = NULL; unsigned char *buffer = NULL;
struct sk_buff *skb = NULL; struct sk_buff *skb = NULL;
@ -273,7 +273,7 @@ danube_etop_dma_buffer_alloc (int len, int *byte_offset, void **opt)
} }
void void
danube_etop_dma_buffer_free (unsigned char *dataptr, void *opt) ifxmips_etop_dma_buffer_free (unsigned char *dataptr, void *opt)
{ {
struct sk_buff *skb = NULL; struct sk_buff *skb = NULL;
@ -287,7 +287,7 @@ danube_etop_dma_buffer_free (unsigned char *dataptr, void *opt)
} }
static struct net_device_stats* static struct net_device_stats*
danube_get_stats (struct net_device *dev) ifxmips_get_stats (struct net_device *dev)
{ {
return (struct net_device_stats *)dev->priv; return (struct net_device_stats *)dev->priv;
} }
@ -303,10 +303,10 @@ switch_init (struct net_device *dev)
printk("%s up\n", dev->name); printk("%s up\n", dev->name);
dev->open = danube_switch_open; dev->open = ifxmips_switch_open;
dev->stop = switch_release; dev->stop = switch_release;
dev->hard_start_xmit = switch_tx; dev->hard_start_xmit = switch_tx;
dev->get_stats = danube_get_stats; dev->get_stats = ifxmips_get_stats;
dev->tx_timeout = switch_tx_timeout; dev->tx_timeout = switch_tx_timeout;
dev->watchdog_timeo = 10 * HZ; dev->watchdog_timeo = 10 * HZ;
dev->priv = kmalloc(sizeof(struct switch_priv), GFP_KERNEL); dev->priv = kmalloc(sizeof(struct switch_priv), GFP_KERNEL);
@ -324,8 +324,8 @@ switch_init (struct net_device *dev)
return -ENODEV; return -ENODEV;
} }
priv->dma_device->buffer_alloc = &danube_etop_dma_buffer_alloc; priv->dma_device->buffer_alloc = &ifxmips_etop_dma_buffer_alloc;
priv->dma_device->buffer_free = &danube_etop_dma_buffer_free; priv->dma_device->buffer_free = &ifxmips_etop_dma_buffer_free;
priv->dma_device->intr_handler = &dma_intr_handler; priv->dma_device->intr_handler = &dma_intr_handler;
priv->dma_device->max_rx_chan_num = 4; priv->dma_device->max_rx_chan_num = 4;
@ -371,10 +371,10 @@ switch_init (struct net_device *dev)
} }
static void static void
danube_sw_chip_init (int mode) ifxmips_sw_chip_init (int mode)
{ {
danube_pmu_enable(IFXMIPS_PMU_PWDCR_DMA); ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
danube_pmu_enable(IFXMIPS_PMU_PWDCR_PPE); ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
if(mode == REV_MII_MODE) if(mode == REV_MII_MODE)
writel((readl(IFXMIPS_PPE32_CFG) & PPE32_MII_MASK) | PPE32_MII_REVERSE, IFXMIPS_PPE32_CFG); writel((readl(IFXMIPS_PPE32_CFG) & PPE32_MII_MASK) | PPE32_MII_REVERSE, IFXMIPS_PPE32_CFG);
@ -393,21 +393,21 @@ switch_init_module(void)
{ {
int result = 0; int result = 0;
danube_mii0_dev.init = switch_init; ifxmips_mii0_dev.init = switch_init;
strcpy(danube_mii0_dev.name, "eth%d"); strcpy(ifxmips_mii0_dev.name, "eth%d");
SET_MODULE_OWNER(dev); SET_MODULE_OWNER(dev);
result = register_netdev(&danube_mii0_dev); result = register_netdev(&ifxmips_mii0_dev);
if (result) if (result)
{ {
printk("error %i registering device \"%s\"\n", result, danube_mii0_dev.name); printk("error %i registering device \"%s\"\n", result, ifxmips_mii0_dev.name);
goto out; goto out;
} }
/* danube eval kit connects the phy/switch in REV mode */ /* ifxmips eval kit connects the phy/switch in REV mode */
danube_sw_chip_init(REV_MII_MODE); ifxmips_sw_chip_init(REV_MII_MODE);
printk("danube MAC driver loaded!\n"); printk("ifxmips MAC driver loaded!\n");
out: out:
return result; return result;
@ -416,15 +416,15 @@ out:
static void __exit static void __exit
switch_cleanup(void) switch_cleanup(void)
{ {
struct switch_priv *priv = (struct switch_priv*)danube_mii0_dev.priv; struct switch_priv *priv = (struct switch_priv*)ifxmips_mii0_dev.priv;
printk("danube_mii0 cleanup\n"); printk("ifxmips_mii0 cleanup\n");
dma_device_unregister(priv->dma_device); dma_device_unregister(priv->dma_device);
dma_device_release(priv->dma_device); dma_device_release(priv->dma_device);
kfree(priv->dma_device); kfree(priv->dma_device);
kfree(danube_mii0_dev.priv); kfree(ifxmips_mii0_dev.priv);
unregister_netdev(&danube_mii0_dev); unregister_netdev(&ifxmips_mii0_dev);
return; return;
} }

176
target/linux/ifxmips/files/drivers/serial/danube_asc.c
View File

@ -48,9 +48,9 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/uaccess.h> #include <asm/uaccess.h>
#include <asm/bitops.h> #include <asm/bitops.h>
#include <asm/danube/danube.h> #include <asm/ifxmips/ifxmips.h>
#include <asm/danube/danube_irq.h> #include <asm/ifxmips/ifxmips_irq.h>
#include <asm/danube/danube_serial.h> #include <asm/ifxmips/ifxmips_serial.h>
#define PORT_IFXMIPSASC 111 #define PORT_IFXMIPSASC 111
@ -58,48 +58,48 @@
#define UART_DUMMY_UER_RX 1 #define UART_DUMMY_UER_RX 1
static void danubeasc_tx_chars(struct uart_port *port); static void ifxmipsasc_tx_chars(struct uart_port *port);
extern void prom_printf(const char * fmt, ...); extern void prom_printf(const char * fmt, ...);
static struct uart_port danubeasc_port; static struct uart_port ifxmipsasc_port;
static struct uart_driver danubeasc_reg; static struct uart_driver ifxmipsasc_reg;
static unsigned int uartclk = 0; static unsigned int uartclk = 0;
extern unsigned int danube_get_fpi_hz(void); extern unsigned int ifxmips_get_fpi_hz(void);
static void static void
danubeasc_stop_tx (struct uart_port *port) ifxmipsasc_stop_tx (struct uart_port *port)
{ {
/* fifo underrun shuts up after firing once */ /* fifo underrun shuts up after firing once */
return; return;
} }
static void static void
danubeasc_start_tx (struct uart_port *port) ifxmipsasc_start_tx (struct uart_port *port)
{ {
unsigned long flags; unsigned long flags;
local_irq_save(flags); local_irq_save(flags);
danubeasc_tx_chars(port); ifxmipsasc_tx_chars(port);
local_irq_restore(flags); local_irq_restore(flags);
return; return;
} }
static void static void
danubeasc_stop_rx (struct uart_port *port) ifxmipsasc_stop_rx (struct uart_port *port)
{ {
/* clear the RX enable bit */ /* clear the RX enable bit */
writel(ASCWHBSTATE_CLRREN, IFXMIPS_ASC1_WHBSTATE); writel(ASCWHBSTATE_CLRREN, IFXMIPS_ASC1_WHBSTATE);
} }
static void static void
danubeasc_enable_ms (struct uart_port *port) ifxmipsasc_enable_ms (struct uart_port *port)
{ {
/* no modem signals */ /* no modem signals */
return; return;
} }
static void static void
danubeasc_rx_chars (struct uart_port *port) ifxmipsasc_rx_chars (struct uart_port *port)
{ {
struct tty_struct *tty = port->info->tty; struct tty_struct *tty = port->info->tty;
unsigned int ch = 0, rsr = 0, fifocnt; unsigned int ch = 0, rsr = 0, fifocnt;
@ -157,12 +157,12 @@ danubeasc_rx_chars (struct uart_port *port)
static void static void
danubeasc_tx_chars (struct uart_port *port) ifxmipsasc_tx_chars (struct uart_port *port)
{ {
struct circ_buf *xmit = &port->info->xmit; struct circ_buf *xmit = &port->info->xmit;
if (uart_tx_stopped(port)) { if (uart_tx_stopped(port)) {
danubeasc_stop_tx(port); ifxmipsasc_stop_tx(port);
return; return;
} }
@ -189,17 +189,17 @@ danubeasc_tx_chars (struct uart_port *port)
} }
static irqreturn_t static irqreturn_t
danubeasc_tx_int (int irq, void *port) ifxmipsasc_tx_int (int irq, void *port)
{ {
writel(ASC_IRNCR_TIR, IFXMIPS_ASC1_IRNCR); writel(ASC_IRNCR_TIR, IFXMIPS_ASC1_IRNCR);
danubeasc_start_tx(port); ifxmipsasc_start_tx(port);
mask_and_ack_danube_irq(irq); mask_and_ack_ifxmips_irq(irq);
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static irqreturn_t static irqreturn_t
danubeasc_er_int (int irq, void *port) ifxmipsasc_er_int (int irq, void *port)
{ {
/* clear any pending interrupts */ /* clear any pending interrupts */
writel(readl(IFXMIPS_ASC1_WHBSTATE) | ASCWHBSTATE_CLRPE | writel(readl(IFXMIPS_ASC1_WHBSTATE) | ASCWHBSTATE_CLRPE |
@ -209,17 +209,17 @@ danubeasc_er_int (int irq, void *port)
} }
static irqreturn_t static irqreturn_t
danubeasc_rx_int (int irq, void *port) ifxmipsasc_rx_int (int irq, void *port)
{ {
writel(ASC_IRNCR_RIR, IFXMIPS_ASC1_IRNCR); writel(ASC_IRNCR_RIR, IFXMIPS_ASC1_IRNCR);
danubeasc_rx_chars((struct uart_port *) port); ifxmipsasc_rx_chars((struct uart_port *) port);
mask_and_ack_danube_irq(irq); mask_and_ack_ifxmips_irq(irq);
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static unsigned int static unsigned int
danubeasc_tx_empty (struct uart_port *port) ifxmipsasc_tx_empty (struct uart_port *port)
{ {
int status; int status;
@ -229,25 +229,25 @@ danubeasc_tx_empty (struct uart_port *port)
} }
static unsigned int static unsigned int
danubeasc_get_mctrl (struct uart_port *port) ifxmipsasc_get_mctrl (struct uart_port *port)
{ {
return TIOCM_CTS | TIOCM_CAR | TIOCM_DSR; return TIOCM_CTS | TIOCM_CAR | TIOCM_DSR;
} }
static void static void
danubeasc_set_mctrl (struct uart_port *port, u_int mctrl) ifxmipsasc_set_mctrl (struct uart_port *port, u_int mctrl)
{ {
return; return;
} }
static void static void
danubeasc_break_ctl (struct uart_port *port, int break_state) ifxmipsasc_break_ctl (struct uart_port *port, int break_state)
{ {
return; return;
} }
static void static void
danubeasc1_hw_init (void) ifxmipsasc1_hw_init (void)
{ {
/* this setup was probably already done in ROM/u-boot but we do it again*/ /* this setup was probably already done in ROM/u-boot but we do it again*/
/* TODO: GPIO pins are multifunction */ /* TODO: GPIO pins are multifunction */
@ -266,36 +266,36 @@ danubeasc1_hw_init (void)
} }
static int static int
danubeasc_startup (struct uart_port *port) ifxmipsasc_startup (struct uart_port *port)
{ {
unsigned long flags; unsigned long flags;
int retval; int retval;
/* this assumes: CON.BRS = CON.FDE = 0 */ /* this assumes: CON.BRS = CON.FDE = 0 */
if (uartclk == 0) if (uartclk == 0)
uartclk = danube_get_fpi_hz(); uartclk = ifxmips_get_fpi_hz();
danubeasc_port.uartclk = uartclk; ifxmipsasc_port.uartclk = uartclk;
danubeasc1_hw_init(); ifxmipsasc1_hw_init();
local_irq_save(flags); local_irq_save(flags);
retval = request_irq(IFXMIPSASC1_RIR, danubeasc_rx_int, IRQF_DISABLED, "asc_rx", port); retval = request_irq(IFXMIPSASC1_RIR, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
if (retval){ if (retval){
printk("failed to request danubeasc_rx_int\n"); printk("failed to request ifxmipsasc_rx_int\n");
return retval; return retval;
} }
retval = request_irq(IFXMIPSASC1_TIR, danubeasc_tx_int, IRQF_DISABLED, "asc_tx", port); retval = request_irq(IFXMIPSASC1_TIR, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
if (retval){ if (retval){
printk("failed to request danubeasc_tx_int\n"); printk("failed to request ifxmipsasc_tx_int\n");
goto err1; goto err1;
} }
retval = request_irq(IFXMIPSASC1_EIR, danubeasc_er_int, IRQF_DISABLED, "asc_er", port); retval = request_irq(IFXMIPSASC1_EIR, ifxmipsasc_er_int, IRQF_DISABLED, "asc_er", port);
if (retval){ if (retval){
printk("failed to request danubeasc_er_int\n"); printk("failed to request ifxmipsasc_er_int\n");
goto err2; goto err2;
} }
@ -317,7 +317,7 @@ err1:
} }
static void static void
danubeasc_shutdown (struct uart_port *port) ifxmipsasc_shutdown (struct uart_port *port)
{ {
free_irq(IFXMIPSASC1_RIR, port); free_irq(IFXMIPSASC1_RIR, port);
free_irq(IFXMIPSASC1_TIR, port); free_irq(IFXMIPSASC1_TIR, port);
@ -334,7 +334,7 @@ danubeasc_shutdown (struct uart_port *port)
writel(readl(IFXMIPS_ASC1_TXFCON) & ~ASCTXFCON_TXFEN, IFXMIPS_ASC1_TXFCON); writel(readl(IFXMIPS_ASC1_TXFCON) & ~ASCTXFCON_TXFEN, IFXMIPS_ASC1_TXFCON);
} }
static void danubeasc_set_termios(struct uart_port *port, struct ktermios *new, struct ktermios *old) static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new, struct ktermios *old)
{ {
unsigned int cflag; unsigned int cflag;
unsigned int iflag; unsigned int iflag;
@ -424,34 +424,34 @@ static void danubeasc_set_termios(struct uart_port *port, struct ktermios *new,
} }
static const char* static const char*
danubeasc_type (struct uart_port *port) ifxmipsasc_type (struct uart_port *port)
{ {
return port->type == PORT_IFXMIPSASC ? "IFXMIPSASC" : NULL; return port->type == PORT_IFXMIPSASC ? "IFXMIPSASC" : NULL;
} }
static void static void
danubeasc_release_port (struct uart_port *port) ifxmipsasc_release_port (struct uart_port *port)
{ {
return; return;
} }
static int static int
danubeasc_request_port (struct uart_port *port) ifxmipsasc_request_port (struct uart_port *port)
{ {
return 0; return 0;
} }
static void static void
danubeasc_config_port (struct uart_port *port, int flags) ifxmipsasc_config_port (struct uart_port *port, int flags)
{ {
if (flags & UART_CONFIG_TYPE) { if (flags & UART_CONFIG_TYPE) {
port->type = PORT_IFXMIPSASC; port->type = PORT_IFXMIPSASC;
danubeasc_request_port(port); ifxmipsasc_request_port(port);
} }
} }
static int static int
danubeasc_verify_port (struct uart_port *port, struct serial_struct *ser) ifxmipsasc_verify_port (struct uart_port *port, struct serial_struct *ser)
{ {
int ret = 0; int ret = 0;
if (ser->type != PORT_UNKNOWN && ser->type != PORT_IFXMIPSASC) if (ser->type != PORT_UNKNOWN && ser->type != PORT_IFXMIPSASC)
@ -463,26 +463,26 @@ danubeasc_verify_port (struct uart_port *port, struct serial_struct *ser)
return ret; return ret;
} }
static struct uart_ops danubeasc_pops = { static struct uart_ops ifxmipsasc_pops = {
.tx_empty = danubeasc_tx_empty, .tx_empty = ifxmipsasc_tx_empty,
.set_mctrl = danubeasc_set_mctrl, .set_mctrl = ifxmipsasc_set_mctrl,
.get_mctrl = danubeasc_get_mctrl, .get_mctrl = ifxmipsasc_get_mctrl,
.stop_tx = danubeasc_stop_tx, .stop_tx = ifxmipsasc_stop_tx,
.start_tx = danubeasc_start_tx, .start_tx = ifxmipsasc_start_tx,
.stop_rx = danubeasc_stop_rx, .stop_rx = ifxmipsasc_stop_rx,
.enable_ms = danubeasc_enable_ms, .enable_ms = ifxmipsasc_enable_ms,
.break_ctl = danubeasc_break_ctl, .break_ctl = ifxmipsasc_break_ctl,
.startup = danubeasc_startup, .startup = ifxmipsasc_startup,
.shutdown = danubeasc_shutdown, .shutdown = ifxmipsasc_shutdown,
.set_termios = danubeasc_set_termios, .set_termios = ifxmipsasc_set_termios,
.type = danubeasc_type, .type = ifxmipsasc_type,
.release_port = danubeasc_release_port, .release_port = ifxmipsasc_release_port,
.request_port = danubeasc_request_port, .request_port = ifxmipsasc_request_port,
.config_port = danubeasc_config_port, .config_port = ifxmipsasc_config_port,
.verify_port = danubeasc_verify_port, .verify_port = ifxmipsasc_verify_port,
}; };
static struct uart_port danubeasc_port = { static struct uart_port ifxmipsasc_port = {
membase: (void *)IFXMIPS_ASC1_BASE_ADDR, membase: (void *)IFXMIPS_ASC1_BASE_ADDR,
mapbase: IFXMIPS_ASC1_BASE_ADDR, mapbase: IFXMIPS_ASC1_BASE_ADDR,
iotype: SERIAL_IO_MEM, iotype: SERIAL_IO_MEM,
@ -491,12 +491,12 @@ static struct uart_port danubeasc_port = {
fifosize: 16, fifosize: 16,
unused: {IFXMIPSASC1_TIR, IFXMIPSASC1_EIR}, unused: {IFXMIPSASC1_TIR, IFXMIPSASC1_EIR},
type: PORT_IFXMIPSASC, type: PORT_IFXMIPSASC,
ops: &danubeasc_pops, ops: &ifxmipsasc_pops,
flags: ASYNC_BOOT_AUTOCONF, flags: ASYNC_BOOT_AUTOCONF,
}; };
static void static void
danubeasc_console_write (struct console *co, const char *s, u_int count) ifxmipsasc_console_write (struct console *co, const char *s, u_int count)
{ {
int i, fifocnt; int i, fifocnt;
unsigned long flags; unsigned long flags;
@ -532,7 +532,7 @@ danubeasc_console_write (struct console *co, const char *s, u_int count)
} }
static int __init static int __init
danubeasc_console_setup (struct console *co, char *options) ifxmipsasc_console_setup (struct console *co, char *options)
{ {
struct uart_port *port; struct uart_port *port;
int baud = 115200; int baud = 115200;
@ -541,11 +541,11 @@ danubeasc_console_setup (struct console *co, char *options)
int flow = 'n'; int flow = 'n';
if (uartclk == 0) if (uartclk == 0)
uartclk = danube_get_fpi_hz(); uartclk = ifxmips_get_fpi_hz();
co->index = 0; co->index = 0;
port = &danubeasc_port; port = &ifxmipsasc_port;
danubeasc_port.uartclk = uartclk; ifxmipsasc_port.uartclk = uartclk;
danubeasc_port.type = PORT_IFXMIPSASC; ifxmipsasc_port.type = PORT_IFXMIPSASC;
if (options){ if (options){
uart_parse_options(options, &baud, &parity, &bits, &flow); uart_parse_options(options, &baud, &parity, &bits, &flow);
@ -554,55 +554,55 @@ danubeasc_console_setup (struct console *co, char *options)
return uart_set_options(port, co, baud, parity, bits, flow); return uart_set_options(port, co, baud, parity, bits, flow);
} }
static struct uart_driver danubeasc_reg; static struct uart_driver ifxmipsasc_reg;
static struct console danubeasc_console = { static struct console ifxmipsasc_console = {
name: "ttyS", name: "ttyS",
write: danubeasc_console_write, write: ifxmipsasc_console_write,
device: uart_console_device, device: uart_console_device,
setup: danubeasc_console_setup, setup: ifxmipsasc_console_setup,
flags: CON_PRINTBUFFER, flags: CON_PRINTBUFFER,
index: -1, index: -1,
data: &danubeasc_reg, data: &ifxmipsasc_reg,
}; };
static int __init static int __init
danubeasc_console_init (void) ifxmipsasc_console_init (void)
{ {
register_console(&danubeasc_console); register_console(&ifxmipsasc_console);
return 0; return 0;
} }
console_initcall(danubeasc_console_init); console_initcall(ifxmipsasc_console_init);
static struct uart_driver danubeasc_reg = { static struct uart_driver ifxmipsasc_reg = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.driver_name = "serial", .driver_name = "serial",
.dev_name = "ttyS", .dev_name = "ttyS",
.major = TTY_MAJOR, .major = TTY_MAJOR,
.minor = 64, .minor = 64,
.nr = 1, .nr = 1,
.cons = &danubeasc_console, .cons = &ifxmipsasc_console,
}; };
static int __init static int __init
danubeasc_init (void) ifxmipsasc_init (void)
{ {
unsigned char res; unsigned char res;
uart_register_driver(&danubeasc_reg); uart_register_driver(&ifxmipsasc_reg);
res = uart_add_one_port(&danubeasc_reg, &danubeasc_port); res = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port);
return res; return res;
} }
static void __exit static void __exit
danubeasc_exit (void) ifxmipsasc_exit (void)
{ {
uart_unregister_driver(&danubeasc_reg); uart_unregister_driver(&ifxmipsasc_reg);
} }
module_init(danubeasc_init); module_init(ifxmipsasc_init);
module_exit(danubeasc_exit); module_exit(ifxmipsasc_exit);
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>"); MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
MODULE_DESCRIPTION("MIPS Danube serial port driver"); MODULE_DESCRIPTION("MIPS IFXMips serial port driver");
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");

38
target/linux/ifxmips/files/include/asm-mips/danube/danube_gpio.h
View File

@ -19,24 +19,24 @@
#ifndef _IFXMIPS_GPIO_H__ #ifndef _IFXMIPS_GPIO_H__
#define _IFXMIPS_GPIO_H__ #define _IFXMIPS_GPIO_H__
extern int danube_port_reserve_pin (unsigned int port, unsigned int pin); extern int ifxmips_port_reserve_pin (unsigned int port, unsigned int pin);
extern int danube_port_free_pin (unsigned int port, unsigned int pin); extern int ifxmips_port_free_pin (unsigned int port, unsigned int pin);
extern int danube_port_set_open_drain (unsigned int port, unsigned int pin); extern int ifxmips_port_set_open_drain (unsigned int port, unsigned int pin);
extern int danube_port_clear_open_drain (unsigned int port, unsigned int pin); extern int ifxmips_port_clear_open_drain (unsigned int port, unsigned int pin);
extern int danube_port_set_pudsel (unsigned int port, unsigned int pin); extern int ifxmips_port_set_pudsel (unsigned int port, unsigned int pin);
extern int danube_port_clear_pudsel (unsigned int port, unsigned int pin); extern int ifxmips_port_clear_pudsel (unsigned int port, unsigned int pin);
extern int danube_port_set_puden (unsigned int port, unsigned int pin); extern int ifxmips_port_set_puden (unsigned int port, unsigned int pin);
extern int danube_port_clear_puden (unsigned int port, unsigned int pin); extern int ifxmips_port_clear_puden (unsigned int port, unsigned int pin);
extern int danube_port_set_stoff (unsigned int port, unsigned int pin); extern int ifxmips_port_set_stoff (unsigned int port, unsigned int pin);
extern int danube_port_clear_stoff (unsigned int port, unsigned int pin); extern int ifxmips_port_clear_stoff (unsigned int port, unsigned int pin);
extern int danube_port_set_dir_out (unsigned int port, unsigned int pin); extern int ifxmips_port_set_dir_out (unsigned int port, unsigned int pin);
extern int danube_port_set_dir_in (unsigned int port, unsigned int pin); extern int ifxmips_port_set_dir_in (unsigned int port, unsigned int pin);
extern int danube_port_set_output (unsigned int port, unsigned int pin); extern int ifxmips_port_set_output (unsigned int port, unsigned int pin);
extern int danube_port_clear_output (unsigned int port, unsigned int pin); extern int ifxmips_port_clear_output (unsigned int port, unsigned int pin);
extern int danube_port_get_input (unsigned int port, unsigned int pin); extern int ifxmips_port_get_input (unsigned int port, unsigned int pin);
extern int danube_port_set_altsel0 (unsigned int port, unsigned int pin); extern int ifxmips_port_set_altsel0 (unsigned int port, unsigned int pin);
extern int danube_port_clear_altsel0 (unsigned int port, unsigned int pin); extern int ifxmips_port_clear_altsel0 (unsigned int port, unsigned int pin);
extern int danube_port_set_altsel1 (unsigned int port, unsigned int pin); extern int ifxmips_port_set_altsel1 (unsigned int port, unsigned int pin);
extern int danube_port_clear_altsel1 (unsigned int port, unsigned int pin); extern int ifxmips_port_clear_altsel1 (unsigned int port, unsigned int pin);
#endif #endif

20
target/linux/ifxmips/files/include/asm-mips/danube/danube_ioctl.h
View File

@ -21,7 +21,7 @@
/*------------ LED */ /*------------ LED */
struct danube_port_ioctl_parm struct ifxmips_port_ioctl_parm
{ {
int port; int port;
int pin; int pin;
@ -29,14 +29,14 @@ struct danube_port_ioctl_parm
}; };
#define IFXMIPS_PORT_IOC_MAGIC 0xbf #define IFXMIPS_PORT_IOC_MAGIC 0xbf
#define IFXMIPS_PORT_IOCOD _IOW(IFXMIPS_PORT_IOC_MAGIC,0,struct danube_port_ioctl_parm) #define IFXMIPS_PORT_IOCOD _IOW(IFXMIPS_PORT_IOC_MAGIC,0,struct ifxmips_port_ioctl_parm)
#define IFXMIPS_PORT_IOCPUDSEL _IOW(IFXMIPS_PORT_IOC_MAGIC,1,struct danube_port_ioctl_parm) #define IFXMIPS_PORT_IOCPUDSEL _IOW(IFXMIPS_PORT_IOC_MAGIC,1,struct ifxmips_port_ioctl_parm)
#define IFXMIPS_PORT_IOCPUDEN _IOW(IFXMIPS_PORT_IOC_MAGIC,2,struct danube_port_ioctl_parm) #define IFXMIPS_PORT_IOCPUDEN _IOW(IFXMIPS_PORT_IOC_MAGIC,2,struct ifxmips_port_ioctl_parm)
#define IFXMIPS_PORT_IOCSTOFF _IOW(IFXMIPS_PORT_IOC_MAGIC,3,struct danube_port_ioctl_parm) #define IFXMIPS_PORT_IOCSTOFF _IOW(IFXMIPS_PORT_IOC_MAGIC,3,struct ifxmips_port_ioctl_parm)
#define IFXMIPS_PORT_IOCDIR _IOW(IFXMIPS_PORT_IOC_MAGIC,4,struct danube_port_ioctl_parm) #define IFXMIPS_PORT_IOCDIR _IOW(IFXMIPS_PORT_IOC_MAGIC,4,struct ifxmips_port_ioctl_parm)
#define IFXMIPS_PORT_IOCOUTPUT _IOW(IFXMIPS_PORT_IOC_MAGIC,5,struct danube_port_ioctl_parm) #define IFXMIPS_PORT_IOCOUTPUT _IOW(IFXMIPS_PORT_IOC_MAGIC,5,struct ifxmips_port_ioctl_parm)
#define IFXMIPS_PORT_IOCINPUT _IOWR(IFXMIPS_PORT_IOC_MAGIC,6,struct danube_port_ioctl_parm) #define IFXMIPS_PORT_IOCINPUT _IOWR(IFXMIPS_PORT_IOC_MAGIC,6,struct ifxmips_port_ioctl_parm)
#define IFXMIPS_PORT_IOCALTSEL0 _IOW(IFXMIPS_PORT_IOC_MAGIC,7,struct danube_port_ioctl_parm) #define IFXMIPS_PORT_IOCALTSEL0 _IOW(IFXMIPS_PORT_IOC_MAGIC,7,struct ifxmips_port_ioctl_parm)
#define IFXMIPS_PORT_IOCALTSEL1 _IOW(IFXMIPS_PORT_IOC_MAGIC,8,struct danube_port_ioctl_parm) #define IFXMIPS_PORT_IOCALTSEL1 _IOW(IFXMIPS_PORT_IOC_MAGIC,8,struct ifxmips_port_ioctl_parm)
#endif #endif

2
target/linux/ifxmips/files/include/asm-mips/danube/danube_irq.h
View File

@ -61,6 +61,6 @@
#define IFXMIPS_DMA_CH18_INT (INT_NUM_IM2_IRL0 + 16) #define IFXMIPS_DMA_CH18_INT (INT_NUM_IM2_IRL0 + 16)
#define IFXMIPS_DMA_CH19_INT (INT_NUM_IM2_IRL0 + 21) #define IFXMIPS_DMA_CH19_INT (INT_NUM_IM2_IRL0 + 21)
extern void mask_and_ack_danube_irq (unsigned int irq_nr); extern void mask_and_ack_ifxmips_irq (unsigned int irq_nr);
#endif #endif

4
target/linux/ifxmips/files/include/asm-mips/danube/danube_mii0.h
View File

@ -5,8 +5,8 @@
/****************************************************************************** /******************************************************************************
** **
** FILE NAME : danube_sw.h ** FILE NAME : ifxmips_sw.h
** PROJECT : Danube ** PROJECT : IFXMips
** MODULES : ETH Interface (MII0) ** MODULES : ETH Interface (MII0)
** **
** DATE : 11 AUG 2005 ** DATE : 11 AUG 2005

4
target/linux/ifxmips/files/include/asm-mips/danube/danube_pmu.h
View File

@ -25,7 +25,7 @@
#define IFXMIPS_PMU_PWDCR_PPE 0x2000 #define IFXMIPS_PMU_PWDCR_PPE 0x2000
#define IFXMIPS_PMU_PWDCR_FPI 0x4000 #define IFXMIPS_PMU_PWDCR_FPI 0x4000
void danube_pmu_enable (unsigned int module); void ifxmips_pmu_enable (unsigned int module);
void danube_pmu_disable (unsigned int module); void ifxmips_pmu_disable (unsigned int module);
#endif #endif

2
target/linux/ifxmips/files/include/asm-mips/danube/danube_serial.h
View File

@ -6,7 +6,7 @@
/****************************************************************************** /******************************************************************************
** **
** FILE NAME : serial.c ** FILE NAME : serial.c
** PROJECT : Danube ** PROJECT : IFXMips
** MODULES : ASC/UART ** MODULES : ASC/UART
** **
** DATE : 27 MAR 2006 ** DATE : 27 MAR 2006

2
target/linux/ifxmips/files/include/asm-mips/danube/danube_wdt.h
View File

@ -21,7 +21,7 @@
#ifndef IFXMIPS_WDT_H #ifndef IFXMIPS_WDT_H
#define IFXMIPS_WDT_H #define IFXMIPS_WDT_H
/* Danube wdt ioctl control */ /* IFXMips wdt ioctl control */
#define IFXMIPS_WDT_IOC_MAGIC 0xc0 #define IFXMIPS_WDT_IOC_MAGIC 0xc0
#define IFXMIPS_WDT_IOC_START _IOW(IFXMIPS_WDT_IOC_MAGIC, 0, int) #define IFXMIPS_WDT_IOC_START _IOW(IFXMIPS_WDT_IOC_MAGIC, 0, int)
#define IFXMIPS_WDT_IOC_STOP _IO(IFXMIPS_WDT_IOC_MAGIC, 1) #define IFXMIPS_WDT_IOC_STOP _IO(IFXMIPS_WDT_IOC_MAGIC, 1)

2
target/linux/ifxmips/files/include/asm-mips/danube/ifx_ssc.h
View File

@ -9,7 +9,7 @@
#ifndef __IFX_SSC_H #ifndef __IFX_SSC_H
#define __IFX_SSC_H #define __IFX_SSC_H
#ifdef __KERNEL__ #ifdef __KERNEL__
#include <asm/danube/ifx_ssc_defines.h> #include <asm/ifxmips/ifx_ssc_defines.h>
#endif //__KERNEL__ #endif //__KERNEL__
#define PORT_CNT 1 // assume default value #define PORT_CNT 1 // assume default value

8
target/linux/ifxmips/patches/100-board.patch
View File

@ -7,7 +7,7 @@ Index: linux-2.6.23/arch/mips/Kconfig
select GENERIC_HARDIRQS_NO__DO_IRQ select GENERIC_HARDIRQS_NO__DO_IRQ
+config IFXMIPS +config IFXMIPS
+ bool "Danube support" + bool "IFXMips support"
+ select DMA_NONCOHERENT + select DMA_NONCOHERENT
+ select IRQ_CPU + select IRQ_CPU
+ select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R1
@ -24,7 +24,7 @@ Index: linux-2.6.23/arch/mips/Kconfig
source "arch/mips/tx4927/Kconfig" source "arch/mips/tx4927/Kconfig"
source "arch/mips/tx4938/Kconfig" source "arch/mips/tx4938/Kconfig"
source "arch/mips/vr41xx/Kconfig" source "arch/mips/vr41xx/Kconfig"
+source "arch/mips/danube/Kconfig" +source "arch/mips/ifxmips/Kconfig"
endmenu endmenu
@ -39,8 +39,8 @@ Index: linux-2.6.23/arch/mips/Makefile
+# +#
+# Infineon IFXMIPS +# Infineon IFXMIPS
+# +#
+core-$(CONFIG_IFXMIPS) += arch/mips/danube/ +core-$(CONFIG_IFXMIPS) += arch/mips/ifxmips/
+cflags-$(CONFIG_IFXMIPS) += -Iinclude/asm-mips/mach-danube +cflags-$(CONFIG_IFXMIPS) += -Iinclude/asm-mips/mach-ifxmips
+load-$(CONFIG_IFXMIPS) += 0xffffffff80002000 +load-$(CONFIG_IFXMIPS) += 0xffffffff80002000
+ +
# #

28
target/linux/ifxmips/patches/110-drivers.patch
View File

@ -7,10 +7,10 @@ Index: linux-2.6.23/drivers/serial/Kconfig
others can easily be added. others can easily be added.
+config SERIAL_IFXMIPS +config SERIAL_IFXMIPS
+ bool "Danube serial driver" + bool "IFXMips serial driver"
+ depends on IFXMIPS + depends on IFXMIPS
+ help + help
+ Driver for the danubes built in ASC hardware + Driver for the ifxmipss built in ASC hardware
+ +
endmenu endmenu
Index: linux-2.6.23/drivers/serial/Makefile Index: linux-2.6.23/drivers/serial/Makefile
@ -21,7 +21,7 @@ Index: linux-2.6.23/drivers/serial/Makefile
obj-$(CONFIG_SERIAL_NETX) += netx-serial.o obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o
obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
+obj-$(CONFIG_SERIAL_IFXMIPS) += danube_asc.o +obj-$(CONFIG_SERIAL_IFXMIPS) += ifxmips_asc.o
Index: linux-2.6.23/drivers/mtd/maps/Makefile Index: linux-2.6.23/drivers/mtd/maps/Makefile
=================================================================== ===================================================================
--- linux-2.6.23.orig/drivers/mtd/maps/Makefile 2007-12-13 20:41:42.000000000 +0100 --- linux-2.6.23.orig/drivers/mtd/maps/Makefile 2007-12-13 20:41:42.000000000 +0100
@ -30,7 +30,7 @@ Index: linux-2.6.23/drivers/mtd/maps/Makefile
obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
obj-$(CONFIG_MTD_TQM834x) += tqm834x.o obj-$(CONFIG_MTD_TQM834x) += tqm834x.o
+obj-$(CONFIG_MTD_IFXMIPS) += danube.o +obj-$(CONFIG_MTD_IFXMIPS) += ifxmips.o
Index: linux-2.6.23/drivers/net/Kconfig Index: linux-2.6.23/drivers/net/Kconfig
=================================================================== ===================================================================
--- linux-2.6.23.orig/drivers/net/Kconfig 2007-12-13 20:41:42.000000000 +0100 --- linux-2.6.23.orig/drivers/net/Kconfig 2007-12-13 20:41:42.000000000 +0100
@ -40,16 +40,16 @@ Index: linux-2.6.23/drivers/net/Kconfig
source "drivers/net/arm/Kconfig" source "drivers/net/arm/Kconfig"
+config IFXMIPS_MII0 +config IFXMIPS_MII0
+ tristate "Infineon Danube eth0 driver" + tristate "Infineon IFXMips eth0 driver"
+ depends on IFXMIPS + depends on IFXMIPS
+ help + help
+ Support for the MII0 inside the Danube SOC + Support for the MII0 inside the IFXMips SOC
+ +
+config IFXMIPS_MII1 +config IFXMIPS_MII1
+ tristate "Infineon Danube eth1 driver" + tristate "Infineon IFXMips eth1 driver"
+ depends on IFXMIPS + depends on IFXMIPS
+ help + help
+ Support for the MII1 inside the Danube SOC + Support for the MII1 inside the IFXMips SOC
+ +
config AX88796 config AX88796
tristate "ASIX AX88796 NE2000 clone support" tristate "ASIX AX88796 NE2000 clone support"
@ -62,7 +62,7 @@ Index: linux-2.6.23/drivers/net/Makefile
obj-$(CONFIG_FEC_8XX) += fec_8xx/ obj-$(CONFIG_FEC_8XX) += fec_8xx/
obj-$(CONFIG_PASEMI_MAC) += pasemi_mac.o obj-$(CONFIG_PASEMI_MAC) += pasemi_mac.o
obj-$(CONFIG_MLX4_CORE) += mlx4/ obj-$(CONFIG_MLX4_CORE) += mlx4/
+obj-$(CONFIG_IFXMIPS_MII0) += danube_mii0.o +obj-$(CONFIG_IFXMIPS_MII0) += ifxmips_mii0.o
obj-$(CONFIG_MACB) += macb.o obj-$(CONFIG_MACB) += macb.o
@ -74,7 +74,7 @@ Index: linux-2.6.23/drivers/char/watchdog/Makefile
obj-$(CONFIG_INDYDOG) += indydog.o obj-$(CONFIG_INDYDOG) += indydog.o
obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
+obj-$(CONFIG_IFXMIPS_WDT) += danube_wdt.o +obj-$(CONFIG_IFXMIPS_WDT) += ifxmips_wdt.o
# PARISC Architecture # PARISC Architecture
@ -87,7 +87,7 @@ Index: linux-2.6.23/drivers/char/Makefile
endif endif
+ +
+obj-$(CONFIG_IFXMIPS_LED) += danube_led.o +obj-$(CONFIG_IFXMIPS_LED) += ifxmips_led.o
+obj-$(CONFIG_IFXMIPS_GPIO) += danube_gpio.o +obj-$(CONFIG_IFXMIPS_GPIO) += ifxmips_gpio.o
+obj-$(CONFIG_IFXMIPS_SSC) += danube_ssc.o +obj-$(CONFIG_IFXMIPS_SSC) += ifxmips_ssc.o
+obj-$(CONFIG_IFXMIPS_EEPROM) += danube_eeprom.o +obj-$(CONFIG_IFXMIPS_EEPROM) += ifxmips_eeprom.o