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ipq40xx: add support for Wallystech DR40x9
Adds support for the Wallys DR40x9 series boards. They come in IPQ4019 and IPQ4029 versions. IPQ4019/4029 only differ in that that IPQ4029 is the industrial version that is rated to higher temperatures. Specifications are: * CPU: Qualcomm IPQ40x9 (4x ARMv7A Cortex A7) at 716 MHz * RAM: 512 MB * Storage: 2MB of SPI-NOR, 128 MB of parallel NAND * USB 3.0 TypeA port for users * MiniPCI-E with PCI-E 2.0 link * MiniPCI-E for LTE modems with only USB2.0 link * 2 SIM card slots that are selected via GPIO11 * MicroSD card slot * Ethernet: 2x GBe with 24~48V passive POE * SFP port (Does not work, I2C and GPIO's not connected on hardware) * DC Jack * UART header * WLAN: In-SoC 2x2 802.11b/g/n and 2x2 802.11a/n/ac * 4x MMCX connectors for WLAN * Reset button * 8x LED-s Installation instructions: Connect to UART, pins are like this: -> 3.3V | TX | RX | GND Settings are 115200 8n1 Boot initramfs from TFTP: tftpboot 0x84000000 openwrt-ipq40xx-generic-wallys_dr40x9-initramfs-fit-uImage.itb bootm Then copy the sysupgrade image to the /tmp folder and execute sysupgrade -n <image_name> The board file binary was provided from Wallystech on March 14th 2023 including full permission to use and distribute. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Koen Vandeputte <koen.vandeputte@citymesh.com>
This commit is contained in:
Robert Marko
Koen Vandeputte
parent
7699a5b1d7
commit
eb564690c9
@ -54,6 +54,7 @@ ALLWIFIBOARDS:= \
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redmi_ax6 \
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sony_ncp-hg100-cellular \
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teltonika_rutx \
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wallys_dr40x9 \
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xiaomi_ax3600 \
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xiaomi_ax9000 \
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zte_mf18a \
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@ -158,6 +159,7 @@ $(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac-c2,Qxwlan E2600AC C2))
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$(eval $(call generate-ipq-wifi-package,redmi_ax6,Redmi AX6))
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$(eval $(call generate-ipq-wifi-package,sony_ncp-hg100-cellular,Sony NCP-HG100/Cellular))
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$(eval $(call generate-ipq-wifi-package,teltonika_rutx,Teltonika RUTX))
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$(eval $(call generate-ipq-wifi-package,wallys_dr40x9,Wallys DR40X9))
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$(eval $(call generate-ipq-wifi-package,xiaomi_ax3600,Xiaomi AX3600))
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$(eval $(call generate-ipq-wifi-package,xiaomi_ax9000,Xiaomi AX9000))
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$(eval $(call generate-ipq-wifi-package,zte_mf18a,ZTE MF18A))
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@ -39,6 +39,7 @@ ipq40xx_setup_interfaces()
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mikrotik,cap-ac|\
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netgear,wac510|\
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sony,ncp-hg100-cellular|\
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wallys,dr40x9|\
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zte,mf18a|\
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zte,mf289f)
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ucidef_set_interfaces_lan_wan "lan" "wan"
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@ -32,6 +32,9 @@ mikrotik,hap-ac3-lte6-kit)
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sony,ncp-hg100-cellular)
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ucidef_add_gpio_switch "uart_dbgcon_en" "debug console enable" "427" "1"
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;;
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wallys,dr40x9)
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ucidef_add_gpio_switch "sim_card_select" "SIM card select" "423" "0"
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;;
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zte,mf286d|\
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zte,mf289f)
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ucidef_add_gpio_switch "power_btn_block" "Power button blocker" "421" "0"
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@ -119,7 +119,8 @@ platform_do_upgrade() {
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netgear,wac510 |\
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p2w,r619ac-64m |\
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p2w,r619ac-128m |\
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qxwlan,e2600ac-c2)
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qxwlan,e2600ac-c2 |\
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wallys,dr40x9)
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nand_do_upgrade "$1"
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;;
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glinet,gl-b2200)
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@ -0,0 +1,422 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "qcom-ipq4019.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/soc/qcom,tcsr.h>
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/ {
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model = "Wallystech DR40X9";
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compatible = "wallys,dr40x9";
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chosen {
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bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
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};
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soc {
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counter@4a1000 {
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compatible = "qcom,qca-gcnt";
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reg = <0x4a1000 0x4>;
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};
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tcsr@1949000 {
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compatible = "qcom,tcsr";
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reg = <0x1949000 0x100>;
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qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
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};
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tcsr@194b000 {
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status = "okay";
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/* select hostmode */
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compatible = "qcom,tcsr";
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reg = <0x194b000 0x100>;
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qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
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};
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ess_tcsr@1953000 {
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compatible = "qcom,tcsr";
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reg = <0x1953000 0x1000>;
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qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
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};
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tcsr@1957000 {
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compatible = "qcom,tcsr";
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reg = <0x1957000 0x100>;
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qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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wlan2g {
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label = "dr4029:green:wlan2g";
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gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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wlan5g {
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label = "dr4029:green:wlan5g";
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gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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wlan2g-strength {
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label = "dr4029:green:wlan2g-strength";
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gpios = <&tlmm 36 GPIO_ACTIVE_LOW>;
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};
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wlan5g-strength {
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label = "dr4029:green:wlan5g-strength";
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gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&tlmm {
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mdio_pins: mdio_pinmux {
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mux_1 {
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pins = "gpio6";
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function = "mdio";
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bias-pull-up;
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};
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mux_2 {
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pins = "gpio7";
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function = "mdc";
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bias-pull-up;
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};
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};
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serial0_pins: serial0_pinmux {
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mux {
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pins = "gpio16", "gpio17";
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function = "blsp_uart0";
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bias-disable;
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};
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};
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serial1_pins: serial1_pinmux {
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mux {
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pins = "gpio8", "gpio9";
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function = "blsp_uart1";
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bias-disable;
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};
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};
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spi_0_pins: spi_0_pinmux {
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pinmux {
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function = "blsp_spi0";
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pins = "gpio13", "gpio14", "gpio15";
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drive-strength = <12>;
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bias-disable;
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};
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pinmux_cs {
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function = "gpio";
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pins = "gpio12";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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nand_pins: nand_pins {
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pullups {
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pins = "gpio52", "gpio53", "gpio58", "gpio59";
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function = "qpic";
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bias-pull-up;
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};
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pulldowns {
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pins = "gpio54", "gpio55", "gpio56", "gpio57",
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"gpio60", "gpio62", "gpio63", "gpio64",
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"gpio65", "gpio66", "gpio67", "gpio68",
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"gpio69";
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function = "qpic";
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bias-pull-down;
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};
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};
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sd_pins: sd_pins {
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pinmux {
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function = "sdio";
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pins = "gpio23", "gpio24", "gpio25", "gpio26",
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"gpio28", "gpio29", "gpio30", "gpio31";
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drive-strength = <10>;
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};
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pinmux_sd_clk {
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function = "sdio";
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pins = "gpio27";
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drive-strength = <16>;
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};
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pinmux_sd7 {
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function = "sdio";
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pins = "gpio32";
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drive-strength = <10>;
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bias-disable;
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};
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};
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};
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&blsp_dma {
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status = "okay";
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};
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&blsp1_spi1 {
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status = "okay";
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
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flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <24000000>;
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reg = <0>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition0@0 {
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label = "0:SBL1";
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reg = <0x00000000 0x00040000>;
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read-only;
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};
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partition1@40000 {
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label = "0:MIBIB";
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reg = <0x00040000 0x00020000>;
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read-only;
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};
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partition2@60000 {
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label = "0:QSEE";
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reg = <0x00060000 0x00060000>;
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read-only;
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};
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partition3@c0000 {
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label = "0:CDT";
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reg = <0x000c0000 0x00010000>;
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read-only;
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};
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partition4@d0000 {
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label = "0:DDRPARAMS";
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reg = <0x000d0000 0x00010000>;
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read-only;
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};
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partition5@e0000 {
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label = "0:APPSBLENV"; /* uboot env */
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reg = <0x000e0000 0x00010000>;
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read-only;
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};
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partition6@f0000 {
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label = "0:APPSBL"; /* uboot */
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reg = <0x000f0000 0x00080000>;
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read-only;
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};
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partition7@170000 {
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label = "0:ART";
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reg = <0x00170000 0x00010000>;
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read-only;
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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precal_art_1000: precal@1000 {
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reg = <0x1000 0x2f20>;
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};
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precal_art_5000: precal@5000 {
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reg = <0x5000 0x2f20>;
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};
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macaddr_art_0: mac-address@0 {
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reg = <0x0 0x6>;
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};
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macaddr_art_6: mac-address@6 {
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reg = <0x6 0x6>;
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};
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macaddr_art_1006: mac-address@1006 {
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reg = <0x1006 0x6>;
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};
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macaddr_art_5006: mac-address@5006 {
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reg = <0x5006 0x6>;
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};
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};
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partition8@180000 {
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label = "0:CONFIG";
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reg = <0x00180000 0x00010000>;
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read-only;
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};
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};
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};
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};
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&qpic_bam {
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status = "okay";
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};
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&nand {
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status = "okay";
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pinctrl-0 = <&nand_pins>;
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pinctrl-names = "default";
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nand@0 {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "ubi";
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reg = <0x00000000 0x04000000>;
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};
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};
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};
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};
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&blsp1_uart1 {
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status = "okay";
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pinctrl-0 = <&serial0_pins>;
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pinctrl-names = "default";
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};
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&blsp1_uart2 {
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status = "okay";
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pinctrl-0 = <&serial1_pins>;
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pinctrl-names = "default";
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};
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&crypto {
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status = "okay";
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};
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&cryptobam {
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num-channels = <4>;
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qcom,num-ees = <2>;
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status = "okay";
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};
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&mdio {
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status = "okay";
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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reset-gpios = <&tlmm 41 GPIO_ACTIVE_LOW>;
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reset-delay-us = <2000>;
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};
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&pcie0 {
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status = "okay";
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perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
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wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
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/* Unpolulated slot */
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bridge@0,0 {
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reg = <0x00000000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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};
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};
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&vqmmc {
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status = "okay";
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};
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&sdhci {
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status = "okay";
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pinctrl-0 = <&sd_pins>;
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pinctrl-names = "default";
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cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
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vqmmc-supply = <&vqmmc>;
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};
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&gmac {
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status = "okay";
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};
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&switch {
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status = "okay";
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};
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&swport4 {
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status = "okay";
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label = "wan";
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nvmem-cells = <&macaddr_art_0>;
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nvmem-cell-names = "mac-address";
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};
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&swport5 {
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status = "okay";
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label = "lan";
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nvmem-cells = <&macaddr_art_6>;
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nvmem-cell-names = "mac-address";
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};
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&wifi0 {
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status = "okay";
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nvmem-cells = <&precal_art_1000>, <&macaddr_art_1006>;
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nvmem-cell-names = "pre-calibration", "mac-address";
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qcom,ath10k-calibration-variant = "Wallys-DR40X9";
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};
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&wifi1 {
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status = "okay";
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nvmem-cell-names = "pre-calibration", "mac-address";
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nvmem-cells = <&precal_art_5000>, <&macaddr_art_5006>;
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qcom,ath10k-calibration-variant = "Wallys-DR40X9";
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};
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&usb2 {
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status = "okay";
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};
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&usb2_hs_phy {
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status = "okay";
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};
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&usb3 {
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status = "okay";
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};
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&usb3_ss_phy {
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status = "okay";
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};
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&usb3_hs_phy {
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status = "okay";
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};
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&prng {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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@ -1122,6 +1122,19 @@ endef
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# Missing DSA Setup
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#TARGET_DEVICES += unielec_u4019-32m
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define Device/wallys_dr40x9
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$(call Device/FitImage)
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$(call Device/UbiFit)
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DEVICE_VENDOR := Wallys
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DEVICE_MODEL := DR40X9
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SOC := qcom-ipq40x9
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DEVICE_DTS_CONFIG := config@ap.dk07.1-c1
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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DEVICE_PACKAGES := ipq-wifi-wallys_dr40x9
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endef
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TARGET_DEVICES += wallys_dr40x9
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define Device/zte_mf18a
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$(call Device/FitImage)
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DEVICE_VENDOR := ZTE
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