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ipq806x: 5.15: add krait clock modernization patch
Backport krait clock modernization patch. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Christian Marangi
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a7c7a3c009
commit
e5a3720a56
@ -0,0 +1,46 @@
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From e4cacac0cae3ce7399b70df3bce92eac03151624 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Tue, 12 Apr 2022 16:48:39 +0200
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Subject: [PATCH 3/4] clk: introduce (devm_)hw_register_mux_parent_data_table
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API
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Introduce (devm_)hw_register_mux_parent_data_table new API. We have
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basic support for clk_register_mux using parent_data but we lack any API
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to provide a custom parent_map. Add these 2 new API to correctly handle
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these special configuration instead of using the generic
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__(devm_)clk_hw_register_mux API.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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include/linux/clk-provider.h | 14 ++++++++++++++
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1 file changed, 14 insertions(+)
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--- a/include/linux/clk-provider.h
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+++ b/include/linux/clk-provider.h
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@@ -932,12 +932,26 @@ struct clk *clk_register_mux_table(struc
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__clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL, NULL, \
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(parent_data), (flags), (reg), (shift), \
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BIT((width)) - 1, (clk_mux_flags), NULL, (lock))
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+#define clk_hw_register_mux_parent_data_table(dev, name, parent_data, \
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+ num_parents, flags, reg, shift, \
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+ width, clk_mux_flags, table, \
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+ lock) \
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+ __clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL, NULL, \
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+ (parent_data), (flags), (reg), (shift), \
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+ BIT((width)) - 1, (clk_mux_flags), table, (lock))
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#define devm_clk_hw_register_mux(dev, name, parent_names, num_parents, flags, reg, \
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shift, width, clk_mux_flags, lock) \
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__devm_clk_hw_register_mux((dev), NULL, (name), (num_parents), \
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(parent_names), NULL, NULL, (flags), (reg), \
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(shift), BIT((width)) - 1, (clk_mux_flags), \
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NULL, (lock))
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+#define devm_clk_hw_register_mux_parent_data_table(dev, name, parent_data, \
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+ num_parents, flags, reg, shift, \
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+ width, clk_mux_flags, table, \
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+ lock) \
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+ __devm_clk_hw_register_mux((dev), NULL, (name), (num_parents), NULL, \
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+ NULL, (parent_data), (flags), (reg), (shift), \
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+ BIT((width)) - 1, (clk_mux_flags), table, (lock))
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int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags,
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unsigned int val);
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@ -0,0 +1,70 @@
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From d08c79b818767f24c3c9cbba585d8a3ec896c1a1 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Thu, 17 Feb 2022 22:43:34 +0100
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Subject: [PATCH 4/4] clk: qcom: kpss-xcc: convert to parent data API
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Convert the driver to parent data API. From the Documentation pll8_vote
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and pxo should be declared in the DTS so fw_name can be used instead of
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parent_names. Name is still used to save regression on old definition.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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drivers/clk/qcom/kpss-xcc.c | 26 +++++++++-----------------
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1 file changed, 9 insertions(+), 17 deletions(-)
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--- a/drivers/clk/qcom/kpss-xcc.c
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+++ b/drivers/clk/qcom/kpss-xcc.c
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@@ -12,9 +12,9 @@
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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-static const char *aux_parents[] = {
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- "pll8_vote",
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- "pxo",
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+static const struct clk_parent_data aux_parents[] = {
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+ { .name = "pll8_vote", .fw_name = "pll8_vote" },
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+ { .name = "pxo", .fw_name = "pxo" },
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};
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static unsigned int aux_parent_map[] = {
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@@ -32,9 +32,9 @@ MODULE_DEVICE_TABLE(of, kpss_xcc_match_t
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static int kpss_xcc_driver_probe(struct platform_device *pdev)
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{
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const struct of_device_id *id;
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- struct clk *clk;
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struct resource *res;
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void __iomem *base;
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+ struct clk_hw *hw;
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const char *name;
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id = of_match_device(kpss_xcc_match_table, &pdev->dev);
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@@ -57,24 +57,16 @@ static int kpss_xcc_driver_probe(struct
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base += 0x28;
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}
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- clk = clk_register_mux_table(&pdev->dev, name, aux_parents,
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- ARRAY_SIZE(aux_parents), 0, base, 0, 0x3,
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- 0, aux_parent_map, NULL);
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+ hw = devm_clk_hw_register_mux_parent_data_table(&pdev->dev, name, aux_parents,
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+ ARRAY_SIZE(aux_parents), 0,
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+ base, 0, 0x3,
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+ 0, aux_parent_map, NULL);
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- platform_set_drvdata(pdev, clk);
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-
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- return PTR_ERR_OR_ZERO(clk);
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-}
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-
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-static int kpss_xcc_driver_remove(struct platform_device *pdev)
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-{
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- clk_unregister_mux(platform_get_drvdata(pdev));
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- return 0;
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+ return PTR_ERR_OR_ZERO(hw);
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}
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static struct platform_driver kpss_xcc_driver = {
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.probe = kpss_xcc_driver_probe,
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- .remove = kpss_xcc_driver_remove,
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.driver = {
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.name = "kpss-xcc",
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.of_match_table = kpss_xcc_match_table,
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@ -0,0 +1,59 @@
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From 3a0cf0a2b99fb3d193d72e3804292697d73d3aab Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Tue, 5 Jul 2022 21:29:01 +0200
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Subject: [PATCH v2 2/4] ARM: DTS: qcom: add rpmcc missing clocks for
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apq/ipq8064 and msm8660
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Add missing rpmcc pxo and cxo clock for apq8064, ipq8064 and
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msm8660 dtsi.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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---
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arch/arm/boot/dts/qcom-apq8064.dtsi | 2 ++
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arch/arm/boot/dts/qcom-ipq8064.dtsi | 2 ++
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arch/arm/boot/dts/qcom-msm8660.dtsi | 4 +++-
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3 files changed, 7 insertions(+), 1 deletion(-)
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--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
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@@ -862,6 +862,8 @@
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rpmcc: clock-controller {
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compatible = "qcom,rpmcc-apq8064", "qcom,rpmcc";
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#clock-cells = <1>;
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+ clocks = <&pxo_board>, <&cxo_board>;
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+ clock-names = "pxo", "cxo";
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};
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regulators {
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -1074,6 +1074,8 @@
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rpmcc: clock-controller {
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compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
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#clock-cells = <1>;
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+ clocks = <&pxo_board>;
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+ clock-names = "pxo";
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};
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};
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--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
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+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
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@@ -56,7 +56,7 @@
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clock-frequency = <19200000>;
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};
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- pxo_board {
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+ pxo_board: pxo_board {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <27000000>;
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@@ -420,6 +420,8 @@
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rpmcc: clock-controller {
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compatible = "qcom,rpmcc-msm8660", "qcom,rpmcc";
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#clock-cells = <1>;
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+ clocks = <&pxo_board>;
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+ clock-names = "pxo";
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};
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pm8901-regulators {
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@ -0,0 +1,76 @@
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From 3d8c0e94a792ae62fa0495ac940c9850a059afc2 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Tue, 5 Jul 2022 21:39:18 +0200
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Subject: [PATCH v2 3/4] clk: qcom: clk-rpm: convert to parent_data API
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Convert clk-rpm driver to parent_data API.
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We keep the old pxo/cxo_board parent naming to keep compatibility with
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old DT and we use the new pxo/cxo for new implementation where these
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clock are defined in DTS.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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drivers/clk/qcom/clk-rpm.c | 24 ++++++++++++++++--------
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1 file changed, 16 insertions(+), 8 deletions(-)
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--- a/drivers/clk/qcom/clk-rpm.c
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+++ b/drivers/clk/qcom/clk-rpm.c
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@@ -23,6 +23,14 @@
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#define QCOM_RPM_SCALING_ENABLE_ID 0x2
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#define QCOM_RPM_XO_MODE_ON 0x2
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+static const struct clk_parent_data gcc_pxo[] = {
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+ { .fw_name = "pxo", .name = "pxo_board" },
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+};
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+
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+static const struct clk_parent_data gcc_cxo[] = {
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+ { .fw_name = "cxo", .name = "cxo_board" },
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+};
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+
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#define DEFINE_CLK_RPM(_platform, _name, _active, r_id) \
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static struct clk_rpm _platform##_##_active; \
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static struct clk_rpm _platform##_##_name = { \
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@@ -32,8 +40,8 @@
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.hw.init = &(struct clk_init_data){ \
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.ops = &clk_rpm_ops, \
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.name = #_name, \
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- .parent_names = (const char *[]){ "pxo_board" }, \
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- .num_parents = 1, \
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+ .parent_data = gcc_pxo, \
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+ .num_parents = ARRAY_SIZE(gcc_pxo), \
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}, \
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}; \
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static struct clk_rpm _platform##_##_active = { \
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@@ -44,8 +52,8 @@
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.hw.init = &(struct clk_init_data){ \
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.ops = &clk_rpm_ops, \
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.name = #_active, \
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- .parent_names = (const char *[]){ "pxo_board" }, \
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- .num_parents = 1, \
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+ .parent_data = gcc_pxo, \
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+ .num_parents = ARRAY_SIZE(gcc_pxo), \
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}, \
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}
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@@ -56,8 +64,8 @@
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.hw.init = &(struct clk_init_data){ \
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.ops = &clk_rpm_xo_ops, \
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.name = #_name, \
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- .parent_names = (const char *[]){ "cxo_board" }, \
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- .num_parents = 1, \
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+ .parent_data = gcc_cxo, \
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+ .num_parents = ARRAY_SIZE(gcc_cxo), \
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}, \
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}
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@@ -68,8 +76,8 @@
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.hw.init = &(struct clk_init_data){ \
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.ops = &clk_rpm_fixed_ops, \
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.name = #_name, \
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- .parent_names = (const char *[]){ "pxo" }, \
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- .num_parents = 1, \
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+ .parent_data = gcc_pxo, \
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+ .num_parents = ARRAY_SIZE(gcc_pxo), \
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}, \
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}
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@ -0,0 +1,31 @@
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From ac84ac819a2e8fd3d87122b452c502a386c54437 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Tue, 5 Jul 2022 18:30:18 +0200
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Subject: [PATCH v2 4/4] clk: qcom: gcc-ipq806x: remove cc_register_board for
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pxo and cxo
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Now that these clock are defined as fixed clk in dts, we can drop the
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register_board_clk for cxo_board and pxo_board in gcc_ipq806x_probe.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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drivers/clk/qcom/gcc-ipq806x.c | 8 --------
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1 file changed, 8 deletions(-)
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--- a/drivers/clk/qcom/gcc-ipq806x.c
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+++ b/drivers/clk/qcom/gcc-ipq806x.c
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@@ -3384,14 +3384,6 @@ static int gcc_ipq806x_probe(struct plat
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struct regmap *regmap;
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int ret;
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- ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 25000000);
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- if (ret)
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- return ret;
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-
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- ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 25000000);
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- if (ret)
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- return ret;
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-
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if (of_machine_is_compatible("qcom,ipq8065")) {
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ubi32_core1_src_clk.freq_tbl = clk_tbl_nss_ipq8065;
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ubi32_core2_src_clk.freq_tbl = clk_tbl_nss_ipq8065;
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