ExternalVendorCode/openwrt
1
0
Fork 0
mirror of https://github.com/openwrt/openwrt.git synced 2024-12-24 07:46:48 +00:00
Code Issues Actions 5 Packages Projects Releases Wiki Activity

ipq806x: move mdio node to ipq8064 dts

Browse Source 
As mdio0 is used in every dts move it to general ipq8064
dts and use label to set device specific definition.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
This commit is contained in:
Ansuel Smith 2020-03-03 18:38:21 +01:00 committed by Petr Štetiar
parent b921e31428
commit e42aca06ab
15 changed files with 410 additions and 540 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

58
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
View File

@ -27,40 +27,6 @@
chosen {
stdout-path = "serial0:115200n8";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
};
};
&qcom_pinmux {
@ -200,6 +166,30 @@
};
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";

74
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap161.dts
View File

@ -27,48 +27,6 @@
chosen {
stdout-path = "serial0:115200n8";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x20080 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
qca,phy-rgmii-en;
qca,txclk-delay-en;
qca,rxclk-delay-en;
};
phy3: ethernet-phy@3 {
device_type = "ethernet-phy";
reg = <3>;
};
};
};
};
&qcom_pinmux {
@ -226,6 +184,38 @@
};
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x20080 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
qca,phy-rgmii-en;
qca,txclk-delay-en;
qca,rxclk-delay-en;
};
phy3: ethernet-phy@3 {
device_type = "ethernet-phy";
reg = <3>;
};
};
&gmac0 {
status = "okay";
phy-mode = "rgmii";

58
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
View File

@ -36,40 +36,6 @@
stdout-path = "serial0:115200n8";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
@ -449,6 +415,30 @@
force_gen1 = <1>;
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";

58
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
View File

@ -36,40 +36,6 @@
stdout-path = "serial0:115200n8";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
@ -371,6 +337,30 @@
};
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";

74
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-db149.dts
View File

@ -22,48 +22,6 @@
chosen {
stdout-path = "serial0:115200n8";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
phy6: ethernet-phy@6 {
reg = <6>;
};
phy7: ethernet-phy@7 {
reg = <7>;
};
};
};
};
&qcom_pinmux {
@ -185,6 +143,38 @@
status = "okay";
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
phy6: ethernet-phy@6 {
reg = <6>;
};
phy7: ethernet-phy@7 {
reg = <7>;
};
};
&gmac0 {
status = "okay";
phy-mode = "rgmii";

58
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
View File

@ -37,40 +37,6 @@
append-rootblock = "ubi.mtd="; /* append to bootargs adding the root deviceblock nbr from bootloader */
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
@ -357,6 +323,30 @@
};
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";

59
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
View File

@ -37,41 +37,6 @@
stdout-path = "serial0:115200n8";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
@ -333,6 +298,30 @@
};
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";

58
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
View File

@ -41,40 +41,6 @@
stdout-path = "serial0:115200n8";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
@ -370,6 +336,30 @@
};
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";

58
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
View File

@ -35,40 +35,6 @@
stdout-path = "serial0:115200n8";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
@ -372,6 +338,30 @@
force_gen1 = <1>;
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";

56
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts
View File

@ -35,39 +35,6 @@
stdout-path = "serial0:115200n8";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x06000000 /* PAD0_MODE */
0x0000c 0x00080080 /* PAD6_MODE */
0x000e4 0x0006a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x0000004e /* PORT0_STATUS */
0x00094 0x0000004e /* PORT6_STATUS */
>;
};
ethernet-phy@4 {
reg = <4>;
};
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
@ -171,6 +138,29 @@
status = "okay";
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x06000000 /* PAD0_MODE */
0x0000c 0x00080080 /* PAD6_MODE */
0x000e4 0x0006a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x0000004e /* PORT0_STATUS */
0x00094 0x0000004e /* PORT6_STATUS */
>;
};
ethernet-phy@4 {
reg = <4>;
};
};
&gmac1 {
status = "okay";

60
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts
View File

@ -56,42 +56,6 @@
stdout-path = "serial0:115200n8";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
ethernet-phy@4 {
reg = <4>;
};
};
};
leds {
compatible = "gpio-leds";
@ -326,6 +290,30 @@
status = "okay";
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
ethernet-phy@4 {
reg = <4>;
};
};
&gmac1 {
status = "okay";

67
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wxr-2533dhp.dts
View File

@ -37,45 +37,6 @@
stdout-path = "serial0:115200n8";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x07600000 /* PAD0_MODE */
0x00008 0x01000000 /* PAD5_MODE */
0x0000c 0x00000080 /* PAD6_MODE */
0x00050 0xcc35cc35 /* LED_CTRL0 */
0x00054 0xca35ca35 /* LED_CTRL1 */
0x00058 0xc935c935 /* LED_CTRL2 */
0x0005c 0x03ffff00 /* LED_CTRL3 */
0x000e4 0x0006a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x0000007e /* PORT0_STATUS */
0x00094 0x0000007e /* PORT6_STATUS */
>;
};
ethernet-phy@4 {
reg = <4>;
};
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
@ -228,6 +189,34 @@
status = "okay";
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x07600000 /* PAD0_MODE */
0x00008 0x01000000 /* PAD5_MODE */
0x0000c 0x00000080 /* PAD6_MODE */
0x00050 0xcc35cc35 /* LED_CTRL0 */
0x00054 0xca35ca35 /* LED_CTRL1 */
0x00058 0xc935c935 /* LED_CTRL2 */
0x0005c 0x03ffff00 /* LED_CTRL3 */
0x000e4 0x0006a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x0000007e /* PORT0_STATUS */
0x00094 0x0000007e /* PORT6_STATUS */
>;
};
ethernet-phy@4 {
reg = <4>;
};
};
&gmac1 {
status = "okay";

14
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064.dtsi
View File

@ -1331,6 +1331,20 @@
snps,blen = <16 0 0 0 0 0 0>;
};
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
status = "disabled";
};
gmac0: ethernet@37000000 {
device_type = "network";
compatible = "qcom,ipq806x-gmac";

96
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
View File

@ -38,59 +38,6 @@
append-rootblock = "root=/dev/mmcblk0p";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
0x00978 0x19008643 /* QM_PORT1_CTRL0 */
0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
0x00980 0x19008643 /* QM_PORT2_CTRL0 */
0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
0x00988 0x19008643 /* QM_PORT3_CTRL0 */
0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
0x00990 0x19008643 /* QM_PORT4_CTRL0 */
0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
qca,ar8327-initvals = <
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x0000c 0x80 /* PAD6_MODE */
>;
};
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
@ -327,6 +274,49 @@
force_gen1 = <1>;
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
0x00978 0x19008643 /* QM_PORT1_CTRL0 */
0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
0x00980 0x19008643 /* QM_PORT2_CTRL0 */
0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
0x00988 0x19008643 /* QM_PORT3_CTRL0 */
0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
0x00990 0x19008643 /* QM_PORT4_CTRL0 */
0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
qca,ar8327-initvals = <
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x0000c 0x80 /* PAD6_MODE */
>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";

102
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
View File

@ -41,62 +41,6 @@
stdout-path = "serial0:115200n8";
};
soc {
mdio0: mdio@37000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,ipq8064-mdio", "syscon";
reg = <0x37000000 0x200000>;
resets = <&gcc GMAC_CORE1_RESET>;
reset-names = "stmmaceth";
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
0x00978 0x19008643 /* QM_PORT1_CTRL0 */
0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
0x00980 0x19008643 /* QM_PORT2_CTRL0 */
0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
0x00988 0x19008643 /* QM_PORT3_CTRL0 */
0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
0x00990 0x19008643 /* QM_PORT4_CTRL0 */
0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
>;
qca,ar8327-vlans = <
0x1 0x5e /* VLAN1 Ports 1/2/3/4/6 */
0x2 0x21 /* VLAN2 Ports 0/5 */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
qca,ar8327-initvals = <
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x0000c 0x80 /* PAD6_MODE */
>;
};
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
@ -427,6 +371,52 @@
};
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
0x00978 0x19008643 /* QM_PORT1_CTRL0 */
0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
0x00980 0x19008643 /* QM_PORT2_CTRL0 */
0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
0x00988 0x19008643 /* QM_PORT3_CTRL0 */
0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
0x00990 0x19008643 /* QM_PORT4_CTRL0 */
0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
>;
qca,ar8327-vlans = <
0x1 0x5e /* VLAN1 Ports 1/2/3/4/6 */
0x2 0x21 /* VLAN2 Ports 0/5 */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
qca,ar8327-initvals = <
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x0000c 0x80 /* PAD6_MODE */
>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";