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ralink: fix tx vlan offload and hardware status
hardware status and tx vlan offload support on all targets except rt5350. so i modify the IS_ENABLE condition only for mt7621. support mt7621 hardware status reference by SDK. but i don't have mt7621. if not work just set mt7621 FE_REG_FE_COUNTER_BASE to 0 to let software count. Signed-off-by: michael lee <igvtee@gmail.com> SVN-Revision: 43303
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@ -353,18 +353,33 @@ void fe_stats_update(struct fe_priv *priv)
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u64_stats_update_begin(&hwstats->syncp);
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hwstats->tx_bytes += fe_r32(base);
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hwstats->tx_packets += fe_r32(base + 0x04);
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hwstats->tx_skip += fe_r32(base + 0x08);
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hwstats->tx_collisions += fe_r32(base + 0x0c);
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hwstats->rx_bytes += fe_r32(base + 0x20);
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hwstats->rx_packets += fe_r32(base + 0x24);
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hwstats->rx_overflow += fe_r32(base + 0x28);
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hwstats->rx_fcs_errors += fe_r32(base + 0x2c);
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hwstats->rx_short_errors += fe_r32(base + 0x30);
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hwstats->rx_long_errors += fe_r32(base + 0x34);
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hwstats->rx_checksum_errors += fe_r32(base + 0x38);
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hwstats->rx_flow_control_packets += fe_r32(base + 0x3c);
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if (IS_ENABLED(CONFIG_SOC_MT7621)) {
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hwstats->rx_bytes += fe_r32(base);
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hwstats->rx_packets += fe_r32(base + 0x08);
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hwstats->rx_overflow += fe_r32(base + 0x10);
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hwstats->rx_fcs_errors += fe_r32(base + 0x14);
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hwstats->rx_short_errors += fe_r32(base + 0x18);
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hwstats->rx_long_errors += fe_r32(base + 0x1c);
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hwstats->rx_checksum_errors += fe_r32(base + 0x20);
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hwstats->rx_flow_control_packets += fe_r32(base + 0x24);
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hwstats->tx_skip += fe_r32(base + 0x28);
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hwstats->tx_collisions += fe_r32(base + 0x2c);
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hwstats->tx_bytes += fe_r32(base + 0x30);
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hwstats->tx_packets += fe_r32(base + 0x38);
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} else {
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hwstats->tx_bytes += fe_r32(base);
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hwstats->tx_packets += fe_r32(base + 0x04);
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hwstats->tx_skip += fe_r32(base + 0x08);
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hwstats->tx_collisions += fe_r32(base + 0x0c);
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hwstats->rx_bytes += fe_r32(base + 0x20);
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hwstats->rx_packets += fe_r32(base + 0x24);
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hwstats->rx_overflow += fe_r32(base + 0x28);
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hwstats->rx_fcs_errors += fe_r32(base + 0x2c);
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hwstats->rx_short_errors += fe_r32(base + 0x30);
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hwstats->rx_long_errors += fe_r32(base + 0x34);
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hwstats->rx_checksum_errors += fe_r32(base + 0x38);
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hwstats->rx_flow_control_packets += fe_r32(base + 0x3c);
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}
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u64_stats_update_end(&hwstats->syncp);
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}
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@ -391,17 +406,10 @@ static struct rtnl_link_stats64 *fe_get_stats64(struct net_device *dev,
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do {
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start = u64_stats_fetch_begin_bh(&hwstats->syncp);
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if (IS_ENABLED(CONFIG_SOC_MT7621)) {
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storage->rx_packets = dev->stats.rx_packets;
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storage->tx_packets = dev->stats.tx_packets;
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storage->rx_bytes = dev->stats.rx_bytes;
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storage->tx_bytes = dev->stats.tx_bytes;
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} else {
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storage->rx_packets = dev->stats.rx_packets;
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storage->tx_packets = dev->stats.tx_packets;
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storage->rx_bytes = dev->stats.rx_bytes;
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storage->tx_bytes = dev->stats.tx_bytes;
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}
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storage->rx_packets = hwstats->rx_packets;
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storage->tx_packets = hwstats->tx_packets;
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storage->rx_bytes = hwstats->rx_bytes;
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storage->tx_bytes = hwstats->tx_bytes;
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storage->collisions = hwstats->tx_collisions;
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storage->rx_length_errors = hwstats->rx_short_errors +
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hwstats->rx_long_errors;
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@ -497,12 +505,12 @@ static int fe_tx_map_dma(struct sk_buff *skb, struct net_device *dev,
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/* VLAN header offload */
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if (vlan_tx_tag_present(skb)) {
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if (IS_ENABLED(CONFIG_SOC_MT7620))
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if (IS_ENABLED(CONFIG_SOC_MT7621))
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txd->txd4 |= TX_DMA_INS_VLAN_MT7621 | vlan_tx_tag_get(skb);
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else
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txd->txd4 |= TX_DMA_INS_VLAN |
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((vlan_tx_tag_get(skb) >> VLAN_PRIO_SHIFT) << 4) |
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(vlan_tx_tag_get(skb) & 0xF);
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else
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txd->txd4 |= TX_DMA_INS_VLAN_MT7621 | vlan_tx_tag_get(skb);
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}
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/* TSO: fill MSS info in tcp checksum field */
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@ -55,6 +55,11 @@
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#define MT7620_GDM1_TX_GBCNT (MT7620_REG_MIB_OFFSET + 0x300)
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#define MT7620_GDM2_TX_GBCNT (MT7620_GDM1_TX_GBCNT + 0x40)
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#define MT7621_REG_MIB_OFFSET 0x2000
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#define MT7621_PPE_AC_BCNT0 (MT7621_REG_MIB_OFFSET + 0x00)
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#define MT7621_GDM1_TX_GBCNT (MT7621_REG_MIB_OFFSET + 0x400)
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#define MT7621_GDM2_TX_GBCNT (MT7621_GDM1_TX_GBCNT + 0x40)
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#define GSW_REG_GDMA1_MAC_ADRL 0x508
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#define GSW_REG_GDMA1_MAC_ADRH 0x50C
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@ -90,7 +95,7 @@ static const u32 mt7621_reg_table[FE_REG_COUNT] = {
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[FE_REG_FE_INT_ENABLE] = RT5350_FE_INT_ENABLE,
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[FE_REG_FE_INT_STATUS] = RT5350_FE_INT_STATUS,
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[FE_REG_FE_DMA_VID_BASE] = MT7621_DMA_VID,
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[FE_REG_FE_COUNTER_BASE] = MT7620_GDM1_TX_GBCNT,
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[FE_REG_FE_COUNTER_BASE] = MT7621_GDM1_TX_GBCNT,
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[FE_REG_FE_RST_GL] = MT7621_FE_RST_GL,
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};
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