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https://github.com/openwrt/openwrt.git
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bcm53xx: make the l2x0 L2 cache controller work
This fixes the DMA problems with the Ethernet driver. This also updates some other parts of the patches. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 39203
This commit is contained in:
parent
2bc9700c0d
commit
e0027ed4ab
@ -1,6 +1,6 @@
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CONFIG_ALIGNMENT_TRAP=y
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# CONFIG_ARCH_BCM is not set
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CONFIG_ARCH_BCM53XX=y
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CONFIG_ARCH_BCM_5301X=y
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CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
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CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
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CONFIG_ARCH_HAS_TICK_BROADCAST=y
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@ -48,7 +48,8 @@ CONFIG_BCMA_HOST_PCI=y
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CONFIG_BCMA_HOST_PCI_POSSIBLE=y
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CONFIG_BCMA_HOST_SOC=y
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CONFIG_BGMAC=y
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# CONFIG_CACHE_L2X0 is not set
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CONFIG_CACHE_L2X0=y
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CONFIG_CACHE_PL310=y
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_CLKDEV_LOOKUP=y
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CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
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@ -71,7 +72,7 @@ CONFIG_CPU_RMAP=y
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CONFIG_CPU_TLB_V7=y
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CONFIG_CPU_V7=y
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CONFIG_DCACHE_WORD_ACCESS=y
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CONFIG_DEBUG_BCM53XX=y
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CONFIG_DEBUG_BCM_5301X=y
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CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_LL=y
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CONFIG_DEBUG_LL_INCLUDE="debug/bcm53xx.S"
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@ -165,11 +166,17 @@ CONFIG_OF_PCI=y
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CONFIG_OF_PCI_IRQ=y
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CONFIG_OLD_SIGACTION=y
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CONFIG_OLD_SIGSUSPEND3=y
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CONFIG_OUTER_CACHE=y
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CONFIG_OUTER_CACHE_SYNC=y
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PAGE_OFFSET=0xC0000000
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CONFIG_PCI=y
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CONFIG_PERF_USE_VMALLOC=y
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CONFIG_PHYLIB=y
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# CONFIG_PL310_ERRATA_588369 is not set
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# CONFIG_PL310_ERRATA_727915 is not set
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# CONFIG_PL310_ERRATA_753970 is not set
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# CONFIG_PL310_ERRATA_769419 is not set
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# CONFIG_PREEMPT_RCU is not set
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CONFIG_RCU_STALL_COMMON=y
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CONFIG_RFS_ACCEL=y
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@ -14,7 +14,7 @@ define Image/Prepare
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endef
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define Image/Build/Initramfs
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$(call Image/Build/Initramfs/Chk,bcm5301-netgear-r6250,U12H245T00_NETGEAR,2,initramfs)
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$(call Image/Build/Initramfs/Chk,bcm4708-netgear-r6250,U12H245T00_NETGEAR,2,initramfs)
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endef
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define Image/Build/Initramfs/Chk
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@ -49,7 +49,7 @@ endef
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define Image/Build
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$(call Image/Build/$(1),$(1))
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$(call Image/Build/squashfs/Chk,bcm5301-netgear-r6250,U12H245T00_NETGEAR,2,squashfs)
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$(call Image/Build/squashfs/Chk,bcm4708-netgear-r6250,U12H245T00_NETGEAR,2,squashfs)
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endef
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@ -42,9 +42,9 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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bool "Kernel low-level debugging on BCM2835 PL011 UART"
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depends on ARCH_BCM2835
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+ config DEBUG_BCM53XX
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+ config DEBUG_BCM_5301X
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+ bool "Kernel low-level debugging on BCM53XX UART1"
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+ depends on ARCH_BCM53XX
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+ depends on ARCH_BCM_5301X
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+
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config DEBUG_CLPS711X_UART1
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bool "Kernel low-level debugging messages via UART1"
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@ -53,7 +53,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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config DEBUG_LL_INCLUDE
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string
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default "debug/bcm2835.S" if DEBUG_BCM2835
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+ default "debug/bcm53xx.S" if DEBUG_BCM53XX
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+ default "debug/bcm53xx.S" if DEBUG_BCM_5301X
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default "debug/cns3xxx.S" if DEBUG_CNS3XXX
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default "debug/exynos.S" if DEBUG_EXYNOS_UART
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default "debug/highbank.S" if DEBUG_HIGHBANK_UART
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@ -63,7 +63,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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machine-$(CONFIG_ARCH_AT91) += at91
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machine-$(CONFIG_ARCH_BCM) += bcm
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machine-$(CONFIG_ARCH_BCM2835) += bcm2835
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+machine-$(CONFIG_ARCH_BCM53XX) += bcm53xx
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+machine-$(CONFIG_ARCH_BCM_5301X) += bcm53xx
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machine-$(CONFIG_ARCH_CLPS711X) += clps711x
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machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
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machine-$(CONFIG_ARCH_DAVINCI) += davinci
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@ -73,15 +73,15 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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wm8650-mid.dtb \
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wm8850-w70v2.dtb
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dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
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+dtb-$(CONFIG_ARCH_BCM53XX) += bcm5301-netgear-r6250.dtb
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+dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
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targets += dtbs
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targets += $(dtb-y)
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm5301-netgear-r6250.dts
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+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
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@@ -0,0 +1,20 @@
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+/*
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+ * Broadcom BCM47XX / BCM53XX arm platform code.
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+ * Broadcom BCM470X / BCM5301X arm platform code.
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+ *
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+ * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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@ -90,36 +90,39 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+
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+/dts-v1/;
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+
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+/include/ "bcm5301.dtsi"
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+#include "bcm4708.dtsi"
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+
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+/ {
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+ compatible = "netgear,r6250v1", "broadcom,bcm4708";
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+ model = "Netgear R6250 V1 (BCM4708)";
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+ compatible = "netgear,r6250v1", "brcm,bcm5301";
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+
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+ memory {
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+ reg = <0x00000000 0x08000000>;
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm5301.dtsi
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@@ -0,0 +1,83 @@
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+++ b/arch/arm/boot/dts/bcm4708.dtsi
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@@ -0,0 +1,100 @@
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+/*
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+ * Broadcom BCM47XX / BCM53XX ARM platform code.
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+ * Broadcom BCM470X / BCM5301X ARM platform code.
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+ *
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+ * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * Licensed under the GNU/GPL. See COPYING for details.
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+ */
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+
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+/include/ "skeleton.dtsi"
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+#include <dt-bindings/interrupt-controller/arm-gic.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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+
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+#include "skeleton.dtsi"
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+
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+/ {
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+ compatible = "brcm,bcm5301";
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+ model = "BCM5301/BCM4707/BCM4708/BCM4709 SoC";
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+ compatible = "broadcom,bcm4708";
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+ model = "Broadcom BCM4708";
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+ interrupt-parent = <&gic>;
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+
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+ chosen {
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+ bootargs = "console=ttyS0,115200 earlyprintk debug vmalloc=64M";
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+ bootargs = "console=ttyS0,115200 debug earlyprintk";
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+ };
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+
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+ cpus {
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@ -129,11 +132,13 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+ cpu@0 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a9";
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+ next-level-cache = <&L2>;
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+ reg = <0>;
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+ };
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+ cpu@1 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a9";
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+ next-level-cache = <&L2>;
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+ reg = <1>;
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+ };
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+ };
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@ -152,14 +157,14 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+ uart@18000300 {
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+ compatible = "ns16550";
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+ reg = <0x18000300 0x100>;
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+ interrupts = <0 85 4>;
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+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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+ clock-frequency = <100000000>;
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+ };
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+
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+ uart@18000400 {
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+ compatible = "ns16550";
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+ reg = <0x18000400 0x100>;
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+ interrupts = <0 85 4>;
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+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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+ clock-frequency = <100000000>;
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+ };
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+
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@ -175,15 +180,27 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+ timer@19020200 {
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+ compatible = "arm,cortex-a9-global-timer";
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+ reg = <0x19020200 0x100>;
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+ interrupts = <1 11 0xf04>;
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+ interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clk_periph>;
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+ #clock-cells = <0>;
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+ };
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+
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+ local-timer@19020200 {
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+ local-timer@19020600 {
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+ compatible = "arm,cortex-a9-twd-timer";
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+ reg = <0x19020600 0x100>;
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+ interrupts = <1 13 0xf04>;
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+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&clk_periph>;
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+ };
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+
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+ L2: cache-controller@19022000 {
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+ compatible = "arm,pl310-cache";
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+ reg = <0x19022000 0x1000>;
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+ cache-unified;
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+ cache-level = <2>;
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+ };
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+
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+ scu@19020000 {
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+ compatible = "arm,cortex-a9-scu";
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+ reg = <0x19020000 0x100>;
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+ };
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+};
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--- /dev/null
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@ -210,32 +227,42 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+#include <asm/hardware/debug-8250.S>
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--- /dev/null
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+++ b/arch/arm/mach-bcm53xx/Kconfig
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@@ -0,0 +1,16 @@
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+config ARCH_BCM53XX
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+ bool "Broadcom BCM47XX / BCM53XX ARM SoC"
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+ select CPU_V7
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@@ -0,0 +1,26 @@
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+config ARCH_BCM_5301X
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+ bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
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+ depends on MMU
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+ select ARM_GIC
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+ select CACHE_L2X0
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+ select HAVE_ARM_SCU if SMP
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+ select HAVE_ARM_TWD if LOCAL_TIMERS
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+ select HAVE_ARM_TWD if SMP
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+ select HAVE_SMP
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+ select HAVE_CLK
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+ select LOCAL_TIMERS if SMP
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+ select GENERIC_TIME
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+ select GENERIC_CLOCKEVENTS_BUILD
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+ select COMMON_CLK
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+ select GENERIC_CLOCKEVENTS
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+ select GENERIC_TIME
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+ select ARM_GLOBAL_TIMER
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+ select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
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+ select MIGHT_HAVE_PCI
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+ help
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+ Support for Broadcom BCM47XX and BCM53XX SoCs with ARM CPU cores.
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+ Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
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+
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+ This is a network SoC line mostly used in home routers and
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+ wifi access points.
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+ This inclused the following SoC: BCM53010, BCM53011, BCM53012,
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+ BCM53014, BCM53015, BCM53016, BCM53017, BCM53018, BCM4707,
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+ BCM4708 and BCM4709.
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+
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+ Do not confuse this with the BCM4760 which is a totally
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+ different SoC or with the older BCM47XX and BCM53XX based
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+ network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx
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--- /dev/null
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+++ b/arch/arm/mach-bcm53xx/Makefile
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@@ -0,0 +1 @@
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+obj-y += bcm53xx.o
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--- /dev/null
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+++ b/arch/arm/mach-bcm53xx/bcm53xx.c
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@@ -0,0 +1,69 @@
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@@ -0,0 +1,60 @@
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+/*
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+ * Broadcom BCM47XX / BCM53XX ARM platform code.
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+ * Broadcom BCM470X / BCM5301X ARM platform code.
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+ *
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+ * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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@ -243,21 +270,19 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+ */
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+#include <linux/of_address.h>
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+#include <linux/of_platform.h>
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+#include <linux/irqchip.h>
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+#include <linux/clocksource.h>
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+#include <linux/clk-provider.h>
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+#include <asm/hardware/cache-l2x0.h>
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+
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+#include <asm/mach/arch.h>
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+#include <asm/mach/map.h>
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+#include <asm/smp_scu.h>
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+#include <asm/signal.h>
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+
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+static int bcm53xx_abort_handler(unsigned long addr, unsigned int fsr,
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+static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr,
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+ struct pt_regs *regs)
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+{
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+ /*
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+ * These happen for no good reason
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+ * possibly left over from CFE
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+ * These happen for no good reason, possibly left over from CFE
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+ */
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+ pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
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+ addr, fsr);
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@ -266,40 +291,33 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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+ return 0;
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+}
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+
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+static void bcm53xx_aborts_enable(void)
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+static void __init bcm5301x_init_early(void)
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+{
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+ /* Install our hook */
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+ hook_fault_code(16 + 6, bcm53xx_abort_handler, SIGBUS, 0,
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+ hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, 0,
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+ "imprecise external abort");
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+}
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+
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+static void __init bcm53xx_timer_init(void)
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+static void __init bcm5301x_timer_init(void)
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+{
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+ of_clk_init(NULL);
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+ clocksource_of_init();
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+}
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+
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+void __init bcm53xx_map_io(void)
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+{
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+ debug_ll_io_init();
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+ bcm53xx_aborts_enable();
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+}
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+
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+static void __init bcm53xx_dt_init(void)
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+static void __init bcm5301x_dt_init(void)
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+{
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+ l2x0_of_init(0, ~0UL);
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+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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+}
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+
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+static const char const *bcm53xx_dt_compat[] = {
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+ "brcm,bcm5301",
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+ "netgear,r6250v1",
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+static const char __initconst *bcm5301x_dt_compat[] = {
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+ "broadcom,bcm4708",
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+ NULL,
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+};
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+
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+DT_MACHINE_START(BCM53XX, "BCM53XX")
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+ .init_machine = bcm53xx_dt_init,
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+ .map_io = bcm53xx_map_io,
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+ .init_irq = irqchip_init,
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+ .init_time = bcm53xx_timer_init,
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+ .dt_compat = bcm53xx_dt_compat,
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+DT_MACHINE_START(BCM5301X, "BCM5301X")
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+ .init_early = bcm5301x_init_early,
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+ .init_time = bcm5301x_timer_init,
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+ .init_machine = bcm5301x_dt_init,
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+ .dt_compat = bcm5301x_dt_compat,
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+MACHINE_END
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@ -2,12 +2,12 @@ bcm53xx: register bcma bus
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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arch/arm/boot/dts/bcm5301.dtsi | 5 +++++
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arch/arm/boot/dts/bcm4708.dtsi | 5 +++++
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1 file changed, 5 insertions(+)
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--- a/arch/arm/boot/dts/bcm5301.dtsi
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+++ b/arch/arm/boot/dts/bcm5301.dtsi
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@@ -67,6 +67,11 @@
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--- a/arch/arm/boot/dts/bcm4708.dtsi
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+++ b/arch/arm/boot/dts/bcm4708.dtsi
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@@ -72,6 +72,11 @@
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<0x19020100 0x100>;
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};
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|
@ -31,18 +31,7 @@ The PHY says it is not connected by default, just ignore it.
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static const struct bcma_device_id bgmac_bcma_tbl[] = {
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BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_4706_MAC_GBIT, BCMA_ANY_REV, BCMA_ANY_CLASS),
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@@ -165,6 +169,10 @@ static netdev_tx_t bgmac_dma_tx_add(stru
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netdev_sent_queue(net_dev, skb->len);
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+ if (bgmac->core->bus->chipinfo.id == BCMA_CHIP_ID_BCM4707 ||
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+ bgmac->core->bus->chipinfo.id == BCMA_CHIP_ID_BCM53018)
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+ mdelay(1);
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+
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wmb();
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|
||||
/* Increase ring->end to point empty slot. We tell hardware the first
|
||||
@@ -1438,7 +1446,7 @@ static int bgmac_probe(struct bcma_devic
|
||||
@@ -1438,7 +1442,7 @@ static int bgmac_probe(struct bcma_devic
|
||||
int err;
|
||||
|
||||
/* We don't support 2nd, 3rd, ... units, SPROM has to be adjusted */
|
||||
@ -51,7 +40,7 @@ The PHY says it is not connected by default, just ignore it.
|
||||
pr_err("Unsupported core_unit %d\n", core->core_unit);
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
@@ -1534,8 +1542,7 @@ static int bgmac_probe(struct bcma_devic
|
||||
@@ -1534,8 +1538,7 @@ static int bgmac_probe(struct bcma_devic
|
||||
/* TODO: reset the external phy. Specs are needed */
|
||||
bgmac_phy_reset(bgmac);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user