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mediatek: add support for CMCC A10
This board is also as known as SuperElectron ZN-M5 and ZN-M8. However, for ZN-M5 and ZN-M8, there's another version uses ZX279128 as CPU chip, which is unsupported. You can check it in "高级设置" > "系统日志" > "内核日志" page from webUI. Hardware specification: SoC: MediaTek MT7981B 2x A53 Flash: 128 MB SPI-NAND RAM: 256MB Ethernet: 4x 10/100/1000 Mbps Switch: MediaTek MT7531AE WiFi: MediaTek MT7976C Button: Reset, WPS Power: DC 12V 1A Stock layout flash instructions: Login into webUI and upload sysupgrade firmware in "系统管理" > "升级固件" page. Remember to unselect "保留配置" ("Keep configurations") first before doing that. OpenWrt U-Boot layout flash instructions: 1. Flash stock layout firmware first. 2. Connect to the device via SSH, and backup everything, especially 'Factory' partition. 3. Unlock MTD partitions: opkg update && opkg install kmod-mtd-rw insmod mtd-rw i_want_a_brick=1 4. Write new BL2 and FIP: mtd write openwrt-mediatek-filogic-cmcc_a10-ubootmod-preloader.bin BL2 mtd write openwrt-mediatek-filogic-cmcc_a10-ubootmod-bl31-uboot.fip FIP 5. Set static IP on your PC: IP 192.168.1.254/24, GW 192.168.1.1 6. Serve OpenWrt initramfs image using TFTP server. 7. Cut off the power and re-engage, wait for TFTP recovery to complete. 8. After OpenWrt has booted, perform sysupgrade. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/18121 (cherry picked from commit 96c6608346758ceffebf30d74cab00db58874bb9) [sync uboot defconfigs with 24.10 branch, change apk to opkg] Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/18218 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
parent
3da9786da3
commit
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@ -34,6 +34,7 @@ ubootenv_add_ubi_default() {
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case "$board" in
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abt,asr3000|\
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cmcc,a10-ubootmod|\
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h3c,magic-nx30-pro|\
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jcg,q30-pro|\
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mercusys,mr90x-v1-ubi|\
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@ -231,6 +231,18 @@ define U-Boot/mt7981_abt_asr3000
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DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
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endef
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define U-Boot/mt7981_cmcc_a10
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NAME:=CMCC A10
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BUILD_SUBTARGET:=filogic
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BUILD_DEVICES:=cmcc_a10-ubootmod
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UBOOT_CONFIG:=mt7981_cmcc_a10
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UBOOT_IMAGE:=u-boot.fip
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BL2_BOOTDEV:=spim-nand
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BL2_SOC:=mt7981
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BL2_DDRTYPE:=ddr3
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DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
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endef
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define U-Boot/mt7981_cmcc_rax3000m-emmc
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NAME:=CMCC RAX3000M
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BUILD_SUBTARGET:=filogic
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@ -832,6 +844,7 @@ UBOOT_TARGETS := \
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mt7628_ravpower_rp-wd009 \
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mt7629_rfb \
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mt7981_abt_asr3000 \
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mt7981_cmcc_a10 \
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mt7981_cmcc_rax3000m-emmc \
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mt7981_cmcc_rax3000m-nand \
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mt7981_gatonetworks_gdsp \
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327
package/boot/uboot-mediatek/patches/446-add-cmcc_a10.patch
Normal file
327
package/boot/uboot-mediatek/patches/446-add-cmcc_a10.patch
Normal file
@ -0,0 +1,327 @@
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--- /dev/null
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+++ b/configs/mt7981_cmcc_a10_defconfig
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@@ -0,0 +1,107 @@
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+CONFIG_ARM=y
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+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
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+CONFIG_POSITION_INDEPENDENT=y
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+CONFIG_ARCH_MEDIATEK=y
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+CONFIG_TEXT_BASE=0x41e00000
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+CONFIG_SYS_MALLOC_F_LEN=0x4000
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+CONFIG_NR_DRAM_BANKS=1
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+CONFIG_DEFAULT_DEVICE_TREE="mt7981-cmcc-a10"
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+CONFIG_OF_LIBFDT_OVERLAY=y
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+CONFIG_TARGET_MT7981=y
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+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
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+CONFIG_DEBUG_UART_BASE=0x11002000
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+CONFIG_DEBUG_UART_CLOCK=40000000
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+CONFIG_SYS_LOAD_ADDR=0x46000000
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+CONFIG_DEBUG_UART=y
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+CONFIG_FIT=y
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+CONFIG_BOOTDELAY=30
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+CONFIG_AUTOBOOT_KEYED=y
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+CONFIG_AUTOBOOT_MENU_SHOW=y
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+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-cmcc-a10.dtb"
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+CONFIG_LOGLEVEL=7
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+CONFIG_PRE_CONSOLE_BUFFER=y
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+CONFIG_LOG=y
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+CONFIG_BOARD_LATE_INIT=y
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+CONFIG_HUSH_PARSER=y
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+CONFIG_SYS_PROMPT="MT7981> "
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+CONFIG_CMD_CPU=y
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+CONFIG_CMD_LICENSE=y
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+CONFIG_CMD_BOOTMENU=y
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+CONFIG_CMD_ASKENV=y
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+CONFIG_CMD_ERASEENV=y
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+CONFIG_CMD_ENV_FLAGS=y
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+CONFIG_CMD_STRINGS=y
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+CONFIG_CMD_DM=y
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+CONFIG_CMD_GPIO=y
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+CONFIG_CMD_GPT=y
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+CONFIG_CMD_MTD=y
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+CONFIG_CMD_PART=y
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+CONFIG_CMD_DHCP=y
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+CONFIG_CMD_TFTPSRV=y
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+CONFIG_CMD_RARP=y
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+CONFIG_CMD_PING=y
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+CONFIG_CMD_CDP=y
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+CONFIG_CMD_SNTP=y
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+CONFIG_CMD_DNS=y
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+CONFIG_CMD_LINK_LOCAL=y
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+CONFIG_CMD_PXE=y
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+CONFIG_CMD_CACHE=y
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+CONFIG_CMD_PSTORE=y
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+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
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+CONFIG_CMD_UUID=y
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+CONFIG_CMD_HASH=y
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+CONFIG_CMD_SMC=y
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+CONFIG_CMD_UBI=y
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+CONFIG_CMD_UBI_RENAME=y
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+CONFIG_OF_EMBED=y
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+CONFIG_ENV_OVERWRITE=y
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+CONFIG_ENV_IS_IN_UBI=y
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+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
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+CONFIG_ENV_UBI_PART="ubi"
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+CONFIG_ENV_UBI_VOLUME="ubootenv"
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+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
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+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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+CONFIG_USE_DEFAULT_ENV_FILE=y
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+CONFIG_DEFAULT_ENV_FILE="cmcc_a10_env"
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+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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+CONFIG_VERSION_VARIABLE=y
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+CONFIG_NET_RANDOM_ETHADDR=y
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+CONFIG_NETCONSOLE=y
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+CONFIG_USE_IPADDR=y
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+CONFIG_IPADDR="192.168.1.1"
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+CONFIG_USE_SERVERIP=y
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+CONFIG_SERVERIP="192.168.1.254"
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+CONFIG_REGMAP=y
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+CONFIG_SYSCON=y
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+CONFIG_BUTTON=y
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+CONFIG_BUTTON_GPIO=y
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+CONFIG_CLK=y
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+CONFIG_GPIO_HOG=y
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+CONFIG_LED=y
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+CONFIG_LED_BLINK=y
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+CONFIG_LED_GPIO=y
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+# CONFIG_MMC is not set
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+CONFIG_MTD=y
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+CONFIG_DM_MTD=y
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+CONFIG_MTD_SPI_NAND=y
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+CONFIG_MTD_UBI_FASTMAP=y
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+CONFIG_PHY_FIXED=y
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+CONFIG_MEDIATEK_ETH=y
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+CONFIG_PHY=y
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+CONFIG_PINCTRL=y
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+CONFIG_PINCONF=y
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+CONFIG_PINCTRL_MT7981=y
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+CONFIG_POWER_DOMAIN=y
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+CONFIG_MTK_POWER_DOMAIN=y
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+CONFIG_DM_REGULATOR=y
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+CONFIG_DM_REGULATOR_FIXED=y
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+CONFIG_DM_REGULATOR_GPIO=y
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+CONFIG_RAM=y
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+CONFIG_DM_SERIAL=y
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+CONFIG_MTK_SERIAL=y
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+CONFIG_SPI=y
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+CONFIG_DM_SPI=y
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+CONFIG_MTK_SPIM=y
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+CONFIG_ZSTD=y
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+CONFIG_HEXDUMP=y
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+CONFIG_LMB_MAX_REGIONS=64
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--- /dev/null
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+++ b/arch/arm/dts/mt7981-cmcc-a10.dts
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@@ -0,0 +1,157 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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+
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+/dts-v1/;
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+#include "mt7981.dtsi"
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/linux-event-codes.h>
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+
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+/ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ model = "CMCC A10";
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+ compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
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+
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+ chosen {
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+ stdout-path = &uart0;
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+ tick-timer = &timer0;
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+ };
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+
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+ memory@40000000 {
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+ device_type = "memory";
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+ reg = <0x40000000 0x10000000>;
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+ };
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+
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+ gpio-keys {
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+ compatible = "gpio-keys";
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+
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+ button-reset {
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+ label = "reset";
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+ linux,code = <KEY_RESTART>;
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+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ button-wps {
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+ label = "wps";
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+ linux,code = <KEY_WPS_BUTTON>;
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+ gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+
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+ gpio-leds {
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+ compatible = "gpio-leds";
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+
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+ led-0 {
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+ label = "blue:status";
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+ gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
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+ default-state = "off";
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+ };
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+
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+ running_led: led-1 {
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+ label = "green:status";
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+ gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
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+ default-state = "off";
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+ };
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+
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+ boot_led: led-2 {
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+ label = "red:status";
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+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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+ default-state = "on";
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+ };
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+ };
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+};
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+
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+ð {
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+ status = "okay";
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+ mediatek,gmac-id = <0>;
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+ phy-mode = "2500base-x";
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+ mediatek,switch = "mt7531";
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+ reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
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+
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+ fixed-link {
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+ speed = <2500>;
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+ full-duplex;
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+ };
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+};
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+
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+&pinctrl {
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+ spi_flash_pins: spi0-pins-func-1 {
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+ mux {
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+ function = "flash";
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+ groups = "spi0", "spi0_wp_hold";
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+ };
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+
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+ conf-pu {
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+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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+ drive-strength = <MTK_DRIVE_8mA>;
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+ bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
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+ };
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+
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+ conf-pd {
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+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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+ drive-strength = <MTK_DRIVE_8mA>;
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+ bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
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+ };
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+ };
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+};
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+
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+&spi0 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi_flash_pins>;
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+ status = "okay";
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+ must_tx;
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+ enhance_timing;
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+ dma_ext;
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+ ipm_design;
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+ support_quad;
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+ tick_dly = <2>;
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+ sample_sel = <0>;
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+
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+ spi_nand@0 {
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+ compatible = "spi-nand";
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+ reg = <0>;
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+ spi-max-frequency = <52000000>;
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "bl2";
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+ reg = <0x0 0x100000>;
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+ };
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+
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+ partition@100000 {
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+ label = "u-boot-env";
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+ reg = <0x100000 0x80000>;
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+ };
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+
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+ partition@180000 {
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+ label = "factory";
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+ reg = <0x180000 0x200000>;
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+ };
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+
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+ partition@380000 {
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+ label = "fip";
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+ reg = <0x380000 0x200000>;
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+ };
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+
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+ partition@580000 {
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+ label = "ubi";
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+ reg = <0x580000 0x7a80000>;
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+ compatible = "linux,ubi";
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+ };
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+ };
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+ };
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+};
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+
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+&uart0 {
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+ mediatek,force-highspeed;
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+ status = "okay";
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+};
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+
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+&watchdog {
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+ status = "disabled";
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+};
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--- /dev/null
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+++ b/cmcc_a10_env
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@@ -0,0 +1,54 @@
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+ipaddr=192.168.1.1
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+serverip=192.168.1.254
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+loadaddr=0x46000000
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+console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
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+bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
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+bootconf=config-1
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+bootdelay=0
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+bootfile=openwrt-mediatek-filogic-cmcc_a10-ubootmod-initramfs-recovery.itb
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+bootfile_bl2=openwrt-mediatek-filogic-cmcc_a10-ubootmod-preloader.bin
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+bootfile_fip=openwrt-mediatek-filogic-cmcc_a10-ubootmod-bl31-uboot.fip
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+bootfile_upg=openwrt-mediatek-filogic-cmcc_a10-ubootmod-squashfs-sysupgrade.itb
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+bootled_pwr=red:status
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+bootled_rec=blue:status
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+bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
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+bootmenu_default=0
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+bootmenu_delay=0
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+bootmenu_title= [0;34m( ( ( [1;39mOpenWrt[0;34m ) ) )
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+bootmenu_0=Initialize environment.=run _firstboot
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+bootmenu_0d=Run default boot command.=run boot_default
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+bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
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+bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return
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+bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return
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+bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
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+bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
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+bootmenu_6=[31mLoad BL31+U-Boot FIP via TFTP then write to NAND.[0m=run boot_tftp_write_fip ; run bootmenu_confirm_return
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+bootmenu_7=[31mLoad BL2 preloader via TFTP then write to NAND.[0m=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
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+bootmenu_8=Reboot.=reset
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+bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
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+boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
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+boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
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+boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
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+boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off
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+boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever
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+boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
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+boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
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+boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
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+boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
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+boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory
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+boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2
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+reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
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+mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
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+mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
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+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
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+ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
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+ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
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+ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
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+ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
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+ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
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+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
|
||||
+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
|
||||
+_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
|
||||
+_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
|
||||
+_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
|
||||
+_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title [33m$ver[0m"
|
40
target/linux/mediatek/dts/mt7981b-cmcc-a10-stock.dts
Normal file
40
target/linux/mediatek/dts/mt7981b-cmcc-a10-stock.dts
Normal file
@ -0,0 +1,40 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
/dts-v1/;
|
||||
#include "mt7981b-cmcc-a10.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CMCC A10 (stock layout)";
|
||||
compatible = "cmcc,a10-stock", "mediatek,mt7981";
|
||||
};
|
||||
|
||||
&partitions {
|
||||
partition@580000 {
|
||||
label = "ubi";
|
||||
reg = <0x580000 0x4000000>;
|
||||
};
|
||||
|
||||
partition@4580000 {
|
||||
label = "firmware_backup";
|
||||
reg = <0x4580000 0x2000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@6580000 {
|
||||
label = "zrsave";
|
||||
reg = <0x6580000 0x100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@6680000 {
|
||||
label = "config2";
|
||||
reg = <0x6680000 0x100000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
&spi_nand {
|
||||
mediatek,nmbm;
|
||||
mediatek,bmt-max-ratio = <1>;
|
||||
mediatek,bmt-max-reserved-blocks = <64>;
|
||||
};
|
28
target/linux/mediatek/dts/mt7981b-cmcc-a10-ubootmod.dts
Normal file
28
target/linux/mediatek/dts/mt7981b-cmcc-a10-ubootmod.dts
Normal file
@ -0,0 +1,28 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
/dts-v1/;
|
||||
#include "mt7981b-cmcc-a10.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CMCC A10 (OpenWrt U-Boot layout)";
|
||||
compatible = "cmcc,a10-ubootmod", "mediatek,mt7981";
|
||||
};
|
||||
|
||||
&chosen {
|
||||
bootargs = "root=/dev/fit0 rootwait";
|
||||
rootdisk = <&ubi_rootdisk>;
|
||||
};
|
||||
|
||||
&partitions {
|
||||
partition@580000 {
|
||||
compatible = "linux,ubi";
|
||||
label = "ubi";
|
||||
reg = <0x580000 0x7a80000>;
|
||||
|
||||
volumes {
|
||||
ubi_rootdisk: ubi-volume-fit {
|
||||
volname = "fit";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
254
target/linux/mediatek/dts/mt7981b-cmcc-a10.dtsi
Normal file
254
target/linux/mediatek/dts/mt7981b-cmcc-a10.dtsi
Normal file
@ -0,0 +1,254 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Copyright (C) 2023 Tianling Shen <cnsztl@immortalwrt.org>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include "mt7981.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
led-boot = &boot_led;
|
||||
led-failsafe = &boot_led;
|
||||
led-running = &running_led;
|
||||
led-upgrade = &running_led;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen: chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@40000000 {
|
||||
reg = <0 0x40000000 0 0x10000000>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
button-reset {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button-wps {
|
||||
label = "wps";
|
||||
linux,code = <KEY_WPS_BUTTON>;
|
||||
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-0 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
running_led: led-1 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
boot_led: led-2 {
|
||||
function = LED_FUNCTION_STATUS;
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ð {
|
||||
status = "okay";
|
||||
|
||||
gmac0: mac@0 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
nvmem-cells = <&macaddr_factory_2a 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio_bus {
|
||||
switch: switch@1f {
|
||||
compatible = "mediatek,mt7531";
|
||||
reg = <31>;
|
||||
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&pio {
|
||||
spi0_flash_pins: spi0-pins {
|
||||
mux {
|
||||
function = "spi";
|
||||
groups = "spi0", "spi0_wp_hold";
|
||||
};
|
||||
|
||||
conf-pu {
|
||||
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
|
||||
drive-strength = <8>;
|
||||
mediatek,pull-up-adv = <0>; /* bias-disable */
|
||||
};
|
||||
|
||||
conf-pd {
|
||||
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
|
||||
drive-strength = <8>;
|
||||
mediatek,pull-up-adv = <0>; /* bias-disable */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_flash_pins>;
|
||||
status = "okay";
|
||||
|
||||
spi_nand: flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
|
||||
spi-max-frequency = <52000000>;
|
||||
spi-tx-bus-width = <4>;
|
||||
spi-rx-bus-width = <4>;
|
||||
|
||||
partitions: partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "BL2";
|
||||
reg = <0x0 0x100000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x100000 0x80000>;
|
||||
};
|
||||
|
||||
partition@180000 {
|
||||
label = "Factory";
|
||||
reg = <0x180000 0x200000>;
|
||||
read-only;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
eeprom_factory_0: eeprom@0 {
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
|
||||
macaddr_factory_a: macaddr@a {
|
||||
compatible = "mac-base";
|
||||
reg = <0xa 0x6>;
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
|
||||
macaddr_factory_24: macaddr@24 {
|
||||
compatible = "mac-base";
|
||||
reg = <0x24 0x6>;
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
|
||||
macaddr_factory_2a: macaddr@2a {
|
||||
compatible = "mac-base";
|
||||
reg = <0x2a 0x6>;
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
partition@380000 {
|
||||
label = "FIP";
|
||||
reg = <0x380000 0x200000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&switch {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "wan";
|
||||
|
||||
nvmem-cells = <&macaddr_factory_24 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wifi {
|
||||
nvmem-cells = <&eeprom_factory_0>;
|
||||
nvmem-cell-names = "eeprom";
|
||||
status = "okay";
|
||||
|
||||
band@1 {
|
||||
reg = <1>;
|
||||
nvmem-cells = <&macaddr_factory_a 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
};
|
@ -30,6 +30,8 @@ mediatek_setup_interfaces()
|
||||
;;
|
||||
asus,rt-ax59u|\
|
||||
cetron,ct3003|\
|
||||
cmcc,a10-stock|\
|
||||
cmcc,a10-ubootmod|\
|
||||
confiabits,mt7981|\
|
||||
cudy,wr3000-v1|\
|
||||
jcg,q30-pro|\
|
||||
|
@ -71,6 +71,7 @@ platform_do_upgrade() {
|
||||
bananapi,bpi-r3-mini|\
|
||||
bananapi,bpi-r4|\
|
||||
bananapi,bpi-r4-poe|\
|
||||
cmcc,a10-ubootmod|\
|
||||
cmcc,rax3000m|\
|
||||
gatonetworks,gdsp|\
|
||||
h3c,magic-nx30-pro|\
|
||||
|
@ -500,6 +500,61 @@ define Device/cetron_ct3003
|
||||
endef
|
||||
TARGET_DEVICES += cetron_ct3003
|
||||
|
||||
define Device/cmcc_a10-stock
|
||||
DEVICE_VENDOR := CMCC
|
||||
DEVICE_MODEL := A10 (stock layout)
|
||||
DEVICE_ALT0_VENDOR := SuperElectron
|
||||
DEVICE_ALT0_MODEL := ZN-M5 (stock layout)
|
||||
DEVICE_ALT1_VENDOR := SuperElectron
|
||||
DEVICE_ALT1_MODEL := ZN-M8 (stock layout)
|
||||
DEVICE_DTS := mt7981b-cmcc-a10-stock
|
||||
DEVICE_DTS_DIR := ../dts
|
||||
SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
|
||||
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
|
||||
UBINIZE_OPTS := -E 5
|
||||
BLOCKSIZE := 128k
|
||||
PAGESIZE := 2048
|
||||
IMAGE_SIZE := 65536k
|
||||
KERNEL_IN_UBI := 1
|
||||
IMAGES += factory.bin
|
||||
IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
|
||||
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
|
||||
KERNEL = kernel-bin | lzma | \
|
||||
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
|
||||
KERNEL_INITRAMFS = kernel-bin | lzma | \
|
||||
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
|
||||
endef
|
||||
TARGET_DEVICES += cmcc_a10-stock
|
||||
|
||||
define Device/cmcc_a10-ubootmod
|
||||
DEVICE_VENDOR := CMCC
|
||||
DEVICE_MODEL := A10 (OpenWrt U-Boot layout)
|
||||
DEVICE_ALT0_VENDOR := SuperElectron
|
||||
DEVICE_ALT0_MODEL := ZN-M5 (OpenWrt U-Boot layout)
|
||||
DEVICE_ALT1_VENDOR := SuperElectron
|
||||
DEVICE_ALT1_MODEL := ZN-M8 (OpenWrt U-Boot layout)
|
||||
DEVICE_DTS := mt7981b-cmcc-a10-ubootmod
|
||||
DEVICE_DTS_DIR := ../dts
|
||||
SUPPORTED_DEVICES += cmcc,a10
|
||||
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
|
||||
UBINIZE_OPTS := -E 5
|
||||
BLOCKSIZE := 128k
|
||||
PAGESIZE := 2048
|
||||
KERNEL_IN_UBI := 1
|
||||
UBOOTENV_IN_UBI := 1
|
||||
IMAGES := sysupgrade.itb
|
||||
KERNEL_INITRAMFS_SUFFIX := -recovery.itb
|
||||
KERNEL := kernel-bin | gzip
|
||||
KERNEL_INITRAMFS := kernel-bin | lzma | \
|
||||
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
|
||||
IMAGE/sysupgrade.itb := append-kernel | \
|
||||
fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata
|
||||
ARTIFACTS := preloader.bin bl31-uboot.fip
|
||||
ARTIFACT/preloader.bin := mt7981-bl2 spim-nand-ddr3
|
||||
ARTIFACT/bl31-uboot.fip := mt7981-bl31-uboot cmcc_a10
|
||||
endef
|
||||
TARGET_DEVICES += cmcc_a10-ubootmod
|
||||
|
||||
define Device/cmcc_rax3000m
|
||||
DEVICE_VENDOR := CMCC
|
||||
DEVICE_MODEL := RAX3000M
|
||||
|
Loading…
x
Reference in New Issue
Block a user