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mediatek: add support for CMCC A10

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This board is also as known as SuperElectron ZN-M5 and ZN-M8. However,
for ZN-M5 and ZN-M8, there's another version uses ZX279128 as CPU
chip, which is unsupported.
You can check it in "高级设置" > "系统日志" > "内核日志" page from webUI.

Hardware specification:
  SoC: MediaTek MT7981B 2x A53
  Flash: 128 MB SPI-NAND
  RAM: 256MB
  Ethernet: 4x 10/100/1000 Mbps
  Switch: MediaTek MT7531AE
  WiFi: MediaTek MT7976C
  Button: Reset, WPS
  Power: DC 12V 1A

Stock layout flash instructions:
Login into webUI and upload sysupgrade firmware in "系统管理" > "升级固件" page.
Remember to unselect "保留配置" ("Keep configurations") first before doing that.

OpenWrt U-Boot layout flash instructions:
1. Flash stock layout firmware first.
2. Connect to the device via SSH, and backup everything,
   especially 'Factory' partition.
3. Unlock MTD partitions:
   opkg update && opkg install kmod-mtd-rw
   insmod mtd-rw i_want_a_brick=1
4. Write new BL2 and FIP:
   mtd write openwrt-mediatek-filogic-cmcc_a10-ubootmod-preloader.bin BL2
   mtd write openwrt-mediatek-filogic-cmcc_a10-ubootmod-bl31-uboot.fip FIP
5. Set static IP on your PC:
   IP 192.168.1.254/24, GW 192.168.1.1
6. Serve OpenWrt initramfs image using TFTP server.
7. Cut off the power and re-engage, wait for TFTP recovery to complete.
8. After OpenWrt has booted, perform sysupgrade.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/18121
(cherry picked from commit 96c6608346758ceffebf30d74cab00db58874bb9)
[sync uboot defconfigs with 24.10 branch, change apk to opkg]
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/18218
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Tianling Shen 2025-02-26 21:52:53 +08:00 committed by Hauke Mehrtens
parent 3da9786da3
commit df8679e29f
9 changed files with 721 additions and 0 deletions
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1
package/boot/uboot-envtools/files/mediatek_filogic
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@ -34,6 +34,7 @@ ubootenv_add_ubi_default() {
case "$board" in
abt,asr3000|\
cmcc,a10-ubootmod|\
h3c,magic-nx30-pro|\
jcg,q30-pro|\
mercusys,mr90x-v1-ubi|\

13
package/boot/uboot-mediatek/Makefile
View File

@ -231,6 +231,18 @@ define U-Boot/mt7981_abt_asr3000
DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
endef
define U-Boot/mt7981_cmcc_a10
NAME:=CMCC A10
BUILD_SUBTARGET:=filogic
BUILD_DEVICES:=cmcc_a10-ubootmod
UBOOT_CONFIG:=mt7981_cmcc_a10
UBOOT_IMAGE:=u-boot.fip
BL2_BOOTDEV:=spim-nand
BL2_SOC:=mt7981
BL2_DDRTYPE:=ddr3
DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
endef
define U-Boot/mt7981_cmcc_rax3000m-emmc
NAME:=CMCC RAX3000M
BUILD_SUBTARGET:=filogic
@ -832,6 +844,7 @@ UBOOT_TARGETS := \
mt7628_ravpower_rp-wd009 \
mt7629_rfb \
mt7981_abt_asr3000 \
mt7981_cmcc_a10 \
mt7981_cmcc_rax3000m-emmc \
mt7981_cmcc_rax3000m-nand \
mt7981_gatonetworks_gdsp \

327
package/boot/uboot-mediatek/patches/446-add-cmcc_a10.patch Normal file
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@ -0,0 +1,327 @@
--- /dev/null
+++ b/configs/mt7981_cmcc_a10_defconfig
@@ -0,0 +1,107 @@
+CONFIG_ARM=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_TEXT_BASE=0x41e00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="mt7981-cmcc-a10"
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_TARGET_MT7981=y
+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
+CONFIG_DEBUG_UART_BASE=0x11002000
+CONFIG_DEBUG_UART_CLOCK=40000000
+CONFIG_SYS_LOAD_ADDR=0x46000000
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=30
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_MENU_SHOW=y
+CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-cmcc-a10.dtb"
+CONFIG_LOGLEVEL=7
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_LOG=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="MT7981> "
+CONFIG_CMD_CPU=y
+CONFIG_CMD_LICENSE=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_ENV_FLAGS=y
+CONFIG_CMD_STRINGS=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_TFTPSRV=y
+CONFIG_CMD_RARP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CDP=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_PSTORE=y
+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
+CONFIG_CMD_UUID=y
+CONFIG_CMD_HASH=y
+CONFIG_CMD_SMC=y
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBI_RENAME=y
+CONFIG_OF_EMBED=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_ENV_UBI_PART="ubi"
+CONFIG_ENV_UBI_VOLUME="ubootenv"
+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_USE_DEFAULT_ENV_FILE=y
+CONFIG_DEFAULT_ENV_FILE="cmcc_a10_env"
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NETCONSOLE=y
+CONFIG_USE_IPADDR=y
+CONFIG_IPADDR="192.168.1.1"
+CONFIG_USE_SERVERIP=y
+CONFIG_SERVERIP="192.168.1.254"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_BUTTON=y
+CONFIG_BUTTON_GPIO=y
+CONFIG_CLK=y
+CONFIG_GPIO_HOG=y
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+# CONFIG_MMC is not set
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_PHY_FIXED=y
+CONFIG_MEDIATEK_ETH=y
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7981=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_RAM=y
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MTK_SPIM=y
+CONFIG_ZSTD=y
+CONFIG_HEXDUMP=y
+CONFIG_LMB_MAX_REGIONS=64
--- /dev/null
+++ b/arch/arm/dts/mt7981-cmcc-a10.dts
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/dts-v1/;
+#include "mt7981.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/linux-event-codes.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "CMCC A10";
+ compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
+
+ chosen {
+ stdout-path = &uart0;
+ tick-timer = &timer0;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x40000000 0x10000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ button-reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ button-wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ label = "blue:status";
+ gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ running_led: led-1 {
+ label = "green:status";
+ gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ boot_led: led-2 {
+ label = "red:status";
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+ };
+};
+
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "2500base-x";
+ mediatek,switch = "mt7531";
+ reset-gpios = <&gpio 39 GPIO_ACTIVE_HIGH>;
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ };
+};
+
+&pinctrl {
+ spi_flash_pins: spi0-pins-func-1 {
+ mux {
+ function = "flash";
+ groups = "spi0", "spi0_wp_hold";
+ };
+
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
+ };
+
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
+ };
+ };
+};
+
+&spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_flash_pins>;
+ status = "okay";
+ must_tx;
+ enhance_timing;
+ dma_ext;
+ ipm_design;
+ support_quad;
+ tick_dly = <2>;
+ sample_sel = <0>;
+
+ spi_nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "bl2";
+ reg = <0x0 0x100000>;
+ };
+
+ partition@100000 {
+ label = "u-boot-env";
+ reg = <0x100000 0x80000>;
+ };
+
+ partition@180000 {
+ label = "factory";
+ reg = <0x180000 0x200000>;
+ };
+
+ partition@380000 {
+ label = "fip";
+ reg = <0x380000 0x200000>;
+ };
+
+ partition@580000 {
+ label = "ubi";
+ reg = <0x580000 0x7a80000>;
+ compatible = "linux,ubi";
+ };
+ };
+ };
+};
+
+&uart0 {
+ mediatek,force-highspeed;
+ status = "okay";
+};
+
+&watchdog {
+ status = "disabled";
+};
--- /dev/null
+++ b/cmcc_a10_env
@@ -0,0 +1,54 @@
+ipaddr=192.168.1.1
+serverip=192.168.1.254
+loadaddr=0x46000000
+console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
+bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
+bootconf=config-1
+bootdelay=0
+bootfile=openwrt-mediatek-filogic-cmcc_a10-ubootmod-initramfs-recovery.itb
+bootfile_bl2=openwrt-mediatek-filogic-cmcc_a10-ubootmod-preloader.bin
+bootfile_fip=openwrt-mediatek-filogic-cmcc_a10-ubootmod-bl31-uboot.fip
+bootfile_upg=openwrt-mediatek-filogic-cmcc_a10-ubootmod-squashfs-sysupgrade.itb
+bootled_pwr=red:status
+bootled_rec=blue:status
+bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
+bootmenu_default=0
+bootmenu_delay=0
+bootmenu_title= ( ( ( OpenWrt ) ) )
+bootmenu_0=Initialize environment.=run _firstboot
+bootmenu_0d=Run default boot command.=run boot_default
+bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
+bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return
+bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return
+bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
+bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
+bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return
+bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
+bootmenu_8=Reboot.=reset
+bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
+boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
+boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
+boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
+boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off
+boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever
+boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
+boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
+boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
+boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
+boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory
+boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2
+reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
+mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
+mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
+ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
+ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
+ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
+ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
+ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
+ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
+ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
+ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
+_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
+_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
+_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
+_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver"

40
target/linux/mediatek/dts/mt7981b-cmcc-a10-stock.dts Normal file
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@ -0,0 +1,40 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7981b-cmcc-a10.dtsi"
/ {
model = "CMCC A10 (stock layout)";
compatible = "cmcc,a10-stock", "mediatek,mt7981";
};
&partitions {
partition@580000 {
label = "ubi";
reg = <0x580000 0x4000000>;
};
partition@4580000 {
label = "firmware_backup";
reg = <0x4580000 0x2000000>;
read-only;
};
partition@6580000 {
label = "zrsave";
reg = <0x6580000 0x100000>;
read-only;
};
partition@6680000 {
label = "config2";
reg = <0x6680000 0x100000>;
read-only;
};
};
&spi_nand {
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
};

28
target/linux/mediatek/dts/mt7981b-cmcc-a10-ubootmod.dts Normal file
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@ -0,0 +1,28 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7981b-cmcc-a10.dtsi"
/ {
model = "CMCC A10 (OpenWrt U-Boot layout)";
compatible = "cmcc,a10-ubootmod", "mediatek,mt7981";
};
&chosen {
bootargs = "root=/dev/fit0 rootwait";
rootdisk = <&ubi_rootdisk>;
};
&partitions {
partition@580000 {
compatible = "linux,ubi";
label = "ubi";
reg = <0x580000 0x7a80000>;
volumes {
ubi_rootdisk: ubi-volume-fit {
volname = "fit";
};
};
};
};

254
target/linux/mediatek/dts/mt7981b-cmcc-a10.dtsi Normal file
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@ -0,0 +1,254 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2023 Tianling Shen <cnsztl@immortalwrt.org>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "mt7981.dtsi"
/ {
aliases {
led-boot = &boot_led;
led-failsafe = &boot_led;
led-running = &running_led;
led-upgrade = &running_led;
serial0 = &uart0;
};
chosen: chosen {
stdout-path = "serial0:115200n8";
};
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
button-wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
led-0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
running_led: led-1 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
boot_led: led-2 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cells = <&macaddr_factory_2a 0>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_a: macaddr@a {
compatible = "mac-base";
reg = <0xa 0x6>;
#nvmem-cell-cells = <1>;
};
macaddr_factory_24: macaddr@24 {
compatible = "mac-base";
reg = <0x24 0x6>;
#nvmem-cell-cells = <1>;
};
macaddr_factory_2a: macaddr@2a {
compatible = "mac-base";
reg = <0x2a 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
read-only;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan3";
};
port@4 {
reg = <4>;
label = "wan";
nvmem-cells = <&macaddr_factory_24 0>;
nvmem-cell-names = "mac-address";
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
status = "okay";
band@1 {
reg = <1>;
nvmem-cells = <&macaddr_factory_a 0>;
nvmem-cell-names = "mac-address";
};
};

2
target/linux/mediatek/filogic/base-files/etc/board.d/02_network
View File

@ -30,6 +30,8 @@ mediatek_setup_interfaces()
;;
asus,rt-ax59u|\
cetron,ct3003|\
cmcc,a10-stock|\
cmcc,a10-ubootmod|\
confiabits,mt7981|\
cudy,wr3000-v1|\
jcg,q30-pro|\

1
target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
View File

@ -71,6 +71,7 @@ platform_do_upgrade() {
bananapi,bpi-r3-mini|\
bananapi,bpi-r4|\
bananapi,bpi-r4-poe|\
cmcc,a10-ubootmod|\
cmcc,rax3000m|\
gatonetworks,gdsp|\
h3c,magic-nx30-pro|\

55
target/linux/mediatek/image/filogic.mk
View File

@ -500,6 +500,61 @@ define Device/cetron_ct3003
endef
TARGET_DEVICES += cetron_ct3003
define Device/cmcc_a10-stock
DEVICE_VENDOR := CMCC
DEVICE_MODEL := A10 (stock layout)
DEVICE_ALT0_VENDOR := SuperElectron
DEVICE_ALT0_MODEL := ZN-M5 (stock layout)
DEVICE_ALT1_VENDOR := SuperElectron
DEVICE_ALT1_MODEL := ZN-M8 (stock layout)
DEVICE_DTS := mt7981b-cmcc-a10-stock
DEVICE_DTS_DIR := ../dts
SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 65536k
KERNEL_IN_UBI := 1
IMAGES += factory.bin
IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
KERNEL = kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
KERNEL_INITRAMFS = kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
endef
TARGET_DEVICES += cmcc_a10-stock
define Device/cmcc_a10-ubootmod
DEVICE_VENDOR := CMCC
DEVICE_MODEL := A10 (OpenWrt U-Boot layout)
DEVICE_ALT0_VENDOR := SuperElectron
DEVICE_ALT0_MODEL := ZN-M5 (OpenWrt U-Boot layout)
DEVICE_ALT1_VENDOR := SuperElectron
DEVICE_ALT1_MODEL := ZN-M8 (OpenWrt U-Boot layout)
DEVICE_DTS := mt7981b-cmcc-a10-ubootmod
DEVICE_DTS_DIR := ../dts
SUPPORTED_DEVICES += cmcc,a10
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
KERNEL_IN_UBI := 1
UBOOTENV_IN_UBI := 1
IMAGES := sysupgrade.itb
KERNEL_INITRAMFS_SUFFIX := -recovery.itb
KERNEL := kernel-bin | gzip
KERNEL_INITRAMFS := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
IMAGE/sysupgrade.itb := append-kernel | \
fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata
ARTIFACTS := preloader.bin bl31-uboot.fip
ARTIFACT/preloader.bin := mt7981-bl2 spim-nand-ddr3
ARTIFACT/bl31-uboot.fip := mt7981-bl31-uboot cmcc_a10
endef
TARGET_DEVICES += cmcc_a10-ubootmod
define Device/cmcc_rax3000m
DEVICE_VENDOR := CMCC
DEVICE_MODEL := RAX3000M