octeon: add 5.10 as testing kernel

Remove upstreamed parts from 100-ubnt_edgerouter2_support.patch.
Compile and runtime tested on Ubiquiti EdgeRouter Lite.

Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
This commit is contained in:
Stijn Tintel 2021-04-18 14:53:41 +03:00
parent 75c01ee2b9
commit de6080fa8e
9 changed files with 478 additions and 1 deletions

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@ -11,7 +11,7 @@ FEATURES:=squashfs ramdisk pci usb
CPU_TYPE:=octeonplus
KERNEL_PATCHVER:=5.4
KERNEL_TESTING_PATCHVER:=5.4
KERNEL_TESTING_PATCHVER:=5.10
define Target/Description
Build firmware images for Cavium Networks Octeon-based boards.

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@ -0,0 +1,260 @@
CONFIG_64BIT=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MMAP_RND_BITS=12
CONFIG_ARCH_MMAP_RND_BITS_MAX=18
CONFIG_ARCH_MMAP_RND_BITS_MIN=12
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_SCSI_REQUEST=y
CONFIG_BUILTIN_DTB=y
CONFIG_CAVIUM_CN63XXP1=y
CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=0
CONFIG_CAVIUM_OCTEON_LOCK_L2=y
CONFIG_CAVIUM_OCTEON_LOCK_L2_EXCEPTION=y
CONFIG_CAVIUM_OCTEON_LOCK_L2_INTERRUPT=y
CONFIG_CAVIUM_OCTEON_LOCK_L2_LOW_LEVEL_INTERRUPT=y
CONFIG_CAVIUM_OCTEON_LOCK_L2_MEMCPY=y
CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB=y
CONFIG_CAVIUM_OCTEON_SOC=y
CONFIG_CEVT_R4K=y
CONFIG_CLONE_BACKWARDS=y
# CONFIG_COMMON_CLK is not set
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_CAVIUM_OCTEON=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_CPU_MIPS64=y
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CPU_SUPPORTS_HUGEPAGES=y
CONFIG_CRAMFS=y
CONFIG_CRC16=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_MD5_OCTEON is not set
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_RNG2=y
# CONFIG_CRYPTO_SHA1_OCTEON is not set
# CONFIG_CRYPTO_SHA256_OCTEON is not set
# CONFIG_CRYPTO_SHA512_OCTEON is not set
CONFIG_DNOTIFY=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_EDAC=y
CONFIG_EDAC_ATOMIC_SCRUB=y
# CONFIG_EDAC_DEBUG is not set
CONFIG_EDAC_LEGACY_SYSFS=y
CONFIG_EDAC_OCTEON_L2C=y
CONFIG_EDAC_OCTEON_LMC=y
CONFIG_EDAC_OCTEON_PC=y
CONFIG_EDAC_OCTEON_PCI=y
CONFIG_EDAC_SUPPORT=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_EXT4_FS=y
CONFIG_F2FS_FS=y
CONFIG_FAT_FS=y
CONFIG_FIXED_PHY=y
CONFIG_FRAME_WARN=2048
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_OCTEON=y
CONFIG_GRO_CELLS=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HOLES_IN_ZONE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_OCTEON=y
CONFIG_HZ=250
CONFIG_HZ_250=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_OCTEON=y
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_LIBFDT=y
CONFIG_LLD_VERSION=0
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_CAVIUM=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MDIO_OCTEON=y
CONFIG_MEMFD_CREATE=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
# CONFIG_MIPS32_N32 is not set
# CONFIG_MIPS32_O32 is not set
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
# CONFIG_MIPS_CMDLINE_FROM_DTB is not set
CONFIG_MIPS_EBPF_JIT=y
CONFIG_MIPS_ELF_APPENDED_DTB=y
CONFIG_MIPS_L1_CACHE_SHIFT=7
CONFIG_MIPS_L1_CACHE_SHIFT_7=y
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_NR_CPU_NR_MAP=1024
CONFIG_MIPS_NR_CPU_NR_MAP_1024=y
CONFIG_MIPS_PGD_C0_CONTEXT=y
# CONFIG_MIPS_RAW_APPENDED_DTB is not set
CONFIG_MIPS_SPRAM=y
# CONFIG_MIPS_VA_BITS_48 is not set
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_CAVIUM_OCTEON=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NLS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NR_CPUS=16
CONFIG_NR_CPUS_DEFAULT_64=y
CONFIG_NVMEM=y
CONFIG_OCTEON_ETHERNET=y
CONFIG_OCTEON_ILM=y
CONFIG_OCTEON_MGMT_ETHERNET=y
CONFIG_OCTEON_USB=y
CONFIG_OCTEON_WDT=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_PADATA=y
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RAS=y
CONFIG_RCU_NEED_SEGCBLIST=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_RELAY=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_SCSI=y
CONFIG_SECCOMP=y
CONFIG_SECCOMP_FILTER=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_8250_DWLIB=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_STATIC=y
CONFIG_SPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_OCTEON=y
CONFIG_SRCU=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_CAVIUM_OCTEON=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_SYS_SUPPORTS_RELOCATABLE=y
CONFIG_SYS_SUPPORTS_SMP=y
CONFIG_TARGET_ISA_REV=2
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
# CONFIG_USB_OCTEON_EHCI is not set
# CONFIG_USB_OCTEON_OHCI is not set
CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
CONFIG_VFAT_FS=y
CONFIG_VITESSE_PHY=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WATCHDOG_CORE=y
CONFIG_WEAK_ORDERING=y
CONFIG_XPS=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZONE_DMA32=y

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@ -0,0 +1,11 @@
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
@@ -174,6 +174,8 @@ int cvmx_helper_board_get_mii_address(in
return 7 - ipd_port;
else
return -1;
+ case CVMX_BOARD_TYPE_UBNT_E200:
+ return -1;
case CVMX_BOARD_TYPE_KONTRON_S1901:
if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT)
return 1;

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@ -0,0 +1,34 @@
--- a/drivers/staging/octeon/ethernet.c
+++ b/drivers/staging/octeon/ethernet.c
@@ -683,6 +683,7 @@ static int cvm_oct_probe(struct platform
int interface;
int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE;
int qos;
+ int i;
struct device_node *pip;
int mtu_overhead = ETH_HLEN + ETH_FCS_LEN;
@@ -804,13 +805,19 @@ static int cvm_oct_probe(struct platform
}
num_interfaces = cvmx_helper_get_number_of_interfaces();
- for (interface = 0; interface < num_interfaces; interface++) {
- cvmx_helper_interface_mode_t imode =
- cvmx_helper_interface_get_mode(interface);
- int num_ports = cvmx_helper_ports_on_interface(interface);
+ for (i = 0; i < num_interfaces; i++) {
+ cvmx_helper_interface_mode_t imode;
+ int interface;
+ int num_ports;
int port;
int port_index;
+ interface = i;
+ if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_UBNT_E200)
+ interface = num_interfaces - (i + 1);
+
+ num_ports = cvmx_helper_ports_on_interface(interface);
+ imode = cvmx_helper_interface_get_mode(interface);
for (port_index = 0,
port = cvmx_helper_get_ipd_port(interface, 0);
port < cvmx_helper_get_ipd_port(interface, num_ports);

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@ -0,0 +1,47 @@
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -654,6 +654,35 @@ void octeon_user_io_init(void)
write_c0_derraddr1(0);
}
+#ifdef CONFIG_IMAGE_CMDLINE_HACK
+extern char __image_cmdline[];
+
+static int __init octeon_use_image_cmdline(void)
+{
+ char *p = __image_cmdline;
+ int replace = 0;
+
+ if (*p == '-') {
+ replace = 1;
+ p++;
+ }
+
+ if (*p == '\0')
+ return 0;
+
+ if (replace) {
+ strlcpy(arcs_cmdline, p, sizeof(arcs_cmdline));
+ } else {
+ strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
+ strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));
+ }
+
+ return 1;
+}
+#else
+static inline int octeon_use_image_cmdline(void) { return 0; }
+#endif
+
/**
* Early entry point for arch setup
*/
@@ -898,6 +927,8 @@ void __init prom_init(void)
}
}
+ octeon_use_image_cmdline();
+
if (strstr(arcs_cmdline, "console=") == NULL) {
if (octeon_uart == 1)
strcat(arcs_cmdline, " console=ttyS1,115200");

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@ -0,0 +1,42 @@
--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h
+++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
@@ -297,7 +297,7 @@ enum cvmx_board_types_enum {
CVMX_BOARD_TYPE_UBNT_E100 = 20002,
CVMX_BOARD_TYPE_UBNT_E200 = 20003,
CVMX_BOARD_TYPE_UBNT_E220 = 20005,
- CVMX_BOARD_TYPE_CUST_DSR1000N = 20006,
+ CVMX_BOARD_TYPE_ITUS_SHIELD = 20006,
CVMX_BOARD_TYPE_KONTRON_S1901 = 21901,
CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000,
@@ -400,7 +400,7 @@ static inline const char *cvmx_board_typ
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E200)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E220)
- ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DSR1000N)
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_ITUS_SHIELD)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KONTRON_S1901)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX)
}
--- a/arch/mips/cavium-octeon/octeon-platform.c
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -771,7 +771,7 @@ int __init octeon_prune_device_tree(void
if (fdt_check_header(initial_boot_params))
panic("Corrupt Device Tree.");
- WARN(octeon_bootinfo->board_type == CVMX_BOARD_TYPE_CUST_DSR1000N,
+ WARN(octeon_bootinfo->board_type == CVMX_BOARD_TYPE_ITUS_SHIELD,
"Built-in DTB booting is deprecated on %s. Please switch to use appended DTB.",
cvmx_board_type_to_string(octeon_bootinfo->board_type));
--- a/arch/mips/pci/pci-octeon.c
+++ b/arch/mips/pci/pci-octeon.c
@@ -211,8 +211,6 @@ const char *octeon_get_pci_interrupts(vo
return "AAABAAAAAAAAAAAAAAAAAAAAAAAAAAAA";
case CVMX_BOARD_TYPE_BBGW_REF:
return "AABCD";
- case CVMX_BOARD_TYPE_CUST_DSR1000N:
- return "CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC";
case CVMX_BOARD_TYPE_THUNDER:
case CVMX_BOARD_TYPE_EBH3000:
default:

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@ -0,0 +1,18 @@
--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h
+++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
@@ -298,6 +298,7 @@ enum cvmx_board_types_enum {
CVMX_BOARD_TYPE_UBNT_E200 = 20003,
CVMX_BOARD_TYPE_UBNT_E220 = 20005,
CVMX_BOARD_TYPE_ITUS_SHIELD = 20006,
+ CVMX_BOARD_TYPE_UBNT_E300 = 20300,
CVMX_BOARD_TYPE_KONTRON_S1901 = 21901,
CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000,
@@ -401,6 +402,7 @@ static inline const char *cvmx_board_typ
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E200)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E220)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_ITUS_SHIELD)
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E300)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KONTRON_S1901)
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX)
}

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@ -0,0 +1,38 @@
From: Roman Kuzmitskii <damex.pp@icloud.com>
Date: Wed, 28 Oct 2020 19:00:00 +0000
Subject: [PATCH] staging: octeon: add net-labels support
With this patch, device name can be set within dts file
in the same way as dsa port can.
Add label to pip interface node to use this feature:
label = "lan0";
Tested-by: Johannes Kimmel <fff@bareminimum.eu>
Signed-off-by: Roman Kuzmitskii <damex.pp@icloud.com>
--- a/drivers/staging/octeon/ethernet.c
+++ b/drivers/staging/octeon/ethernet.c
@@ -408,9 +408,12 @@ int cvm_oct_common_init(struct net_devic
{
struct octeon_ethernet *priv = netdev_priv(dev);
const u8 *mac = NULL;
+ const u8 *label = NULL;
- if (priv->of_node)
+ if (priv->of_node) {
mac = of_get_mac_address(priv->of_node);
+ label = of_get_property(priv->of_node, "label", NULL);
+ }
if (!IS_ERR_OR_NULL(mac))
ether_addr_copy(dev->dev_addr, mac);
@@ -445,6 +448,9 @@ int cvm_oct_common_init(struct net_devic
if (dev->netdev_ops->ndo_stop)
dev->netdev_ops->ndo_stop(dev);
+ if (!IS_ERR_OR_NULL(label))
+ dev_alloc_name(dev, label);
+
return 0;
}

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@ -0,0 +1,27 @@
From: Roman Kuzmitskii <damex.pp@icloud.com>
Date: Sun, 01 Nov 2020 19:00:00 +0000
Subject: [PATCH] staging: octeon: sgmii to honor disabled dt node status
With this patch, sgmii interface device tree node could be disabled and
that disabled interface will not be unnecessarily initialized.
It solves the problem with Octeon boards that have 8 sgmii or more ports
initialized but have nothing connected to them.
Tested-by: Johannes Kimmel <fff@bareminimum.eu>
Signed-off-by: Roman Kuzmitskii <damex.pp@icloud.com>
--- a/drivers/staging/octeon/ethernet.c
+++ b/drivers/staging/octeon/ethernet.c
@@ -883,8 +883,10 @@ static int cvm_oct_probe(struct platform
case CVMX_HELPER_INTERFACE_MODE_SGMII:
priv->phy_mode = PHY_INTERFACE_MODE_SGMII;
- dev->netdev_ops = &cvm_oct_sgmii_netdev_ops;
- strscpy(dev->name, "eth%d", sizeof(dev->name));
+ if (of_device_is_available(priv->of_node)) {
+ dev->netdev_ops = &cvm_oct_sgmii_netdev_ops;
+ strscpy(dev->name, "eth%d", sizeof(dev->name));
+ }
break;
case CVMX_HELPER_INTERFACE_MODE_SPI: