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mediatek: fix U-Boot pinctrl setup for mt7623 eMMC
The U-Boot pinctrl driver for mt7623 was incomplete and didn't handle the settings required for eMMC to work. Submitted upstream at https://patchwork.ozlabs.org/project/uboot/list/?series=184529 Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This commit is contained in:
David Woodhouse
Petr Štetiar
parent
f0b51c1389
commit
dc4699470b
236
package/boot/uboot-mediatek/patches/006-mt7623-pinctrl-fix.patch
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236
package/boot/uboot-mediatek/patches/006-mt7623-pinctrl-fix.patch
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@ -0,0 +1,236 @@
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From eca387ea507bde160558a0e5301bf2e0f1985b3b Mon Sep 17 00:00:00 2001
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From: David Woodhouse <dwmw2@infradead.org>
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Date: Fri, 19 Jun 2020 11:34:32 +0100
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Subject: [PATCH] pinctrl: mediatek: add PUPD/R0/R1 support for MT7623
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The pins for the MMC controller weren't being set up correctly because the
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pinctrl driver only sets the GPIO pullup/pulldown config and doesn't
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handle the special cases with PUPD/R0/R1 control.
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Signed-off-by: David Woodhouse <dwmw2@infradead.org>
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---
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drivers/pinctrl/mediatek/pinctrl-mt7623.c | 129 ++++++++++++++++++
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drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 19 ++-
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drivers/pinctrl/mediatek/pinctrl-mtk-common.h | 3 +
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3 files changed, 146 insertions(+), 5 deletions(-)
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diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7623.c b/drivers/pinctrl/mediatek/pinctrl-mt7623.c
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index d58d840e08..0f5dcb2c63 100644
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--- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mt7623.c
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@@ -262,6 +262,132 @@ static const struct mtk_pin_field_calc mt7623_pin_drv_range[] = {
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PIN_FIELD16(278, 278, 0xf70, 0x10, 8, 4),
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};
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+static const struct mtk_pin_field_calc mt7623_pin_pupd_range[] = {
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+ /* MSDC0 */
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+ PIN_FIELD16(111, 111, 0xd00, 0x10, 12, 1),
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+ PIN_FIELD16(112, 112, 0xd00, 0x10, 8, 1),
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+ PIN_FIELD16(113, 113, 0xd00, 0x10, 4, 1),
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+ PIN_FIELD16(114, 114, 0xd00, 0x10, 0, 1),
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+ PIN_FIELD16(115, 115, 0xd10, 0x10, 0, 1),
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+ PIN_FIELD16(116, 116, 0xcd0, 0x10, 8, 1),
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+ PIN_FIELD16(117, 117, 0xcc0, 0x10, 8, 1),
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+ PIN_FIELD16(118, 118, 0xcf0, 0x10, 12, 1),
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+ PIN_FIELD16(119, 119, 0xcf0, 0x10, 8, 1),
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+ PIN_FIELD16(120, 120, 0xcf0, 0x10, 4, 1),
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+ PIN_FIELD16(121, 121, 0xcf0, 0x10, 0, 1),
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+ /* MSDC1 */
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+ PIN_FIELD16(105, 105, 0xd40, 0x10, 8, 1),
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+ PIN_FIELD16(106, 106, 0xd30, 0x10, 8, 1),
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+ PIN_FIELD16(107, 107, 0xd60, 0x10, 0, 1),
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+ PIN_FIELD16(108, 108, 0xd60, 0x10, 10, 1),
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+ PIN_FIELD16(109, 109, 0xd60, 0x10, 4, 1),
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+ PIN_FIELD16(110, 110, 0xc60, 0x10, 12, 1),
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+ /* MSDC1 */
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+ PIN_FIELD16(85, 85, 0xda0, 0x10, 8, 1),
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+ PIN_FIELD16(86, 86, 0xd90, 0x10, 8, 1),
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+ PIN_FIELD16(87, 87, 0xdc0, 0x10, 0, 1),
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+ PIN_FIELD16(88, 88, 0xdc0, 0x10, 10, 1),
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+ PIN_FIELD16(89, 89, 0xdc0, 0x10, 4, 1),
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+ PIN_FIELD16(90, 90, 0xdc0, 0x10, 12, 1),
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+ /* MSDC0E */
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+ PIN_FIELD16(249, 249, 0x140, 0x10, 0, 1),
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+ PIN_FIELD16(250, 250, 0x130, 0x10, 12, 1),
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+ PIN_FIELD16(251, 251, 0x130, 0x10, 8, 1),
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+ PIN_FIELD16(252, 252, 0x130, 0x10, 4, 1),
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+ PIN_FIELD16(253, 253, 0x130, 0x10, 0, 1),
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+ PIN_FIELD16(254, 254, 0xf40, 0x10, 12, 1),
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+ PIN_FIELD16(255, 255, 0xf40, 0x10, 8, 1),
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+ PIN_FIELD16(256, 256, 0xf40, 0x10, 4, 1),
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+ PIN_FIELD16(257, 257, 0xf40, 0x10, 0, 1),
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+ PIN_FIELD16(258, 258, 0xcb0, 0x10, 8, 1),
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+ PIN_FIELD16(259, 259, 0xc90, 0x10, 8, 1),
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+ PIN_FIELD16(261, 261, 0x140, 0x10, 8, 1),
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+};
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+
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+static const struct mtk_pin_field_calc mt7623_pin_r1_range[] = {
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+ /* MSDC0 */
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+ PIN_FIELD16(111, 111, 0xd00, 0x10, 13, 1),
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+ PIN_FIELD16(112, 112, 0xd00, 0x10, 9, 1),
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+ PIN_FIELD16(113, 113, 0xd00, 0x10, 5, 1),
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+ PIN_FIELD16(114, 114, 0xd00, 0x10, 1, 1),
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+ PIN_FIELD16(115, 115, 0xd10, 0x10, 1, 1),
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+ PIN_FIELD16(116, 116, 0xcd0, 0x10, 9, 1),
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+ PIN_FIELD16(117, 117, 0xcc0, 0x10, 9, 1),
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+ PIN_FIELD16(118, 118, 0xcf0, 0x10, 13, 1),
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+ PIN_FIELD16(119, 119, 0xcf0, 0x10, 9, 1),
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+ PIN_FIELD16(120, 120, 0xcf0, 0x10, 5, 1),
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+ PIN_FIELD16(121, 121, 0xcf0, 0x10, 1, 1),
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+ /* MSDC1 */
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+ PIN_FIELD16(105, 105, 0xd40, 0x10, 9, 1),
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+ PIN_FIELD16(106, 106, 0xd30, 0x10, 9, 1),
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+ PIN_FIELD16(107, 107, 0xd60, 0x10, 1, 1),
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+ PIN_FIELD16(108, 108, 0xd60, 0x10, 9, 1),
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+ PIN_FIELD16(109, 109, 0xd60, 0x10, 5, 1),
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+ PIN_FIELD16(110, 110, 0xc60, 0x10, 13, 1),
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+ /* MSDC2 */
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+ PIN_FIELD16(85, 85, 0xda0, 0x10, 9, 1),
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+ PIN_FIELD16(86, 86, 0xd90, 0x10, 9, 1),
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+ PIN_FIELD16(87, 87, 0xdc0, 0x10, 1, 1),
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+ PIN_FIELD16(88, 88, 0xdc0, 0x10, 9, 1),
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+ PIN_FIELD16(89, 89, 0xdc0, 0x10, 5, 1),
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+ PIN_FIELD16(90, 90, 0xdc0, 0x10, 13, 1),
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+ /* MSDC0E */
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+ PIN_FIELD16(249, 249, 0x140, 0x10, 1, 1),
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+ PIN_FIELD16(250, 250, 0x130, 0x10, 13, 1),
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+ PIN_FIELD16(251, 251, 0x130, 0x10, 9, 1),
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+ PIN_FIELD16(252, 252, 0x130, 0x10, 5, 1),
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+ PIN_FIELD16(253, 253, 0x130, 0x10, 1, 1),
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+ PIN_FIELD16(254, 254, 0xf40, 0x10, 13, 1),
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+ PIN_FIELD16(255, 255, 0xf40, 0x10, 9, 1),
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+ PIN_FIELD16(256, 256, 0xf40, 0x10, 5, 1),
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+ PIN_FIELD16(257, 257, 0xf40, 0x10, 1, 1),
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+ PIN_FIELD16(258, 258, 0xcb0, 0x10, 9, 1),
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+ PIN_FIELD16(259, 259, 0xc90, 0x10, 9, 1),
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+ PIN_FIELD16(261, 261, 0x140, 0x10, 9, 1),
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+};
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+
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+static const struct mtk_pin_field_calc mt7623_pin_r0_range[] = {
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+ /* MSDC0 */
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+ PIN_FIELD16(111, 111, 0xd00, 0x10, 14, 1),
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+ PIN_FIELD16(112, 112, 0xd00, 0x10, 10, 1),
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+ PIN_FIELD16(113, 113, 0xd00, 0x10, 6, 1),
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+ PIN_FIELD16(114, 114, 0xd00, 0x10, 2, 1),
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+ PIN_FIELD16(115, 115, 0xd10, 0x10, 2, 1),
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+ PIN_FIELD16(116, 116, 0xcd0, 0x10, 10, 1),
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+ PIN_FIELD16(117, 117, 0xcc0, 0x10, 10, 1),
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+ PIN_FIELD16(118, 118, 0xcf0, 0x10, 14, 1),
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+ PIN_FIELD16(119, 119, 0xcf0, 0x10, 10, 1),
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+ PIN_FIELD16(120, 120, 0xcf0, 0x10, 6, 1),
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+ PIN_FIELD16(121, 121, 0xcf0, 0x10, 2, 1),
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+ /* MSDC1 */
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+ PIN_FIELD16(105, 105, 0xd40, 0x10, 10, 1),
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+ PIN_FIELD16(106, 106, 0xd30, 0x10, 10, 1),
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+ PIN_FIELD16(107, 107, 0xd60, 0x10, 2, 1),
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+ PIN_FIELD16(108, 108, 0xd60, 0x10, 8, 1),
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+ PIN_FIELD16(109, 109, 0xd60, 0x10, 6, 1),
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+ PIN_FIELD16(110, 110, 0xc60, 0x10, 14, 1),
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+ /* MSDC2 */
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+ PIN_FIELD16(85, 85, 0xda0, 0x10, 10, 1),
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+ PIN_FIELD16(86, 86, 0xd90, 0x10, 10, 1),
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+ PIN_FIELD16(87, 87, 0xdc0, 0x10, 2, 1),
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+ PIN_FIELD16(88, 88, 0xdc0, 0x10, 8, 1),
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+ PIN_FIELD16(89, 89, 0xdc0, 0x10, 6, 1),
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+ PIN_FIELD16(90, 90, 0xdc0, 0x10, 14, 1),
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+ /* MSDC0E */
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+ PIN_FIELD16(249, 249, 0x140, 0x10, 2, 1),
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+ PIN_FIELD16(250, 250, 0x130, 0x10, 14, 1),
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+ PIN_FIELD16(251, 251, 0x130, 0x10, 10, 1),
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+ PIN_FIELD16(252, 252, 0x130, 0x10, 6, 1),
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+ PIN_FIELD16(253, 253, 0x130, 0x10, 2, 1),
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+ PIN_FIELD16(254, 254, 0xf40, 0x10, 14, 1),
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+ PIN_FIELD16(255, 255, 0xf40, 0x10, 10, 1),
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+ PIN_FIELD16(256, 256, 0xf40, 0x10, 6, 1),
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+ PIN_FIELD16(257, 257, 0xf40, 0x10, 5, 1),
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+ PIN_FIELD16(258, 258, 0xcb0, 0x10, 10, 1),
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+ PIN_FIELD16(259, 259, 0xc90, 0x10, 10, 1),
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+ PIN_FIELD16(261, 261, 0x140, 0x10, 10, 1),
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+};
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+
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static const struct mtk_pin_reg_calc mt7623_reg_cals[] = {
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[PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt7623_pin_mode_range),
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[PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt7623_pin_dir_range),
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@@ -272,6 +398,9 @@ static const struct mtk_pin_reg_calc mt7623_reg_cals[] = {
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[PINCTRL_PIN_REG_PULLSEL] = MTK_RANGE(mt7623_pin_pullsel_range),
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[PINCTRL_PIN_REG_PULLEN] = MTK_RANGE(mt7623_pin_pullen_range),
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[PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt7623_pin_drv_range),
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+ [PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt7623_pin_pupd_range),
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+ [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt7623_pin_r0_range),
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+ [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt7623_pin_r1_range),
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};
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static const struct mtk_pin_desc mt7623_pins[] = {
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diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
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index 5fdc150295..f5199fc574 100644
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--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
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+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
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@@ -296,7 +296,7 @@ static const struct pinconf_param mtk_conf_params[] = {
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};
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-int mtk_pinconf_bias_set_v0(struct udevice *dev, u32 pin, u32 arg)
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+int mtk_pinconf_bias_set_v0(struct udevice *dev, u32 pin, u32 arg, u32 val)
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{
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int err, disable, pullup;
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@@ -323,12 +323,14 @@ int mtk_pinconf_bias_set_v0(struct udevice *dev, u32 pin, u32 arg)
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return 0;
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}
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-int mtk_pinconf_bias_set_v1(struct udevice *dev, u32 pin, u32 arg)
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+int mtk_pinconf_bias_set_v1(struct udevice *dev, u32 pin, u32 arg, u32 val)
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{
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- int err, disable, pullup;
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+ int err, disable, pullup, r0, r1;
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disable = (arg == PIN_CONFIG_BIAS_DISABLE);
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pullup = (arg == PIN_CONFIG_BIAS_PULL_UP);
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+ r0 = !!(val & 1);
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+ r1 = !!(val & 2);
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if (disable) {
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err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PULLEN, 0);
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@@ -344,6 +346,13 @@ int mtk_pinconf_bias_set_v1(struct udevice *dev, u32 pin, u32 arg)
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return err;
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}
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+ /* Also set PUPD/R0/R1 if the pin has them */
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+ err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PUPD, !pullup);
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+ if (err != -EINVAL) {
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+ mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R0, r0);
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+ mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R1, r1);
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+ }
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+
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return 0;
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}
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@@ -419,9 +428,9 @@ static int mtk_pinconf_set(struct udevice *dev, unsigned int pin,
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case PIN_CONFIG_BIAS_PULL_UP:
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case PIN_CONFIG_BIAS_PULL_DOWN:
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if (rev == MTK_PINCTRL_V0)
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- err = mtk_pinconf_bias_set_v0(dev, pin, param);
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+ err = mtk_pinconf_bias_set_v0(dev, pin, param, arg);
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else
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- err = mtk_pinconf_bias_set_v1(dev, pin, param);
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+ err = mtk_pinconf_bias_set_v1(dev, pin, param, arg);
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if (err)
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goto err;
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break;
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diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
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index e815761450..5e51a9a90c 100644
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--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
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+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
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@@ -51,6 +51,9 @@ enum {
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PINCTRL_PIN_REG_PULLEN,
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PINCTRL_PIN_REG_PULLSEL,
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PINCTRL_PIN_REG_DRV,
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+ PINCTRL_PIN_REG_PUPD,
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+ PINCTRL_PIN_REG_R0,
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+ PINCTRL_PIN_REG_R1,
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PINCTRL_PIN_REG_MAX,
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};
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--
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2.26.2
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