sifiveu: remove upstreamed patches, refresh remaining ones

Upstreamed:
0002-riscv-sifive-unmatched-update-regulators-values.patch
0003-riscv-sifive-unmatched-define-PWM-LEDs.patch
0006-riscv-sbi-srst-support.patch

Compile-tested: HiFive Unleashed / Unmatched
Runtime-tested: HiFive Unleashed / Unmatched

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
This commit is contained in:
Zoltan HERPAI 2023-09-22 19:47:01 +02:00
parent 1871aa145b
commit d9a8747a3d
5 changed files with 12 additions and 486 deletions

View File

@ -1,104 +0,0 @@
From 657819ff477dd73cd71075609698aa57ba098d8c Mon Sep 17 00:00:00 2001
From: David Abdurachmanov <david.abdurachmanov@sifive.com>
Date: Wed, 15 Sep 2021 07:10:02 -0700
Subject: [PATCH 2/7] riscv: sifive: unmatched: update regulators values
These are the regulators values from the schematics for Rev3{A,B} boards.
Note this is not fully correct as bcore1/bcore2 and bmem/bio are merged, but
it's only supported in v5.15 kernel. See:
541ee8f640327f951e7039278057827322231ab0 ("regulator: da9063: Add support for
full-current mode.")
This will be changed for v5.15 kernel based on the patch above.
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
---
.../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 32 +++++++++++-----------
1 file changed, 16 insertions(+), 16 deletions(-)
--- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
@@ -73,16 +73,16 @@
regulators {
vdd_bcore1: bcore1 {
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
regulator-min-microamp = <5000000>;
regulator-max-microamp = <5000000>;
regulator-always-on;
};
vdd_bcore2: bcore2 {
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
regulator-min-microamp = <5000000>;
regulator-max-microamp = <5000000>;
regulator-always-on;
@@ -137,48 +137,48 @@
};
vdd_ldo3: ldo3 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
regulator-min-microamp = <200000>;
regulator-max-microamp = <200000>;
regulator-always-on;
};
vdd_ldo4: ldo4 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
regulator-min-microamp = <200000>;
regulator-max-microamp = <200000>;
regulator-always-on;
};
vdd_ldo5: ldo5 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
regulator-min-microamp = <100000>;
regulator-max-microamp = <100000>;
regulator-always-on;
};
vdd_ldo6: ldo6 {
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
regulator-min-microamp = <200000>;
regulator-max-microamp = <200000>;
regulator-always-on;
};
vdd_ldo7: ldo7 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
regulator-min-microamp = <200000>;
regulator-max-microamp = <200000>;
regulator-always-on;
};
vdd_ldo8: ldo8 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
regulator-min-microamp = <200000>;
regulator-max-microamp = <200000>;
regulator-always-on;

View File

@ -1,69 +0,0 @@
From 2c2d8ac8c124a2938c9326c14b2dffd46d76b4a8 Mon Sep 17 00:00:00 2001
From: David Abdurachmanov <david.abdurachmanov@sifive.com>
Date: Mon, 13 Sep 2021 02:15:37 -0700
Subject: [PATCH 3/7] riscv: sifive: unmatched: define PWM LEDs
Add D2 (RGB) and D12 (green) LEDs for SiFive Unmatched board.
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
---
.../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 41 ++++++++++++++++++++++
1 file changed, 41 insertions(+)
--- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
@@ -4,6 +4,8 @@
#include "fu740-c000.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pwm/pwm.h>
/* Clock frequency (in Hz) of the PCB crystal for rtcclk */
#define RTCCLK_FREQ 1000000
@@ -31,6 +33,45 @@
soc {
};
+ pwmleds {
+ compatible = "pwm-leds";
+ green-d12 {
+ label = "green:d12";
+ color = <LED_COLOR_ID_GREEN>;
+ pwms = <&pwm0 0 7812500 PWM_POLARITY_INVERTED>;
+ active-low = <1>;
+ max-brightness = <255>;
+ linux,default-trigger = "none";
+ };
+
+ green-d2 {
+ label = "green:d2";
+ color = <LED_COLOR_ID_GREEN>;
+ pwms = <&pwm0 1 7812500 PWM_POLARITY_INVERTED>;
+ active-low = <1>;
+ max-brightness = <255>;
+ linux,default-trigger = "none";
+ };
+
+ red-d2 {
+ label = "red:d2";
+ color = <LED_COLOR_ID_RED>;
+ pwms = <&pwm0 2 7812500 PWM_POLARITY_INVERTED>;
+ active-low = <1>;
+ max-brightness = <255>;
+ linux,default-trigger = "none";
+ };
+
+ blue-d2 {
+ label = "blue:d2";
+ color = <LED_COLOR_ID_BLUE>;
+ pwms = <&pwm0 3 7812500 PWM_POLARITY_INVERTED>;
+ active-low = <1>;
+ max-brightness = <255>;
+ linux,default-trigger = "none";
+ };
+ };
+
hfclk: hfclk {
#clock-cells = <0>;
compatible = "fixed-clock";

View File

@ -12,9 +12,9 @@ Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
--- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts --- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts +++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
@@ -85,6 +85,11 @@ @@ -86,6 +86,11 @@
clock-frequency = <RTCCLK_FREQ>; };
clock-output-names = "rtcclk"; };
}; };
+ +
+ gpio-poweroff { + gpio-poweroff {

View File

@ -14,9 +14,9 @@ Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
--- a/arch/riscv/Kconfig --- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig
@@ -566,6 +566,14 @@ config BUILTIN_DTB @@ -711,6 +711,14 @@ config PORTABLE
depends on OF select OF
default y if XIP_KERNEL select MMU
+menu "CPU Power Management" +menu "CPU Power Management"
+ +
@ -35,7 +35,7 @@ Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
i-cache-size = <16384>; i-cache-size = <16384>;
reg = <0>; reg = <0>;
riscv,isa = "rv64imac"; riscv,isa = "rv64imac";
+ clocks = <&prci PRCI_CLK_COREPLL>; + clocks = <&prci FU540_PRCI_CLK_COREPLL>;
status = "disabled"; status = "disabled";
cpu0_intc: interrupt-controller { cpu0_intc: interrupt-controller {
#interrupt-cells = <1>; #interrupt-cells = <1>;
@ -43,7 +43,7 @@ Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
reg = <1>; reg = <1>;
riscv,isa = "rv64imafdc"; riscv,isa = "rv64imafdc";
tlb-split; tlb-split;
+ clocks = <&prci PRCI_CLK_COREPLL>; + clocks = <&prci FU540_PRCI_CLK_COREPLL>;
next-level-cache = <&l2cache>; next-level-cache = <&l2cache>;
cpu1_intc: interrupt-controller { cpu1_intc: interrupt-controller {
#interrupt-cells = <1>; #interrupt-cells = <1>;
@ -51,7 +51,7 @@ Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
reg = <2>; reg = <2>;
riscv,isa = "rv64imafdc"; riscv,isa = "rv64imafdc";
tlb-split; tlb-split;
+ clocks = <&prci PRCI_CLK_COREPLL>; + clocks = <&prci FU540_PRCI_CLK_COREPLL>;
next-level-cache = <&l2cache>; next-level-cache = <&l2cache>;
cpu2_intc: interrupt-controller { cpu2_intc: interrupt-controller {
#interrupt-cells = <1>; #interrupt-cells = <1>;
@ -59,7 +59,7 @@ Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
reg = <3>; reg = <3>;
riscv,isa = "rv64imafdc"; riscv,isa = "rv64imafdc";
tlb-split; tlb-split;
+ clocks = <&prci PRCI_CLK_COREPLL>; + clocks = <&prci FU540_PRCI_CLK_COREPLL>;
next-level-cache = <&l2cache>; next-level-cache = <&l2cache>;
cpu3_intc: interrupt-controller { cpu3_intc: interrupt-controller {
#interrupt-cells = <1>; #interrupt-cells = <1>;
@ -67,13 +67,13 @@ Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
reg = <4>; reg = <4>;
riscv,isa = "rv64imafdc"; riscv,isa = "rv64imafdc";
tlb-split; tlb-split;
+ clocks = <&prci PRCI_CLK_COREPLL>; + clocks = <&prci FU540_PRCI_CLK_COREPLL>;
next-level-cache = <&l2cache>; next-level-cache = <&l2cache>;
cpu4_intc: interrupt-controller { cpu4_intc: interrupt-controller {
#interrupt-cells = <1>; #interrupt-cells = <1>;
--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
@@ -84,6 +84,40 @@ @@ -80,6 +80,40 @@
label = "d4"; label = "d4";
}; };
}; };

View File

@ -1,301 +0,0 @@
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From: Anup Patel <anup.patel@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>
Cc: Atish Patra <atish.patra@wdc.com>,
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Subject: [PATCH v7 1/1] RISC-V: Use SBI SRST extension when available
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The SBI SRST extension provides a standard way to poweroff and
reboot the system irrespective to whether Linux RISC-V S-mode
is running natively (HS-mode) or inside Guest/VM (VS-mode).
The SBI SRST extension is available in the SBI v0.3 specification.
(Refer, https://github.com/riscv/riscv-sbi-doc/releases/tag/v0.3.0-rc1)
This patch extends Linux RISC-V SBI implementation to detect
and use SBI SRST extension.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/include/asm/sbi.h | 24 ++++++++++++++++++++++++
arch/riscv/kernel/sbi.c | 35 +++++++++++++++++++++++++++++++++++
2 files changed, 59 insertions(+)
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -27,6 +27,7 @@ enum sbi_ext_id {
SBI_EXT_IPI = 0x735049,
SBI_EXT_RFENCE = 0x52464E43,
SBI_EXT_HSM = 0x48534D,
+ SBI_EXT_SRST = 0x53525354,
};
enum sbi_ext_base_fid {
@@ -70,6 +71,21 @@ enum sbi_hsm_hart_status {
SBI_HSM_HART_STATUS_STOP_PENDING,
};
+enum sbi_ext_srst_fid {
+ SBI_EXT_SRST_RESET = 0,
+};
+
+enum sbi_srst_reset_type {
+ SBI_SRST_RESET_TYPE_SHUTDOWN = 0,
+ SBI_SRST_RESET_TYPE_COLD_REBOOT,
+ SBI_SRST_RESET_TYPE_WARM_REBOOT,
+};
+
+enum sbi_srst_reset_reason {
+ SBI_SRST_RESET_REASON_NONE = 0,
+ SBI_SRST_RESET_REASON_SYS_FAILURE,
+};
+
#define SBI_SPEC_VERSION_DEFAULT 0x1
#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
@@ -148,6 +164,14 @@ static inline unsigned long sbi_minor_ve
return sbi_spec_version & SBI_SPEC_VERSION_MINOR_MASK;
}
+/* Make SBI version */
+static inline unsigned long sbi_mk_version(unsigned long major,
+ unsigned long minor)
+{
+ return ((major & SBI_SPEC_VERSION_MAJOR_MASK) <<
+ SBI_SPEC_VERSION_MAJOR_SHIFT) | minor;
+}
+
int sbi_err_map_linux_errno(int err);
#else /* CONFIG_RISCV_SBI */
static inline int sbi_remote_fence_i(const unsigned long *hart_mask) { return -1; }
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -7,6 +7,7 @@
#include <linux/init.h>
#include <linux/pm.h>
+#include <linux/reboot.h>
#include <asm/sbi.h>
#include <asm/smp.h>
@@ -501,6 +502,32 @@ int sbi_remote_hfence_vvma_asid(const un
}
EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid);
+static void sbi_srst_reset(unsigned long type, unsigned long reason)
+{
+ sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason,
+ 0, 0, 0, 0);
+ pr_warn("%s: type=0x%lx reason=0x%lx failed\n",
+ __func__, type, reason);
+}
+
+static int sbi_srst_reboot(struct notifier_block *this,
+ unsigned long mode, void *cmd)
+{
+ sbi_srst_reset((mode == REBOOT_WARM || mode == REBOOT_SOFT) ?
+ SBI_SRST_RESET_TYPE_WARM_REBOOT :
+ SBI_SRST_RESET_TYPE_COLD_REBOOT,
+ SBI_SRST_RESET_REASON_NONE);
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block sbi_srst_reboot_nb;
+
+static void sbi_srst_power_off(void)
+{
+ sbi_srst_reset(SBI_SRST_RESET_TYPE_SHUTDOWN,
+ SBI_SRST_RESET_REASON_NONE);
+}
+
/**
* sbi_probe_extension() - Check if an SBI extension ID is supported or not.
* @extid: The extension ID to be probed.
@@ -608,6 +635,14 @@ void __init sbi_init(void)
} else {
__sbi_rfence = __sbi_rfence_v01;
}
+ if ((sbi_spec_version >= sbi_mk_version(0, 3)) &&
+ (sbi_probe_extension(SBI_EXT_SRST) > 0)) {
+ pr_info("SBI SRST extension detected\n");
+ pm_power_off = sbi_srst_power_off;
+ sbi_srst_reboot_nb.notifier_call = sbi_srst_reboot;
+ sbi_srst_reboot_nb.priority = 192;
+ register_restart_handler(&sbi_srst_reboot_nb);
+ }
} else {
__sbi_set_timer = __sbi_set_timer_v01;
__sbi_send_ipi = __sbi_send_ipi_v01;