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sifiveu: copy patches from 5.15 to 6.1
To start the upgrade, we copy the patches from 5.15 to 6.1. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
This commit is contained in:
Zoltan HERPAI
parent
abceef120d
commit
d304ad045d
@ -0,0 +1,49 @@
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From ab5c8f5492cce16ff2104393e2f1fa64a3ff6e88 Mon Sep 17 00:00:00 2001
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From: David Abdurachmanov <david.abdurachmanov@sifive.com>
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Date: Wed, 17 Feb 2021 06:06:14 -0800
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Subject: [PATCH 1/7] riscv: sifive: fu740: cpu{1,2,3,4} set compatible to
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sifive,u74-mc
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Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
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---
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arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 8 ++++----
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1 file changed, 4 insertions(+), 4 deletions(-)
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--- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
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+++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
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@@ -39,7 +39,7 @@
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};
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};
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cpu1: cpu@1 {
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- compatible = "sifive,bullet0", "riscv";
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+ compatible = "sifive,u74-mc", "sifive,bullet0", "riscv";
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d-cache-block-size = <64>;
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d-cache-sets = <64>;
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d-cache-size = <32768>;
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@@ -63,7 +63,7 @@
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};
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};
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cpu2: cpu@2 {
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- compatible = "sifive,bullet0", "riscv";
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+ compatible = "sifive,u74-mc", "sifive,bullet0", "riscv";
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d-cache-block-size = <64>;
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d-cache-sets = <64>;
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d-cache-size = <32768>;
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@@ -87,7 +87,7 @@
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};
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};
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cpu3: cpu@3 {
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- compatible = "sifive,bullet0", "riscv";
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+ compatible = "sifive,u74-mc", "sifive,bullet0", "riscv";
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d-cache-block-size = <64>;
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d-cache-sets = <64>;
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d-cache-size = <32768>;
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@@ -111,7 +111,7 @@
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};
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};
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cpu4: cpu@4 {
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- compatible = "sifive,bullet0", "riscv";
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+ compatible = "sifive,u74-mc", "sifive,bullet0", "riscv";
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d-cache-block-size = <64>;
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d-cache-sets = <64>;
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d-cache-size = <32768>;
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@ -0,0 +1,104 @@
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From 657819ff477dd73cd71075609698aa57ba098d8c Mon Sep 17 00:00:00 2001
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From: David Abdurachmanov <david.abdurachmanov@sifive.com>
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Date: Wed, 15 Sep 2021 07:10:02 -0700
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Subject: [PATCH 2/7] riscv: sifive: unmatched: update regulators values
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These are the regulators values from the schematics for Rev3{A,B} boards.
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Note this is not fully correct as bcore1/bcore2 and bmem/bio are merged, but
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it's only supported in v5.15 kernel. See:
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541ee8f640327f951e7039278057827322231ab0 ("regulator: da9063: Add support for
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full-current mode.")
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This will be changed for v5.15 kernel based on the patch above.
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Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
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---
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.../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 32 +++++++++++-----------
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1 file changed, 16 insertions(+), 16 deletions(-)
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--- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
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+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
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@@ -73,16 +73,16 @@
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regulators {
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vdd_bcore1: bcore1 {
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- regulator-min-microvolt = <900000>;
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- regulator-max-microvolt = <900000>;
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+ regulator-min-microvolt = <1050000>;
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+ regulator-max-microvolt = <1050000>;
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regulator-min-microamp = <5000000>;
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regulator-max-microamp = <5000000>;
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regulator-always-on;
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};
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vdd_bcore2: bcore2 {
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- regulator-min-microvolt = <900000>;
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- regulator-max-microvolt = <900000>;
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+ regulator-min-microvolt = <1050000>;
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+ regulator-max-microvolt = <1050000>;
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regulator-min-microamp = <5000000>;
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regulator-max-microamp = <5000000>;
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regulator-always-on;
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@@ -137,48 +137,48 @@
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};
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vdd_ldo3: ldo3 {
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- regulator-min-microvolt = <1800000>;
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- regulator-max-microvolt = <1800000>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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regulator-min-microamp = <200000>;
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regulator-max-microamp = <200000>;
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regulator-always-on;
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};
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vdd_ldo4: ldo4 {
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- regulator-min-microvolt = <1800000>;
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- regulator-max-microvolt = <1800000>;
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+ regulator-min-microvolt = <2500000>;
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+ regulator-max-microvolt = <2500000>;
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regulator-min-microamp = <200000>;
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regulator-max-microamp = <200000>;
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regulator-always-on;
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};
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vdd_ldo5: ldo5 {
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- regulator-min-microvolt = <1800000>;
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- regulator-max-microvolt = <1800000>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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regulator-min-microamp = <100000>;
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regulator-max-microamp = <100000>;
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regulator-always-on;
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};
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vdd_ldo6: ldo6 {
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- regulator-min-microvolt = <3300000>;
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- regulator-max-microvolt = <3300000>;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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regulator-min-microamp = <200000>;
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regulator-max-microamp = <200000>;
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regulator-always-on;
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};
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vdd_ldo7: ldo7 {
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- regulator-min-microvolt = <1800000>;
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- regulator-max-microvolt = <1800000>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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regulator-min-microamp = <200000>;
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regulator-max-microamp = <200000>;
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regulator-always-on;
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};
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vdd_ldo8: ldo8 {
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- regulator-min-microvolt = <1800000>;
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- regulator-max-microvolt = <1800000>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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regulator-min-microamp = <200000>;
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regulator-max-microamp = <200000>;
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regulator-always-on;
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@ -0,0 +1,69 @@
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From 2c2d8ac8c124a2938c9326c14b2dffd46d76b4a8 Mon Sep 17 00:00:00 2001
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From: David Abdurachmanov <david.abdurachmanov@sifive.com>
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Date: Mon, 13 Sep 2021 02:15:37 -0700
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Subject: [PATCH 3/7] riscv: sifive: unmatched: define PWM LEDs
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Add D2 (RGB) and D12 (green) LEDs for SiFive Unmatched board.
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Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
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---
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.../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 41 ++++++++++++++++++++++
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1 file changed, 41 insertions(+)
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--- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
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+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
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@@ -4,6 +4,8 @@
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#include "fu740-c000.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/pwm/pwm.h>
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/* Clock frequency (in Hz) of the PCB crystal for rtcclk */
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#define RTCCLK_FREQ 1000000
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@@ -31,6 +33,45 @@
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soc {
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};
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+ pwmleds {
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+ compatible = "pwm-leds";
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+ green-d12 {
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+ label = "green:d12";
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+ color = <LED_COLOR_ID_GREEN>;
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+ pwms = <&pwm0 0 7812500 PWM_POLARITY_INVERTED>;
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+ active-low = <1>;
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+ max-brightness = <255>;
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+ linux,default-trigger = "none";
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+ };
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+
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+ green-d2 {
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+ label = "green:d2";
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+ color = <LED_COLOR_ID_GREEN>;
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+ pwms = <&pwm0 1 7812500 PWM_POLARITY_INVERTED>;
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+ active-low = <1>;
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+ max-brightness = <255>;
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+ linux,default-trigger = "none";
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+ };
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+
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+ red-d2 {
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+ label = "red:d2";
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+ color = <LED_COLOR_ID_RED>;
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+ pwms = <&pwm0 2 7812500 PWM_POLARITY_INVERTED>;
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+ active-low = <1>;
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+ max-brightness = <255>;
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+ linux,default-trigger = "none";
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+ };
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+
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+ blue-d2 {
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+ label = "blue:d2";
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+ color = <LED_COLOR_ID_BLUE>;
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+ pwms = <&pwm0 3 7812500 PWM_POLARITY_INVERTED>;
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+ active-low = <1>;
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+ max-brightness = <255>;
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+ linux,default-trigger = "none";
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+ };
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+ };
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+
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hfclk: hfclk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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@ -0,0 +1,26 @@
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From 14ede57943bc4209755d08daf93ac7be967d7fbe Mon Sep 17 00:00:00 2001
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From: David Abdurachmanov <david.abdurachmanov@sifive.com>
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Date: Mon, 13 Sep 2021 02:18:30 -0700
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Subject: [PATCH 4/7] riscv: sifive: unmatched: add gpio-poweroff node
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Add gpio-poweroff node to allow powering off the system.
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Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
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---
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arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
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+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
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@@ -85,6 +85,11 @@
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clock-frequency = <RTCCLK_FREQ>;
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clock-output-names = "rtcclk";
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};
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+
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+ gpio-poweroff {
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+ compatible = "gpio-poweroff";
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+ gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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+ };
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};
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&uart0 {
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@ -0,0 +1,116 @@
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From d3cf2859a056273400fbdf9d389b75750ff6ca5e Mon Sep 17 00:00:00 2001
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From: David Abdurachmanov <david.abdurachmanov@sifive.com>
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Date: Fri, 14 May 2021 05:27:51 -0700
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Subject: [PATCH 6/7] riscv: sifive: unleashed: define opp table (cpufreq)
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Source: https://github.com/sifive/riscv-linux/commits/dev/paulw/cpufreq-dt-aloe-v5.3-rc4
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Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
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---
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arch/riscv/Kconfig | 8 +++++
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arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 5 ++++
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.../riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 34 ++++++++++++++++++++++
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3 files changed, 47 insertions(+)
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--- a/arch/riscv/Kconfig
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+++ b/arch/riscv/Kconfig
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@@ -566,6 +566,14 @@ config BUILTIN_DTB
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depends on OF
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default y if XIP_KERNEL
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+menu "CPU Power Management"
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+
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+source "drivers/cpuidle/Kconfig"
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+
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+source "drivers/cpufreq/Kconfig"
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+
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+endmenu
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+
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menu "Power management options"
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source "kernel/power/Kconfig"
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--- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
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+++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
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@@ -30,6 +30,7 @@
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i-cache-size = <16384>;
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reg = <0>;
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riscv,isa = "rv64imac";
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+ clocks = <&prci PRCI_CLK_COREPLL>;
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status = "disabled";
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cpu0_intc: interrupt-controller {
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#interrupt-cells = <1>;
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@@ -54,6 +55,7 @@
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reg = <1>;
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riscv,isa = "rv64imafdc";
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tlb-split;
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+ clocks = <&prci PRCI_CLK_COREPLL>;
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next-level-cache = <&l2cache>;
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cpu1_intc: interrupt-controller {
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#interrupt-cells = <1>;
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@@ -78,6 +80,7 @@
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reg = <2>;
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riscv,isa = "rv64imafdc";
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tlb-split;
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+ clocks = <&prci PRCI_CLK_COREPLL>;
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next-level-cache = <&l2cache>;
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cpu2_intc: interrupt-controller {
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#interrupt-cells = <1>;
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@@ -102,6 +105,7 @@
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reg = <3>;
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riscv,isa = "rv64imafdc";
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tlb-split;
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+ clocks = <&prci PRCI_CLK_COREPLL>;
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next-level-cache = <&l2cache>;
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cpu3_intc: interrupt-controller {
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#interrupt-cells = <1>;
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@@ -126,6 +130,7 @@
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reg = <4>;
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riscv,isa = "rv64imafdc";
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tlb-split;
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+ clocks = <&prci PRCI_CLK_COREPLL>;
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next-level-cache = <&l2cache>;
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cpu4_intc: interrupt-controller {
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#interrupt-cells = <1>;
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--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
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+++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
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@@ -84,6 +84,40 @@
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label = "d4";
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};
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};
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+
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+ fu540_c000_opp_table: opp-table {
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+ compatible = "operating-points-v2";
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+ opp-shared;
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+
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+ opp-350000000 {
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+ opp-hz = /bits/ 64 <350000000>;
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+ };
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+ opp-700000000 {
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+ opp-hz = /bits/ 64 <700000000>;
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+ };
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+ opp-999999999 {
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+ opp-hz = /bits/ 64 <999999999>;
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+ };
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+ opp-1400000000 {
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+ opp-hz = /bits/ 64 <1400000000>;
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+ };
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+ };
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+};
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+
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+&cpu0 {
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+ operating-points-v2 = <&fu540_c000_opp_table>;
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+};
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+&cpu1 {
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+ operating-points-v2 = <&fu540_c000_opp_table>;
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+};
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+&cpu2 {
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+ operating-points-v2 = <&fu540_c000_opp_table>;
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+};
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+&cpu3 {
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+ operating-points-v2 = <&fu540_c000_opp_table>;
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+};
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+&cpu4 {
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+ operating-points-v2 = <&fu540_c000_opp_table>;
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};
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&uart0 {
|
||||
@ -0,0 +1,301 @@
|
||||
From mboxrd@z Thu Jan 1 00:00:00 1970
|
||||
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12:13:47 +0000
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From: Anup Patel <anup.patel@wdc.com>
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To: Palmer Dabbelt <palmer@dabbelt.com>,
|
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Palmer Dabbelt <palmerdabbelt@google.com>,
|
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Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>
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Cc: Atish Patra <atish.patra@wdc.com>,
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Alistair Francis <Alistair.Francis@wdc.com>,
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Anup Patel <anup@brainfault.org>, linux-riscv@lists.infradead.org,
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linux-kernel@vger.kernel.org, Anup Patel <anup.patel@wdc.com>
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Subject: [PATCH v7 1/1] RISC-V: Use SBI SRST extension when available
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Date: Wed, 9 Jun 2021 17:43:22 +0530
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The SBI SRST extension provides a standard way to poweroff and
|
||||
reboot the system irrespective to whether Linux RISC-V S-mode
|
||||
is running natively (HS-mode) or inside Guest/VM (VS-mode).
|
||||
|
||||
The SBI SRST extension is available in the SBI v0.3 specification.
|
||||
(Refer, https://github.com/riscv/riscv-sbi-doc/releases/tag/v0.3.0-rc1)
|
||||
|
||||
This patch extends Linux RISC-V SBI implementation to detect
|
||||
and use SBI SRST extension.
|
||||
|
||||
Signed-off-by: Anup Patel <anup.patel@wdc.com>
|
||||
Reviewed-by: Atish Patra <atish.patra@wdc.com>
|
||||
---
|
||||
arch/riscv/include/asm/sbi.h | 24 ++++++++++++++++++++++++
|
||||
arch/riscv/kernel/sbi.c | 35 +++++++++++++++++++++++++++++++++++
|
||||
2 files changed, 59 insertions(+)
|
||||
|
||||
--- a/arch/riscv/include/asm/sbi.h
|
||||
+++ b/arch/riscv/include/asm/sbi.h
|
||||
@@ -27,6 +27,7 @@ enum sbi_ext_id {
|
||||
SBI_EXT_IPI = 0x735049,
|
||||
SBI_EXT_RFENCE = 0x52464E43,
|
||||
SBI_EXT_HSM = 0x48534D,
|
||||
+ SBI_EXT_SRST = 0x53525354,
|
||||
};
|
||||
|
||||
enum sbi_ext_base_fid {
|
||||
@@ -70,6 +71,21 @@ enum sbi_hsm_hart_status {
|
||||
SBI_HSM_HART_STATUS_STOP_PENDING,
|
||||
};
|
||||
|
||||
+enum sbi_ext_srst_fid {
|
||||
+ SBI_EXT_SRST_RESET = 0,
|
||||
+};
|
||||
+
|
||||
+enum sbi_srst_reset_type {
|
||||
+ SBI_SRST_RESET_TYPE_SHUTDOWN = 0,
|
||||
+ SBI_SRST_RESET_TYPE_COLD_REBOOT,
|
||||
+ SBI_SRST_RESET_TYPE_WARM_REBOOT,
|
||||
+};
|
||||
+
|
||||
+enum sbi_srst_reset_reason {
|
||||
+ SBI_SRST_RESET_REASON_NONE = 0,
|
||||
+ SBI_SRST_RESET_REASON_SYS_FAILURE,
|
||||
+};
|
||||
+
|
||||
#define SBI_SPEC_VERSION_DEFAULT 0x1
|
||||
#define SBI_SPEC_VERSION_MAJOR_SHIFT 24
|
||||
#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
|
||||
@@ -148,6 +164,14 @@ static inline unsigned long sbi_minor_ve
|
||||
return sbi_spec_version & SBI_SPEC_VERSION_MINOR_MASK;
|
||||
}
|
||||
|
||||
+/* Make SBI version */
|
||||
+static inline unsigned long sbi_mk_version(unsigned long major,
|
||||
+ unsigned long minor)
|
||||
+{
|
||||
+ return ((major & SBI_SPEC_VERSION_MAJOR_MASK) <<
|
||||
+ SBI_SPEC_VERSION_MAJOR_SHIFT) | minor;
|
||||
+}
|
||||
+
|
||||
int sbi_err_map_linux_errno(int err);
|
||||
#else /* CONFIG_RISCV_SBI */
|
||||
static inline int sbi_remote_fence_i(const unsigned long *hart_mask) { return -1; }
|
||||
--- a/arch/riscv/kernel/sbi.c
|
||||
+++ b/arch/riscv/kernel/sbi.c
|
||||
@@ -7,6 +7,7 @@
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/pm.h>
|
||||
+#include <linux/reboot.h>
|
||||
#include <asm/sbi.h>
|
||||
#include <asm/smp.h>
|
||||
|
||||
@@ -501,6 +502,32 @@ int sbi_remote_hfence_vvma_asid(const un
|
||||
}
|
||||
EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid);
|
||||
|
||||
+static void sbi_srst_reset(unsigned long type, unsigned long reason)
|
||||
+{
|
||||
+ sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason,
|
||||
+ 0, 0, 0, 0);
|
||||
+ pr_warn("%s: type=0x%lx reason=0x%lx failed\n",
|
||||
+ __func__, type, reason);
|
||||
+}
|
||||
+
|
||||
+static int sbi_srst_reboot(struct notifier_block *this,
|
||||
+ unsigned long mode, void *cmd)
|
||||
+{
|
||||
+ sbi_srst_reset((mode == REBOOT_WARM || mode == REBOOT_SOFT) ?
|
||||
+ SBI_SRST_RESET_TYPE_WARM_REBOOT :
|
||||
+ SBI_SRST_RESET_TYPE_COLD_REBOOT,
|
||||
+ SBI_SRST_RESET_REASON_NONE);
|
||||
+ return NOTIFY_DONE;
|
||||
+}
|
||||
+
|
||||
+static struct notifier_block sbi_srst_reboot_nb;
|
||||
+
|
||||
+static void sbi_srst_power_off(void)
|
||||
+{
|
||||
+ sbi_srst_reset(SBI_SRST_RESET_TYPE_SHUTDOWN,
|
||||
+ SBI_SRST_RESET_REASON_NONE);
|
||||
+}
|
||||
+
|
||||
/**
|
||||
* sbi_probe_extension() - Check if an SBI extension ID is supported or not.
|
||||
* @extid: The extension ID to be probed.
|
||||
@@ -608,6 +635,14 @@ void __init sbi_init(void)
|
||||
} else {
|
||||
__sbi_rfence = __sbi_rfence_v01;
|
||||
}
|
||||
+ if ((sbi_spec_version >= sbi_mk_version(0, 3)) &&
|
||||
+ (sbi_probe_extension(SBI_EXT_SRST) > 0)) {
|
||||
+ pr_info("SBI SRST extension detected\n");
|
||||
+ pm_power_off = sbi_srst_power_off;
|
||||
+ sbi_srst_reboot_nb.notifier_call = sbi_srst_reboot;
|
||||
+ sbi_srst_reboot_nb.priority = 192;
|
||||
+ register_restart_handler(&sbi_srst_reboot_nb);
|
||||
+ }
|
||||
} else {
|
||||
__sbi_set_timer = __sbi_set_timer_v01;
|
||||
__sbi_send_ipi = __sbi_send_ipi_v01;
|
||||
Loading…
Reference in New Issue
Block a user