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mediatek: add build for MT7981 RFB
Add build for the MTK3943 reference board for MT7981B+MT7976C.
**Hardware specification:**
- SoC: MediaTek MT7981B 2x A53
- Flash: various options
- RAM: 256MB DDR3
- Ethernet: 4 x 10/100/1000 Mbps via MT7531AE switch
EITHER 1 x 10/100/1000 Mbps built-in PHY
OR 1 x 10/100/1000/2500 Mbps MaxLinear GPY211C
- Switch: MediaTek MT7531AE
- WiFi: MediaTek MT7976C
- Button: RST, WPS
**Flash instructions for SPIM-NAND:**
- write *mt7981-rfb-spim-nand-preloader.bin to 'BL2' partition
- write *mt7981-rfb-spim-nand-bl31-uboot.fip to 'FIP' partition
- erase 'ubi' partition
- reset board
- create ubootenv and ubootenv2 UBI volumes in U-Boot
- edit environment and set bootcmd, e.g.
setenv bootconf 'config-1#mt7981-rfb-spim-nand#mt7981-rfb-mxl-2p5g-phy-eth1'
setenv bootcmd 'ubi read $loadaddr fit; bootm $loadaddr#$bootconf'
- load initramfs image via TFTP:
setenv serverip 192.168.1.254
setenv ipaddr 192.168.1.1
setenv bootfile openwrt-mediatek-filogic-mediatek_mt7981-rfb-initramfs.itb
saveenv ; saveenv
tftpboot
bootm $loadaddr#$bootconf
- Now use sysupgrade to write OpenWrt firmware to flash.
SNFI-NAND, SPIM-NOR and eMMC all work very similar, a bootable SD card image
is also being generated. However, as the board I've been provided only comes
with SPIM-NAND all other boot media are untested.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle
parent
8428bed15d
commit
ce7209bd21
@ -0,0 +1,32 @@
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/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
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fragment@0 {
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target = <&gmac1>;
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__overlay__ {
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phy-mode = "2500base-x";
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phy-handle = <&phy5>;
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};
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};
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fragment@1 {
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target = <&mdio_bus>;
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__overlay__ {
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reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
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reset-delay-us = <600>;
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reset-post-delay-us = <20000>;
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phy5: ethernet-phy@5 {
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reg = <5>;
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compatible = "ethernet-phy-ieee802.3-c45";
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phy-mode = "2500base-x";
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};
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};
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};
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};
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@ -0,0 +1,33 @@
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/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
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fragment@0 {
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target = <&sw_p5>;
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__overlay__ {
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phy-mode = "2500base-x";
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phy-handle = <&phy5>;
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status = "okay";
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};
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};
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fragment@1 {
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target = <&mdio_bus>;
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__overlay__ {
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reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
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reset-delay-us = <600>;
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reset-post-delay-us = <20000>;
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phy5: ethernet-phy@5 {
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reg = <5>;
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compatible = "ethernet-phy-ieee802.3-c45";
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phy-mode = "2500base-x";
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};
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};
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};
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};
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@ -0,0 +1,66 @@
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/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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/dts-v1/;
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/plugin/;
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/ {
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compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
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fragment@0 {
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target = <&spi0>;
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__overlay__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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spi_nand: spi_nand@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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reg = <1>;
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spi-max-frequency = <10000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "BL2";
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reg = <0x00000 0x0100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x0100000 0x0080000>;
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};
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factory: partition@180000 {
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label = "Factory";
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reg = <0x180000 0x0200000>;
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};
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partition@380000 {
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label = "FIP";
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reg = <0x380000 0x0200000>;
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};
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0x4000000>;
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};
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};
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};
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};
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};
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fragment@1 {
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target = <&wifi>;
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__overlay__ {
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mediatek,mtd-eeprom = <&factory 0x0>;
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status = "okay";
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};
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};
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};
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@ -0,0 +1,188 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2022 MediaTek Inc.
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* Author: Sam.Shih <sam.shih@mediatek.com>
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*/
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/dts-v1/;
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#include "mt7981.dtsi"
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/ {
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model = "MediaTek MT7981 RFB";
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compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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reg = <0 0x40000000 0 0x20000000>;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "gmii";
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phy-handle = <&int_gbe_phy>;
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};
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};
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&mdio_bus {
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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};
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};
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&crypto {
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status = "okay";
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};
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&pio {
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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cs-gpios = <0>, <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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};
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sw_p5: port@5 {
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reg = <5>;
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label = "lan5";
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status = "disabled";
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&xhci {
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vusb33-supply = <®_3p3v>;
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vbus-supply = <®_5v>;
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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@ -0,0 +1,32 @@
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/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
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fragment@0 {
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target = <&gmac1>;
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__overlay__ {
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phy-mode = "2500base-x";
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phy-handle = <&phy5>;
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};
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};
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fragment@1 {
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target = <&mdio_bus>;
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__overlay__ {
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reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
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reset-delay-us = <600>;
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reset-post-delay-us = <20000>;
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phy5: ethernet-phy@5 {
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reg = <5>;
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compatible = "ethernet-phy-ieee802.3-c45";
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phy-mode = "2500base-x";
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};
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};
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};
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};
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@ -0,0 +1,33 @@
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/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
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fragment@0 {
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target = <&sw_p5>;
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__overlay__ {
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phy-mode = "2500base-x";
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phy-handle = <&phy5>;
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status = "okay";
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};
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};
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fragment@1 {
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target = <&mdio_bus>;
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__overlay__ {
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reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
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reset-delay-us = <600>;
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reset-post-delay-us = <20000>;
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phy5: ethernet-phy@5 {
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reg = <5>;
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compatible = "ethernet-phy-ieee802.3-c45";
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phy-mode = "2500base-x";
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};
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};
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};
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};
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@ -0,0 +1,66 @@
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/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
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/dts-v1/;
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/plugin/;
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/ {
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compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
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fragment@0 {
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target = <&spi0>;
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__overlay__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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spi_nand: spi_nand@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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reg = <1>;
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spi-max-frequency = <10000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "BL2";
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reg = <0x00000 0x0100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x0100000 0x0080000>;
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};
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factory: partition@180000 {
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label = "Factory";
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reg = <0x180000 0x0200000>;
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};
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partition@380000 {
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label = "FIP";
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reg = <0x380000 0x0200000>;
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};
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0x4000000>;
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};
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};
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};
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};
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};
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fragment@1 {
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target = <&wifi>;
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__overlay__ {
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mediatek,mtd-eeprom = <&factory 0x0>;
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status = "okay";
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};
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};
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};
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@ -0,0 +1,188 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
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/*
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* Copyright (C) 2022 MediaTek Inc.
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* Author: Sam.Shih <sam.shih@mediatek.com>
|
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*/
|
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|
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/dts-v1/;
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#include "mt7981.dtsi"
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/ {
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model = "MediaTek MT7981 RFB";
|
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compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
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|
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aliases {
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serial0 = &uart0;
|
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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reg = <0 0x40000000 0 0x20000000>;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
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};
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};
|
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};
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ð {
|
||||
status = "okay";
|
||||
|
||||
gmac0: mac@0 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <0>;
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
|
||||
gmac1: mac@1 {
|
||||
compatible = "mediatek,eth-mac";
|
||||
reg = <1>;
|
||||
phy-mode = "gmii";
|
||||
phy-handle = <&int_gbe_phy>;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio_bus {
|
||||
switch: switch@1f {
|
||||
compatible = "mediatek,mt7531";
|
||||
reg = <31>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&pio>;
|
||||
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pio {
|
||||
spi0_flash_pins: spi0-pins {
|
||||
mux {
|
||||
function = "spi";
|
||||
groups = "spi0", "spi0_wp_hold";
|
||||
};
|
||||
conf-pu {
|
||||
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
|
||||
drive-strength = <MTK_DRIVE_8mA>;
|
||||
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
|
||||
};
|
||||
conf-pd {
|
||||
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
|
||||
drive-strength = <MTK_DRIVE_8mA>;
|
||||
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_flash_pins>;
|
||||
cs-gpios = <0>, <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&switch {
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
sw_p5: port@5 {
|
||||
reg = <5>;
|
||||
label = "lan5";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
ethernet = <&gmac0>;
|
||||
phy-mode = "2500base-x";
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&xhci {
|
||||
vusb33-supply = <®_3p3v>;
|
||||
vbus-supply = <®_5v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
status = "okay";
|
||||
};
|
||||
@ -11,7 +11,8 @@ mediatek_setup_interfaces()
|
||||
acer,predator-w6)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 game" eth1
|
||||
;;
|
||||
asus,tuf-ax4200)
|
||||
asus,tuf-ax4200|\
|
||||
mediatek,mt7981-rfb)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1
|
||||
;;
|
||||
netgear,wax220|\
|
||||
|
||||
@ -89,6 +89,7 @@ platform_do_upgrade() {
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
h3c,magic-nx30-pro|\
|
||||
mediatek,mt7981-rfb|\
|
||||
qihoo,360t7|\
|
||||
tplink,tl-xdr4288|\
|
||||
tplink,tl-xdr6086|\
|
||||
|
||||
@ -282,6 +282,61 @@ define Device/netgear_wax220
|
||||
endef
|
||||
TARGET_DEVICES += netgear_wax220
|
||||
|
||||
define Device/mediatek_mt7981-rfb
|
||||
DEVICE_VENDOR := MediaTek
|
||||
DEVICE_MODEL := MT7981 rfb
|
||||
DEVICE_DTS := mt7981-rfb
|
||||
DEVICE_DTS_OVERLAY:= \
|
||||
mt7981-rfb-spim-nand \
|
||||
mt7981-rfb-mxl-2p5g-phy-eth1 \
|
||||
mt7981-rfb-mxl-2p5g-phy-swp5
|
||||
DEVICE_DTS_DIR := $(DTS_DIR)/
|
||||
DEVICE_DTC_FLAGS := --pad 4096
|
||||
DEVICE_DTS_LOADADDR := 0x43f00000
|
||||
DEVICE_PACKAGES := kmod-mt7981-firmware kmod-usb3 e2fsprogs f2fsck mkf2fs mt7981-wo-firmware
|
||||
KERNEL_LOADADDR := 0x44000000
|
||||
KERNEL := kernel-bin | gzip
|
||||
KERNEL_INITRAMFS := kernel-bin | lzma | \
|
||||
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
|
||||
KERNEL_INITRAMFS_SUFFIX := .itb
|
||||
KERNEL_IN_UBI := 1
|
||||
UBOOTENV_IN_UBI := 1
|
||||
IMAGES := sysupgrade.itb
|
||||
IMAGE_SIZE := $$(shell expr 64 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m
|
||||
IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-with-rootfs | pad-rootfs | append-metadata
|
||||
ARTIFACTS := \
|
||||
emmc-preloader.bin emmc-bl31-uboot.fip \
|
||||
nor-preloader.bin nor-bl31-uboot.fip \
|
||||
sdcard.img.gz \
|
||||
snfi-nand-preloader.bin snfi-nand-bl31-uboot.fip \
|
||||
spim-nand-preloader.bin spim-nand-bl31-uboot.fip
|
||||
ARTIFACT/emmc-preloader.bin := mt7981-bl2 emmc-ddr3
|
||||
ARTIFACT/emmc-bl31-uboot.fip := mt7981-bl31-uboot rfb-emmc
|
||||
ARTIFACT/nor-preloader.bin := mt7981-bl2 nor-ddr3
|
||||
ARTIFACT/nor-bl31-uboot.fip := mt7981-bl31-uboot rfb-emmc
|
||||
ARTIFACT/snfi-nand-preloader.bin := mt7981-bl2 snand-ddr3
|
||||
ARTIFACT/snfi-nand-bl31-uboot.fip := mt7981-bl31-uboot rfb-snfi
|
||||
ARTIFACT/spim-nand-preloader.bin := mt7981-bl2 spim-nand-ddr3
|
||||
ARTIFACT/spim-nand-bl31-uboot.fip := mt7981-bl31-uboot rfb-spim-nand
|
||||
ARTIFACT/sdcard.img.gz := mt798x-gpt sdmmc |\
|
||||
pad-to 17k | mt7981-bl2 sdmmc-ddr3 |\
|
||||
pad-to 6656k | mt7981-bl31-uboot rfb-sd |\
|
||||
$(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),\
|
||||
pad-to 12M | append-image-stage initramfs.itb | check-size 44m |\
|
||||
) \
|
||||
pad-to 44M | mt7981-bl2 spim-nand-ddr3 |\
|
||||
pad-to 45M | mt7981-bl31-uboot rfb-spim-nand |\
|
||||
pad-to 49M | mt7981-bl2 nor-ddr3 |\
|
||||
pad-to 50M | mt7981-bl31-uboot rfb-nor |\
|
||||
pad-to 51M | mt7981-bl2 snand-ddr3 |\
|
||||
pad-to 53M | mt7981-bl31-uboot rfb-snfi |\
|
||||
$(if $(CONFIG_TARGET_ROOTFS_SQUASHFS),\
|
||||
pad-to 64M | append-image squashfs-sysupgrade.itb | check-size |\
|
||||
) \
|
||||
gzip
|
||||
endef
|
||||
TARGET_DEVICES += mediatek_mt7981-rfb
|
||||
|
||||
define Device/mediatek_mt7986a-rfb-nand
|
||||
DEVICE_VENDOR := MediaTek
|
||||
DEVICE_MODEL := MT7986 rfba AP (NAND)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user