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generic: ar8216: add support for separated mdio bus for phy access
Atheros FE switches have a builtin mdio master available for PHY accessing and on ar724x/ar933x builtin switches this mdio master is the only way of accessing PHYs. After this patch if there is phy_read/phy_write method available in ar8xxx_chip we register a separated mdio bus for accessing PHYs. Still adds support for mdio device probing only since this isn't needed for those switches registered using PHY probing. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
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@ -190,7 +190,7 @@ ar8xxx_phy_init(struct ar8xxx_priv *priv)
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int i;
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int i;
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struct mii_bus *bus;
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struct mii_bus *bus;
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bus = priv->mii_bus;
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bus = priv->sw_mii_bus ?: priv->mii_bus;
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for (i = 0; i < AR8XXX_NUM_PHYS; i++) {
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for (i = 0; i < AR8XXX_NUM_PHYS; i++) {
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if (priv->chip->phy_fixup)
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if (priv->chip->phy_fixup)
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priv->chip->phy_fixup(priv, i);
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priv->chip->phy_fixup(priv, i);
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@ -1683,6 +1683,21 @@ ar8xxx_sw_set_flush_port_arl_table(struct switch_dev *dev,
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return ret;
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return ret;
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}
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}
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static int
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ar8xxx_phy_read(struct mii_bus *bus, int phy_addr, int reg_addr)
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{
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struct ar8xxx_priv *priv = bus->priv;
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return priv->chip->phy_read(priv, phy_addr, reg_addr);
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}
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static int
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ar8xxx_phy_write(struct mii_bus *bus, int phy_addr, int reg_addr,
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u16 reg_val)
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{
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struct ar8xxx_priv *priv = bus->priv;
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return priv->chip->phy_write(priv, phy_addr, reg_addr, reg_val);
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}
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static const struct switch_attr ar8xxx_sw_attr_globals[] = {
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static const struct switch_attr ar8xxx_sw_attr_globals[] = {
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{
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{
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.type = SWITCH_TYPE_INT,
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.type = SWITCH_TYPE_INT,
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@ -2471,6 +2486,7 @@ ar8xxx_mdiodev_probe(struct mdio_device *mdiodev)
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const struct of_device_id *match;
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const struct of_device_id *match;
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struct ar8xxx_priv *priv;
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struct ar8xxx_priv *priv;
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struct switch_dev *swdev;
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struct switch_dev *swdev;
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struct device_node *mdio_node;
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int ret;
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int ret;
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match = of_match_device(ar8xxx_mdiodev_of_match, &mdiodev->dev);
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match = of_match_device(ar8xxx_mdiodev_of_match, &mdiodev->dev);
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@ -2493,6 +2509,21 @@ ar8xxx_mdiodev_probe(struct mdio_device *mdiodev)
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if (ret)
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if (ret)
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goto free_priv;
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goto free_priv;
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if (priv->chip->phy_read && priv->chip->phy_write) {
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priv->sw_mii_bus = devm_mdiobus_alloc(&mdiodev->dev);
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priv->sw_mii_bus->name = "ar8xxx-mdio";
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priv->sw_mii_bus->read = ar8xxx_phy_read;
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priv->sw_mii_bus->write = ar8xxx_phy_write;
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priv->sw_mii_bus->priv = priv;
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priv->sw_mii_bus->parent = &mdiodev->dev;
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snprintf(priv->sw_mii_bus->id, MII_BUS_ID_SIZE, "%s",
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dev_name(&mdiodev->dev));
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mdio_node = of_get_child_by_name(priv->pdev->of_node, "mdio-bus");
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ret = of_mdiobus_register(priv->sw_mii_bus, mdio_node);
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if (ret)
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goto free_priv;
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}
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swdev = &priv->dev;
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swdev = &priv->dev;
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swdev->alias = dev_name(&mdiodev->dev);
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swdev->alias = dev_name(&mdiodev->dev);
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ret = register_switch(swdev, NULL);
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ret = register_switch(swdev, NULL);
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@ -2548,6 +2579,8 @@ ar8xxx_mdiodev_remove(struct mdio_device *mdiodev)
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unregister_switch(&priv->dev);
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unregister_switch(&priv->dev);
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ar8xxx_mib_stop(priv);
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ar8xxx_mib_stop(priv);
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if(priv->sw_mii_bus)
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mdiobus_unregister(priv->sw_mii_bus);
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ar8xxx_free(priv);
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ar8xxx_free(priv);
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}
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}
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@ -433,6 +433,8 @@ struct ar8xxx_chip {
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u32 *status, enum arl_op op);
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u32 *status, enum arl_op op);
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int (*sw_hw_apply)(struct switch_dev *dev);
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int (*sw_hw_apply)(struct switch_dev *dev);
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void (*phy_rgmii_set)(struct ar8xxx_priv *priv, struct phy_device *phydev);
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void (*phy_rgmii_set)(struct ar8xxx_priv *priv, struct phy_device *phydev);
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int (*phy_read)(struct ar8xxx_priv *priv, int addr, int regnum);
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int (*phy_write)(struct ar8xxx_priv *priv, int addr, int regnum, u16 val);
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const struct ar8xxx_mib_desc *mib_decs;
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const struct ar8xxx_mib_desc *mib_decs;
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unsigned num_mibs;
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unsigned num_mibs;
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@ -442,6 +444,7 @@ struct ar8xxx_chip {
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struct ar8xxx_priv {
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struct ar8xxx_priv {
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struct switch_dev dev;
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struct switch_dev dev;
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struct mii_bus *mii_bus;
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struct mii_bus *mii_bus;
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struct mii_bus *sw_mii_bus;
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struct phy_device *phy;
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struct phy_device *phy;
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struct device *pdev;
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struct device *pdev;
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