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broadcom-diag: support for the WNDR3700v3
I recently picked up a WNDR3700 to put OpenWRT on, and only after tearing into the box did I find it was one of the v3 boards, with poor OpenWRT support. This patch should add the board detection and LED/button control to the broadcom-diag module, and should generate a netgear .chk image that the bootloader and stock firmware will accept. The changes to the broadcom-diag module are more than a few lines because the WNDR3700v3 is driving its LEDs through an HC164 8-bit shift register. Signed-off-by: Owen Kirby <osk@exegin.com> SVN-Revision: 36482
This commit is contained in:
Hauke Mehrtens
parent
8a3a7fdf07
commit
ca7f9638d5
@ -123,6 +123,7 @@ enum {
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WNR834BV1,
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WNR834BV2,
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WNDR3400V1,
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WNDR3700V3,
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/* Trendware */
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TEW411BRPP,
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@ -927,6 +928,28 @@ static struct platform_t __initdata platforms[] = {
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{ .name = "usb", .gpio = 1 << 2, .polarity = REVERSE },
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},
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},
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[WNDR3700V3] = {
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.name = "Netgear WNDR3700 V3",
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.buttons = {
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/* { .name = "usb", .gpio = 1 << 1 }, */ /* this button doesn't seem to exist. */
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{ .name = "wlan", .gpio = 1 << 2 },
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{ .name = "reset", .gpio = 1 << 3 },
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{ .name = "wps", .gpio = 1 << 4 },
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/* { .name = "switch", .gpio = 1 << 5 },*/ /* nvram get gpio5=robo_reset */
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},
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.leds = {
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{ .name = "power", .gpio = (1 << 0) | GPIO_TYPE_SHIFT, .polarity = REVERSE },
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{ .name = "diag", .gpio = (1 << 1) | GPIO_TYPE_SHIFT, .polarity = REVERSE },
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/* WAN LED doesn't respond to GPIO control. The switch is probably driving it.
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* { .name = "wan", .gpio = (1 << 2) | GPIO_TYPE_SHIFT, .polarity = REVERSE },
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*/
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{ .name = "wlan2g", .gpio = (1 << 3) | GPIO_TYPE_SHIFT, .polarity = REVERSE },
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{ .name = "wlan5g", .gpio = (1 << 4) | GPIO_TYPE_SHIFT, .polarity = REVERSE },
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{ .name = "usb", .gpio = (1 << 5) | GPIO_TYPE_SHIFT, .polarity = REVERSE },
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{ .name = "wps", .gpio = (1 << 6) | GPIO_TYPE_SHIFT, .polarity = REVERSE },
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{ .name = "wlan", .gpio = (1 << 7) | GPIO_TYPE_SHIFT, .polarity = REVERSE },
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},
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},
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/* Trendware */
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[TEW411BRPP] = {
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.name = "Trendware TEW411BRP+",
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@ -1308,6 +1331,8 @@ static struct platform_t __init *platform_detect(void)
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return &platforms[WR850GV2V3];
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case BCM47XX_BOARD_NETGEAR_WNDR3400V1:
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return &platforms[WNDR3400V1];
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case BCM47XX_BOARD_NETGEAR_WNDR3700V3:
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return &platforms[WNDR3700V3];
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case BCM47XX_BOARD_UNKNOWN:
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case BCM47XX_BOARD_NON:
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printk(MODULE_NAME ": unknown board found, try legacy detect\n");
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@ -1476,13 +1501,23 @@ static void register_leds(struct led_t *l)
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if (l->gpio & gpiomask)
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continue;
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if (l->gpio & GPIO_TYPE_EXTIF) {
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switch (l->gpio & GPIO_TYPE_MASK) {
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case GPIO_TYPE_EXTIF:
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l->state = 0;
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set_led_extif(l);
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} else {
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break;
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case GPIO_TYPE_SHIFT:
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mask |= (SHIFTREG_DATA | SHIFTREG_CLK);
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oe_mask |= (SHIFTREG_DATA | SHIFTREG_CLK);
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l->state = (l->polarity != NORMAL);
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set_led_shift(l);
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break;
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case GPIO_TYPE_NORMAL:
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default:
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if (l->polarity != INPUT) oe_mask |= l->gpio;
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mask |= l->gpio;
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val |= (l->polarity == NORMAL)?0:l->gpio;
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break;
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}
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if (l->polarity == INPUT) continue;
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@ -1518,20 +1553,68 @@ static void set_led_extif(struct led_t *led)
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*addr;
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}
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/*
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* This should be extended to allow the platform to specify the pins and width
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* of the shift register. They're hardcoded for now because only the WNDR3700v3
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* uses it.
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*/
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static void shiftreg_output(unsigned int val)
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{
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unsigned int mask;
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bcm47xx_gpio_out(SHIFTREG_DATA, SHIFTREG_DATA); /* init off, pull high */
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bcm47xx_gpio_out(SHIFTREG_CLK, 0); /* init reset */
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/* shift 8 times */
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for(mask = 1 << (SHIFTREG_MAX_BITS-1); mask; mask >>= 1)
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{
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bcm47xx_gpio_out(SHIFTREG_DATA, (val & mask) ? SHIFTREG_DATA : 0);
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bcm47xx_gpio_out(SHIFTREG_CLK, SHIFTREG_CLK); /* pull high to trigger */
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bcm47xx_gpio_out(SHIFTREG_CLK, 0); /* reset to low */
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}
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}
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static void set_led_shift(struct led_t *led)
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{
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static u32 shiftreg = 0;
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u32 old = shiftreg;
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u32 pin = (led->gpio & ~GPIO_TYPE_MASK);
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if (led->state) {
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shiftreg |= pin;
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} else {
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shiftreg &= ~pin;
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}
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/* Clock the bits out. */
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if (shiftreg != old) {
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shiftreg_output(shiftreg);
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}
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}
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static void led_flash(unsigned long dummy) {
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struct led_t *l;
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u32 mask = 0;
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u8 extif_blink = 0;
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for (l = platform.leds; l->name; l++) {
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if (l->flash) {
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if (l->gpio & GPIO_TYPE_EXTIF) {
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extif_blink = 1;
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l->state = !l->state;
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set_led_extif(l);
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} else {
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mask |= l->gpio;
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}
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if (!l->flash) continue;
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switch (l->gpio & GPIO_TYPE_MASK) {
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case GPIO_TYPE_EXTIF:
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extif_blink = 1;
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l->state = !l->state;
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set_led_extif(l);
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break;
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case GPIO_TYPE_SHIFT:
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extif_blink = 1;
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l->state = !l->state;
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set_led_shift(l);
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break;
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case GPIO_TYPE_NORMAL:
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default:
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mask |= l->gpio;
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break;
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}
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}
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@ -1562,16 +1645,14 @@ static ssize_t diag_proc_read(struct file *file, char *buf, size_t count, loff_t
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switch (handler->type) {
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case PROC_LED: {
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struct led_t * led = (struct led_t *) handler->ptr;
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u8 p = (led->polarity == NORMAL ? 0 : 1);
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if (led->flash) {
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len = sprintf(page, "f\n");
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} else if ((led->gpio & GPIO_TYPE_MASK) != GPIO_TYPE_NORMAL) {
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len = sprintf(page, "%d\n", ((led->state ^ p) ? 1 : 0));
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} else {
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if (led->gpio & GPIO_TYPE_EXTIF) {
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len = sprintf(page, "%d\n", led->state);
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} else {
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u32 in = (bcm47xx_gpio_in(~0) & led->gpio ? 1 : 0);
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u8 p = (led->polarity == NORMAL ? 0 : 1);
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len = sprintf(page, "%d\n", ((in ^ p) ? 1 : 0));
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}
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u32 in = (bcm47xx_gpio_in(~0) & led->gpio ? 1 : 0);
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len = sprintf(page, "%d\n", ((in ^ p) ? 1 : 0));
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}
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break;
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}
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@ -1628,9 +1709,12 @@ static ssize_t diag_proc_write(struct file *file, const char *buf, size_t count,
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led_flash(0);
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} else {
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led->flash = 0;
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if (led->gpio & GPIO_TYPE_EXTIF) {
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if ((led->gpio & GPIO_TYPE_MASK) == GPIO_TYPE_EXTIF) {
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led->state = p ^ ((page[0] == '1') ? 1 : 0);
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set_led_extif(led);
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} else if ((led->gpio & GPIO_TYPE_MASK) == GPIO_TYPE_SHIFT) {
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led->state = p ^ ((page[0] == '1') ? 1 : 0);
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set_led_shift(led);
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} else {
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bcm47xx_gpio_outen(led->gpio, led->gpio);
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bcm47xx_gpio_control(led->gpio, 0);
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@ -104,6 +104,7 @@ static void register_leds(struct led_t *l);
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static void unregister_leds(struct led_t *l);
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static void set_led_extif(struct led_t *led);
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static void set_led_shift(struct led_t *led);
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static void led_flash(unsigned long dummy);
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/* 2.4 compatibility */
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@ -9,8 +9,14 @@
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#define EXTIF_ADDR 0x1f000000
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#define EXTIF_UART (EXTIF_ADDR + 0x00800000)
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/* GPIO pins driving LEDs through a shift register */
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#define SHIFTREG_DATA (1 << 6)
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#define SHIFTREG_CLK (1 << 7)
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#define SHIFTREG_MAX_BITS 8
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#define GPIO_TYPE_NORMAL (0x0 << 24)
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#define GPIO_TYPE_EXTIF (0x1 << 24)
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#define GPIO_TYPE_SHIFT (0x2 << 24)
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#define GPIO_TYPE_MASK (0xf << 24)
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#endif /* __DIAG_GPIO_H */
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@ -140,6 +140,7 @@ define Image/Build
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$(call Image/Build/Chk,$(1),wndr3400_v1,U12H155T00_NETGEAR,2,$(patsubst jffs2-%,jffs2,$(1)))
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$(call Image/Build/Chk,$(1),wndr3400_v2,U12H187T00_NETGEAR,2,$(patsubst jffs2-%,jffs2,$(1)))
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# $(call Image/Build/Chk,$(1),wndr3400_vcna,U12H155T01_NETGEAR,2,$(patsubst jffs2-%,jffs2,$(1)))
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$(call Image/Build/Chk,$(1),wndr3700_v3,U12H194T00_NETGEAR,2,$(patsubst jffs2-%,jffs2,$(1)))
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$(call Image/Build/Chk,$(1),wndr4000,U12H181T00_NETGEAR,2,$(patsubst jffs2-%,jffs2,$(1)))
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$(call Image/Build/Chk,$(1),wnr834b_v2,U12H081T00_NETGEAR,2,$(patsubst jffs2-%,jffs2,$(1)))
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$(call Image/Build/Chk,$(1),wnr2000v2,U12H114T00_NETGEAR,2,$(patsubst jffs2-%,jffs2,$(1)))
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