ExternalVendorCode/openwrt
1
0
Fork 0
mirror of https://github.com/openwrt/openwrt.git synced 2024-12-19 05:38:00 +00:00
Code Issues Actions 4 Packages Projects Releases Wiki Activity

ramips: correct the PCIe port number for Zbtlink ZBT-WE1326

Browse Source 
MT7621 gets a new PCIe driver in the 5.15+ kernel. Allocating wrong PCIe
port will cause the PCIe NIC to not work properly. This commit fixes
the wrong port numbers on Zbtlink ZBT-WE1326.

According to the bootlog, MT7612E (5 GHz) is connected to pcie1, and
MT7603E (2 GHz) is connected to pcie2:
[4.197658] mt7621-pci 1e140000.pcie: pcie0 no card, disable it (RST & CLK)
[4.204609] mt7621-pci 1e140000.pcie: PCIE1 enabled
[4.209476] mt7621-pci 1e140000.pcie: PCIE2 enabled
...
[4.307988] pci 0000:01:00.0: [14c3:7662] type 00 class 0x028000
[4.367206] pci 0000:02:00.0: [14c3:7603] type 00 class 0x028000

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
This commit is contained in:
Shiji Yang 2023-02-19 09:06:32 +08:00 committed by Hauke Mehrtens
parent fa08d900d4
commit c77913be5b
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
target/linux/ramips/dts/mt7621_zbtlink_zbt-we1326.dts
View File

@ -121,7 +121,7 @@
status = "okay";
};
&pcie0 {
&pcie1 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
@ -135,7 +135,7 @@
};
};
&pcie1 {
&pcie2 {
wifi1: wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;