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ipq806x: fix EA8500 switch control
EA8500 has pcie2 slot unequipped.
By EA8500 hw design default pcie2 reset gpio (gpio63) is used to
reset the switch. That's why enabling pcie2 brings the switch into
a working state.
So let's just control the gpio63 without enabling the pcie2 slot.
We have to remove the pcie2_pins node so the gpio63 is not defined
twice. Because pcie2 node has a reference to pcie2_pins we have to
remove it as well.
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
[slh: rebase for kernel v4.14 as well]
Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
(cherry picked from commit 7f694ef3d9
)
This commit is contained in:
parent
bdddbe9718
commit
c52cd4d8c3
@ -39,6 +39,10 @@
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soc {
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pinmux@800000 {
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pinctrl-0 = <&switch_reset>;
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pinctrl-names = "default";
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button_pins: button_pins {
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mux {
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pins = "gpio65", "gpio67", "gpio68";
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@ -66,6 +70,16 @@
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};
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};
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switch_reset: switch_reset_pins {
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mux {
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pins = "gpio63";
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function = "gpio";
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drive-strength = <2>;
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bias-disable;
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output-low;
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};
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};
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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@ -164,10 +178,6 @@
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status = "ok";
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};
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pcie2: pci@1b900000 {
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status = "ok";
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};
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nand@1ac00000 {
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status = "ok";
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@ -404,3 +414,7 @@
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};
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};
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};
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/delete-node/ &pcie2_pins;
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/delete-node/ &pcie2;
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@ -39,6 +39,10 @@
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soc {
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pinmux@800000 {
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pinctrl-0 = <&switch_reset>;
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pinctrl-names = "default";
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button_pins: button_pins {
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mux {
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pins = "gpio65", "gpio67", "gpio68";
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@ -66,6 +70,16 @@
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};
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};
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switch_reset: switch_reset_pins {
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mux {
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pins = "gpio63";
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function = "gpio";
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drive-strength = <2>;
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bias-disable;
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output-low;
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};
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};
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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@ -164,10 +178,6 @@
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status = "ok";
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};
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pcie2: pci@1b900000 {
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status = "ok";
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};
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nand@1ac00000 {
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status = "ok";
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@ -404,3 +414,7 @@
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};
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};
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};
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/delete-node/ &pcie2_pins;
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/delete-node/ &pcie2;
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