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kernel: add support for limiting 4K erase sector support based on flash chip size
Some targets need 4K sectors for small flash chips (e.g. some routerboards, where the entire chip is just one "erase block"), whereas on other devices 4K sectors lead to horrible flash erase/write performance. Set the default limit in the generic kernel configuration to 4 MiB to ensure that all new platforms don't use 4K sectors for bigger flash chips. On all existing targets use 16 MiB for now to avoid regressions. They will be changed individually in follow-up commits. Signed-off-by: Felix Fietkau <nbd@nbd.name>
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@ -232,6 +232,7 @@ CONFIG_MTD_NAND_RB750=y
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CONFIG_MTD_NAND_RB91X=y
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# CONFIG_MTD_REDBOOT_PARTS is not set
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
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# CONFIG_MTD_SPLIT_EVA_FW is not set
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# CONFIG_MTD_SPLIT_TPLINK_FW is not set
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# CONFIG_MTD_TPLINK_PARTS is not set
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@ -2632,6 +2632,7 @@ CONFIG_MTD_ROOTFS_ROOT_DEV=y
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# CONFIG_MTD_SPINAND_MT29F is not set
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# CONFIG_MTD_SPI_NOR is not set
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# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=4096
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CONFIG_MTD_SPLIT=y
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# CONFIG_MTD_SPLIT_BRNIMAGE_FW is not set
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# CONFIG_MTD_SPLIT_EVA_FW is not set
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@ -0,0 +1,56 @@
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From: Felix Fietkau <nbd@nbd.name>
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Date: Sat, 4 Nov 2017 07:40:23 +0100
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Subject: [PATCH] mtd: spi-nor: support limiting 4K sectors support based on
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flash size
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Some devices need 4K sectors to be able to deal with small flash chips.
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For instance, w25x05 is 64 KiB in size, and without 4K sectors, the
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entire chip is just one erase block.
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On bigger flash chip sizes, using 4K sectors can significantly slow down
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many operations, including using a writable filesystem. There are several
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platforms where it makes sense to use a single kernel on both kinds of
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devices.
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To support this properly, allow configuring an upper flash chip size
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limit for 4K sectors support.
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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---
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--- a/drivers/mtd/spi-nor/Kconfig
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+++ b/drivers/mtd/spi-nor/Kconfig
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@@ -29,6 +29,17 @@ config MTD_SPI_NOR_USE_4K_SECTORS
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Please note that some tools/drivers/filesystems may not work with
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4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
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+config MTD_SPI_NOR_USE_4K_SECTORS_LIMIT
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+ int "Maximum flash chip size to use 4K sectors on (in KiB)"
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+ depends on MTD_SPI_NOR_USE_4K_SECTORS
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+ default "4096"
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+ help
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+ There are many flash chips that support 4K sectors, but are so large
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+ that using them significantly slows down writing large amounts of
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+ data or using a writable filesystem.
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+ Any flash chip larger than the size specified in this option will
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+ not use 4K sectors.
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+
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config SPI_ATMEL_QUADSPI
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tristate "Atmel Quad SPI Controller"
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depends on ARCH_AT91 || (ARM && COMPILE_TEST)
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -1642,10 +1642,12 @@ int spi_nor_scan(struct spi_nor *nor, co
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#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
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/* prefer "small sector" erase if possible */
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- if (info->flags & SECT_4K) {
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+ if ((info->flags & SECT_4K) && (mtd->size <=
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+ CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
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nor->erase_opcode = SPINOR_OP_BE_4K;
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mtd->erasesize = 4096;
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- } else if (info->flags & SECT_4K_PMC) {
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+ } else if ((info->flags & SECT_4K_PMC) && (mtd->size <=
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+ CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
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nor->erase_opcode = SPINOR_OP_BE_4K_PMC;
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mtd->erasesize = 4096;
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} else
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@ -841,6 +841,7 @@ CONFIG_MTD_NAND_DENALI_DT=y
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CONFIG_MTD_NAND_ECC=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
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CONFIG_MTD_SST25L=y
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CONFIG_MTD_UBI=y
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CONFIG_MTD_UBI_BEB_LIMIT=20
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@ -824,6 +824,7 @@ CONFIG_MTD_NAND_ECC=y
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CONFIG_MTD_NAND_FSL_IFC=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
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CONFIG_MTD_SST25L=y
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CONFIG_MUTEX_SPIN_ON_OWNER=y
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CONFIG_MV_XOR_V2=y
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@ -216,6 +216,7 @@ CONFIG_MTD_SPI_NAND=y
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CONFIG_MTD_SPI_NAND_DEVICES=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
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CONFIG_MTD_UBI=y
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CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI_BLOCK=y
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@ -141,6 +141,7 @@ CONFIG_MTD_NAND_MT7620=y
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CONFIG_MTD_PHYSMAP=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
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CONFIG_MTD_SPLIT_FIRMWARE=y
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CONFIG_MTD_SPLIT_SEAMA_FW=y
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CONFIG_MTD_SPLIT_TPLINK_FW=y
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@ -134,6 +134,7 @@ CONFIG_MTD_M25P80=y
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CONFIG_MTD_PHYSMAP=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
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CONFIG_MTD_SPLIT_FIRMWARE=y
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CONFIG_MTD_SPLIT_SEAMA_FW=y
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CONFIG_MTD_SPLIT_UIMAGE_FW=y
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@ -134,6 +134,7 @@ CONFIG_MTD_M25P80=y
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CONFIG_MTD_PHYSMAP=y
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CONFIG_MTD_SPI_NOR=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
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CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
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CONFIG_MTD_SPLIT_FIRMWARE=y
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CONFIG_MTD_SPLIT_SEAMA_FW=y
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CONFIG_MTD_SPLIT_UIMAGE_FW=y
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